Age | Commit message (Expand) | Author |
2012-07-12 | target-arm: Add support for long format translation table walks | Peter Maydell |
2012-07-12 | target-arm: Implement TTBCR changes for LPAE | Peter Maydell |
2012-07-12 | target-arm: Implement long-descriptor PAR format | Peter Maydell |
2012-07-12 | target-arm: Use target_phys_addr_t in get_phys_addr() | Peter Maydell |
2012-07-12 | target-arm: Add 64 bit PAR, TTBR0, TTBR1 for LPAE | Peter Maydell |
2012-07-12 | target-arm: Add 64 bit variants of DBGDRAR and DBGDSAR for LPAE | Peter Maydell |
2012-07-12 | target-arm: Add AMAIR0, AMAIR1 LPAE cp15 registers | Peter Maydell |
2012-07-12 | target-arm: Implement privileged-execute-never (PXN) | Peter Maydell |
2012-07-12 | target-arm: Fix some copy-and-paste errors in cp register names | Peter Maydell |
2012-07-12 | target-arm: Fix typo that meant TTBR1 accesses went to TTBR0 | Peter Maydell |
2012-06-20 | target-arm: Remove remaining old cp15 infrastructure | Peter Maydell |
2012-06-20 | target-arm: Move block cache ops to new cp15 framework | Peter Maydell |
2012-06-20 | target-arm: Convert final ID registers | Peter Maydell |
2012-06-20 | target-arm: Convert MPIDR | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 cache ID registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 crn=0 crm={1,2} feature registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 crn=1 registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 crn=9 registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 crn=6 registers | Peter Maydell |
2012-06-20 | target-arm: convert cp15 crn=7 registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 VA-PA translation registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 MMU TLB control | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 crn=15 registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 crn=10 registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 crn=13 registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 crn=2 registers | Peter Maydell |
2012-06-20 | target-arm: Convert MMU fault status cp15 registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 c3 register | Peter Maydell |
2012-06-20 | target-arm: Convert generic timer cp15 regs | Peter Maydell |
2012-06-20 | target-arm: Convert performance monitor registers | Peter Maydell |
2012-06-20 | target-arm: Convert TLS registers | Peter Maydell |
2012-06-20 | target-arm: Convert WFI/barriers special cases to cp_reginfo | Peter Maydell |
2012-06-20 | target-arm: Convert TEECR, TEEHBR to new scheme | Peter Maydell |
2012-06-20 | target-arm: Convert debug registers to cp_reginfo | Peter Maydell |
2012-06-20 | target-arm: Add register_cp_regs_for_features() | Peter Maydell |
2012-06-20 | target-arm: Remove old cpu_arm_set_cp_io infrastructure | Peter Maydell |
2012-06-20 | target-arm: initial coprocessor register framework | Peter Maydell |
2012-06-04 | Kill off cpu_state_reset() | Andreas Färber |
2012-06-04 | target-arm: Use cpu_reset() in cpu_arm_init() | Andreas Färber |
2012-04-27 | target-arm: Change cpu_arm_init() return type to ARMCPU | Andreas Färber |
2012-04-21 | target-arm: Move reset handling to arm_cpu_reset | Peter Maydell |
2012-04-21 | target-arm: Drop cpu_reset_model_id() | Peter Maydell |
2012-04-21 | target-arm: Move cache ID register setup to cpu specific init fns | Peter Maydell |
2012-04-21 | target-arm: Move OMAP cp15_i_{max,min} reset to cpu_state_reset | Peter Maydell |
2012-04-21 | target-arm: Move feature register setup to per-CPU init fns | Peter Maydell |
2012-04-21 | target-arm: Move iWMMXT wCID reset to cpu_state_reset | Peter Maydell |
2012-04-21 | target-arm: Drop JTAG_ID documentation | Peter Maydell |
2012-04-21 | target-arm: Move SCTLR reset value setup to per cpu init fns | Peter Maydell |
2012-04-21 | target-arm: Move CTR setup to per cpu init fns | Peter Maydell |
2012-04-21 | target-arm: Move MVFR* setup to per cpu init fns | Peter Maydell |