Age | Commit message (Expand) | Author |
2015-09-07 | target-arm: Improve semihosting debug prints | Christopher Covington |
2015-08-25 | target-arm: Implement AArch64 TLBI operations on IPAs | Peter Maydell |
2015-08-25 | target-arm: Implement missing EL3 TLB invalidate operations | Peter Maydell |
2015-08-25 | target-arm: Implement missing EL2 TLBI operations | Peter Maydell |
2015-08-25 | target-arm: Restrict AArch64 TLB flushes to the MMU indexes they must touch | Peter Maydell |
2015-08-25 | target-arm: Move TLBI ALLE1/ALLE1IS definitions into numeric order | Peter Maydell |
2015-08-25 | target-arm: Implement AArch32 ATS1H* operations | Peter Maydell |
2015-08-25 | target-arm: Enable the AArch32 ATS12NSO ops | Peter Maydell |
2015-08-25 | target-arm: Wire up AArch64 EL2 and EL3 address translation ops | Peter Maydell |
2015-08-25 | target-arm: there is no TTBR1 for 32-bit EL2 stage 1 translations | Peter Maydell |
2015-08-25 | target-arm: Implement missing ACTLR registers | Peter Maydell |
2015-08-25 | target-arm: Implement missing AFSR registers | Peter Maydell |
2015-08-25 | target-arm: Implement missing AMAIR registers | Peter Maydell |
2015-08-25 | target-arm: Add missing MAIR_EL3 and TPIDR_EL3 registers | Peter Maydell |
2015-08-13 | target-arm: Add AArch32 banked register access to secure physical timer | Peter Maydell |
2015-08-13 | target-arm: Add the AArch64 view of the Secure physical timer | Peter Maydell |
2015-08-13 | target-arm: Add debug check for mismatched cpreg resets | Peter Maydell |
2015-08-13 | target-arm: Add the Hypervisor timer | Edgar E. Iglesias |
2015-08-13 | target-arm: Pass timeridx as argument to various timer functions | Edgar E. Iglesias |
2015-08-13 | target-arm: Rename and move gt_cnt_reset | Edgar E. Iglesias |
2015-08-13 | target-arm: Add CNTHCTL_EL2 | Edgar E. Iglesias |
2015-08-13 | target-arm: Add CNTVOFF_EL2 | Edgar E. Iglesias |
2015-07-15 | target-arm: Fix broken SCTLR_EL3 reset | Peter Maydell |
2015-07-06 | target-arm: fix write helper for TLBI ALLE1IS | Sergey Fedorov |
2015-06-19 | semihosting: create SemihostingConfig structure and semihost.h | Leon Alrae |
2015-06-19 | target-arm: Implement PMSAv7 MPU | Peter Crosthwaite |
2015-06-19 | target-arm: Add registers for PMSAv7 | Peter Crosthwaite |
2015-06-19 | target-arm/helper.c: define MPUIR register | Peter Crosthwaite |
2015-06-19 | target-arm: Do not reset sysregs marked as ALIAS | Sergey Fedorov |
2015-06-15 | arm: helper: rename get_phys_addr_mpu | Peter Crosthwaite |
2015-06-15 | arm: Implement uniprocessor with MP config | Peter Crosthwaite |
2015-06-15 | arm: Refactor get_phys_addr FSR return mechanism | Peter Crosthwaite |
2015-06-15 | arm: helper: Factor out CP regs common to [pv]msa | Peter Crosthwaite |
2015-06-15 | arm: Don't add v7mp registers in MPU systems | Peter Crosthwaite |
2015-06-15 | arm: Do not define TLBTR in PMSA systems | Peter Crosthwaite |
2015-06-15 | target-arm: Use the kernel's idea of MPIDR if we're using KVM | Pavel Fedin |
2015-06-15 | target-arm: add AArch32 MIDR aliases in ARMv8 | Sergey Fedorov |
2015-06-15 | target-arm: Fix REVIDR reset value | Sergey Fedorov |
2015-06-15 | target-arm: use extended address bits from supersection short descriptor | Sergey Fedorov |
2015-06-15 | target-arm: Handle "extended small page" descriptors correctly | Peter Maydell |
2015-06-02 | target-arm: Remove v8_ prefix from names of non-v8-specific cpreg arrays | Peter Maydell |
2015-06-02 | Revert "target-arm: Avoid g_hash_table_get_keys()" | Markus Armbruster |
2015-06-02 | target-arm: Add TLBI_VAE2{IS} | Edgar E. Iglesias |
2015-06-02 | target-arm: Add TLBI_ALLE2 | Edgar E. Iglesias |
2015-06-02 | target-arm: Add TLBI_ALLE1{IS} | Edgar E. Iglesias |
2015-06-02 | target-arm: Add TTBR0_EL2 | Edgar E. Iglesias |
2015-06-02 | target-arm: Add TPIDR_EL2 | Edgar E. Iglesias |
2015-06-02 | target-arm: Add SCTLR_EL2 | Edgar E. Iglesias |
2015-06-02 | target-arm: Add TCR_EL2 | Edgar E. Iglesias |
2015-06-02 | target-arm: Add MAIR_EL2 | Edgar E. Iglesias |