Age | Commit message (Expand) | Author |
2013-02-23 | target-arm: Use mul[us]2 and add2 in umlal et al | Richard Henderson |
2013-02-16 | target-arm: Move TCG initialization to ARMCPU initfn | Andreas Färber |
2013-02-16 | target-arm: Update ARMCPU to QOM realizefn | Andreas Färber |
2013-01-30 | target-arm: Rename CPU types | Andreas Färber |
2013-01-27 | target-arm: Detect attempt to instantiate non-CPU type in cpu_init() | Andreas Färber |
2013-01-15 | cpu: Move cpu_index field to CPUState | Andreas Färber |
2013-01-11 | target-arm: Fix SWI (SVC) instruction in M profile. | Alex_Rozenman@mentor.com |
2012-12-23 | Merge branch 'master' of git://git.qemu.org/qemu into qom-cpu | Andreas Färber |
2012-12-19 | cpu: Introduce CPUListState struct | Andreas Färber |
2012-12-19 | softmmu: move include files to include/sysemu/ | Paolo Bonzini |
2012-12-19 | misc: move include files to include/qemu/ | Paolo Bonzini |
2012-12-19 | exec: move include files to include/exec/ | Paolo Bonzini |
2012-10-24 | target-arm: Implement abs_i32 inline rather than as a helper | Peter Maydell |
2012-10-23 | Rename target_phys_addr_t to hwaddr | Avi Kivity |
2012-09-15 | target-arm: final conversion to AREG0 free mode | Blue Swirl |
2012-09-10 | target-arm: Fix potential buffer overflow | Stefan Weil |
2012-08-10 | target-arm: Fix typos in comments | Peter Maydell |
2012-07-12 | target-arm: Add support for long format translation table walks | Peter Maydell |
2012-07-12 | target-arm: Implement TTBCR changes for LPAE | Peter Maydell |
2012-07-12 | target-arm: Implement long-descriptor PAR format | Peter Maydell |
2012-07-12 | target-arm: Use target_phys_addr_t in get_phys_addr() | Peter Maydell |
2012-07-12 | target-arm: Add 64 bit PAR, TTBR0, TTBR1 for LPAE | Peter Maydell |
2012-07-12 | target-arm: Add 64 bit variants of DBGDRAR and DBGDSAR for LPAE | Peter Maydell |
2012-07-12 | target-arm: Add AMAIR0, AMAIR1 LPAE cp15 registers | Peter Maydell |
2012-07-12 | target-arm: Implement privileged-execute-never (PXN) | Peter Maydell |
2012-07-12 | target-arm: Fix some copy-and-paste errors in cp register names | Peter Maydell |
2012-07-12 | target-arm: Fix typo that meant TTBR1 accesses went to TTBR0 | Peter Maydell |
2012-06-20 | target-arm: Remove remaining old cp15 infrastructure | Peter Maydell |
2012-06-20 | target-arm: Move block cache ops to new cp15 framework | Peter Maydell |
2012-06-20 | target-arm: Convert final ID registers | Peter Maydell |
2012-06-20 | target-arm: Convert MPIDR | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 cache ID registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 crn=0 crm={1,2} feature registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 crn=1 registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 crn=9 registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 crn=6 registers | Peter Maydell |
2012-06-20 | target-arm: convert cp15 crn=7 registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 VA-PA translation registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 MMU TLB control | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 crn=15 registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 crn=10 registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 crn=13 registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 crn=2 registers | Peter Maydell |
2012-06-20 | target-arm: Convert MMU fault status cp15 registers | Peter Maydell |
2012-06-20 | target-arm: Convert cp15 c3 register | Peter Maydell |
2012-06-20 | target-arm: Convert generic timer cp15 regs | Peter Maydell |
2012-06-20 | target-arm: Convert performance monitor registers | Peter Maydell |
2012-06-20 | target-arm: Convert TLS registers | Peter Maydell |
2012-06-20 | target-arm: Convert WFI/barriers special cases to cp_reginfo | Peter Maydell |
2012-06-20 | target-arm: Convert TEECR, TEEHBR to new scheme | Peter Maydell |