Age | Commit message (Expand) | Author |
2012-04-27 | target-arm: Change cpu_arm_init() return type to ARMCPU | Andreas Färber |
2012-04-21 | target-arm: Move reset handling to arm_cpu_reset | Peter Maydell |
2012-04-21 | target-arm: Drop cpu_reset_model_id() | Peter Maydell |
2012-04-21 | target-arm: Move cache ID register setup to cpu specific init fns | Peter Maydell |
2012-04-21 | target-arm: Move OMAP cp15_i_{max,min} reset to cpu_state_reset | Peter Maydell |
2012-04-21 | target-arm: Move feature register setup to per-CPU init fns | Peter Maydell |
2012-04-21 | target-arm: Move iWMMXT wCID reset to cpu_state_reset | Peter Maydell |
2012-04-21 | target-arm: Drop JTAG_ID documentation | Peter Maydell |
2012-04-21 | target-arm: Move SCTLR reset value setup to per cpu init fns | Peter Maydell |
2012-04-21 | target-arm: Move CTR setup to per cpu init fns | Peter Maydell |
2012-04-21 | target-arm: Move MVFR* setup to per cpu init fns | Peter Maydell |
2012-04-21 | target-arm: Move FPSID config to cpu init fns | Peter Maydell |
2012-04-21 | target-arm: Move feature bit settings to CPU init fns | Peter Maydell |
2012-04-21 | target-arm: Add QOM subclasses for each ARM cpu implementation | Peter Maydell |
2012-04-06 | Userspace ARM BE8 support | Paul Brook |
2012-03-30 | ARM: Permit any ARMv6K CPU to read the MVFR0 and MVFR1 VFP registers. | Andrew Towers |
2012-03-29 | target-arm: Minimalistic CPU QOM'ification | Andreas Färber |
2012-03-29 | target-arm: Drop cpu_arm_close() | Andreas Färber |
2012-03-15 | target-arm: Clear IT bits when taking exceptions in v7M | Peter Maydell |
2012-03-15 | target-arm: Fix typo in ARM946 cp15 c5 handling | Peter Maydell |
2012-03-14 | target-arm: Don't overuse CPUState | Andreas Färber |
2012-03-14 | Rename cpu_reset() to cpu_state_reset() | Andreas Färber |
2012-02-28 | target-arm: Clean includes | Stefan Weil |
2012-02-17 | target-arm/helper.c: tb_flush() on CPU reset | Peter Maydell |
2012-02-17 | target-arm/helper.c: Correct FPSID value for Cortex-A9 | Peter Maydell |
2012-01-25 | Add Cortex-A15 CPU definition | Peter Maydell |
2012-01-25 | Add dummy implementation of generic timer cp15 registers | Peter Maydell |
2012-01-25 | arm: store the config_base_register during cpu_reset | Mark Langsdorf |
2012-01-25 | target-arm/helper.c: Don't assume softfloat int32 is 32 bits only | Peter Maydell |
2012-01-25 | target-arm: Fix implementation of TLB invalidate operations | Peter Maydell |
2012-01-13 | arm: Add dummy support for co-processor 15's secure config register | Rob Herring |
2012-01-05 | arm: add dummy A9-specific cp15 registers | Mark Langsdorf |
2012-01-05 | target-arm: Ignore attempts to set invalid modes in CPSR | Peter Maydell |
2012-01-05 | target-arm: Don't use cpu_single_env in bank_number() | Peter Maydell |
2011-12-13 | target-arm: Infer VFPv3 feature from VFPv4 | Andreas Färber |
2011-12-13 | target-arm: Infer VFP feature from VFPv3 | Andreas Färber |
2011-12-13 | target-arm: Infer Thumb division feature from M profile | Andreas Färber |
2011-12-13 | target-arm: Infer Thumb2 feature from ARMv7 | Andreas Färber |
2011-12-13 | target-arm: Infer AUXCR feature from ARMv6 | Andreas Färber |
2011-12-13 | target-arm: Infer ARMv6(K) feature from ARMv7 | Andreas Färber |
2011-12-13 | target-arm: Infer ARMv6 feature from v6K | Andreas Färber |
2011-12-13 | target-arm: Infer ARMv5 feature from ARMv6 | Andreas Färber |
2011-12-13 | target-arm: Infer ARMv4T feature from ARMv5 | Andreas Färber |
2011-12-13 | arm: Fix CP15 FSR (C5) domain setting | Jean-Christophe DUBOIS |
2011-12-05 | target-arm/helper.c: Don't allocate TCG resources unless TCG enabled | Peter Maydell |
2011-10-20 | target-arm: Fix use of free() in cpu_arm_close() | Andreas Färber |
2011-10-19 | target-arm: Implement VFPv4 fused multiply-accumulate insns | Peter Maydell |
2011-10-19 | target-arm: Add ARM UDIV/SDIV support | Peter Maydell |
2011-10-19 | target-arm: Rename ARM_FEATURE_DIV to _THUMB_DIV | Peter Maydell |
2011-10-19 | rsqrte_f32: No need to copy sign bit. | Christophe LYON |