aboutsummaryrefslogtreecommitdiff
path: root/target-arm/helper.c
AgeCommit message (Expand)Author
2014-12-22target-arm: Merge EL3 CP15 register listsGreg Bellows
2014-12-11target-arm: make MAIR0/1 bankedGreg Bellows
2014-12-11target-arm: make c13 cp regs banked (FCSEIDR, ...)Fabian Aggeler
2014-12-11target-arm: make VBAR bankedGreg Bellows
2014-12-11target-arm: make PAR bankedFabian Aggeler
2014-12-11target-arm: make IFAR/DFAR bankedFabian Aggeler
2014-12-11target-arm: make DFSR bankedFabian Aggeler
2014-12-11target-arm: make IFSR bankedFabian Aggeler
2014-12-11target-arm: make DACR bankedFabian Aggeler
2014-12-11target-arm: make TTBCR bankedFabian Aggeler
2014-12-11target-arm: make TTBR0/1 bankedFabian Aggeler
2014-12-11target-arm: make CSSELR bankedFabian Aggeler
2014-12-11target-arm: respect SCR.FW, SCR.AW and SCTLR.NMFIFabian Aggeler
2014-12-11target-arm: add SCTLR_EL3 and make SCTLR bankedFabian Aggeler
2014-12-11target-arm: add MVBAR supportFabian Aggeler
2014-12-11target-arm: add SDER definitionGreg Bellows
2014-12-11target-arm: add NSACR registerFabian Aggeler
2014-12-11target-arm: implement IRQ/FIQ routing to Monitor modeFabian Aggeler
2014-12-11target-arm: move AArch32 SCR into security reglistFabian Aggeler
2014-12-11target-arm: insert AArch32 cpregs twice into hashtableFabian Aggeler
2014-12-11target-arm: add secure state bit to CPREG hashPeter Maydell
2014-12-11target-arm: add async excp target_el functionGreg Bellows
2014-11-17target-arm: handle address translations that start at level 3Peter Maydell
2014-10-24target-arm: A32: Emulate the SMC instructionFabian Aggeler
2014-10-24target-arm: rename arm_current_pl to arm_current_elGreg Bellows
2014-10-24target-arm: reject switching to monitor modeSergey Fedorov
2014-10-24target-arm: Correct sense of the DCZID DZP bitPeter Maydell
2014-10-24target-arm: add emulation of PSCI calls for system emulationRob Herring
2014-10-24target-arm: do not set do_interrupt handlers for ARM and AArch64 user modesRob Herring
2014-09-29target-arm: Add support for VIRQ and VFIQEdgar E. Iglesias
2014-09-29target-arm: Add IRQ and FIQ routing to EL2 and 3Edgar E. Iglesias
2014-09-29target-arm: A64: Emulate the SMC insnEdgar E. Iglesias
2014-09-29target-arm: Add a Hypervisor Trap exception typeEdgar E. Iglesias
2014-09-29target-arm: A64: Emulate the HVC insnEdgar E. Iglesias
2014-09-29target-arm: A64: Refactor aarch64_cpu_do_interruptEdgar E. Iglesias
2014-09-29target-arm: Add SCR_EL3Edgar E. Iglesias
2014-09-29target-arm: Add HCR_EL2Edgar E. Iglesias
2014-09-29target-arm: Don't handle c15_cpar changes via tb_flush()Peter Maydell
2014-09-29target-arm: Implement setting guest breakpointsPeter Maydell
2014-09-12target-arm: Make *IS TLB maintenance ops affect all CPUsPeter Maydell
2014-09-12target-arm: Push legacy wildcard TLB ops back into v6Peter Maydell
2014-09-12target-arm: Implement minimal DBGVCR, OSDLR_EL1, MDCCSR_EL0Peter Maydell
2014-09-12target-arm: Remove comment about MDSCR_EL1 being dummy implementationPeter Maydell
2014-09-12target-arm: Set DBGDSCR.MOE for debug exceptions taken to AArch32Peter Maydell
2014-09-12target-arm: Implement handling of fired watchpointsPeter Maydell
2014-09-12target-arm: Move extended_addresses_enabled() to internals.hPeter Maydell
2014-09-12target-arm: Implement setting of watchpointsPeter Maydell
2014-08-29target-arm: Implement pmccfiltr_write functionAlistair Francis
2014-08-29target-arm: Remove old code and replace with new functionsAlistair Francis
2014-08-29target-arm: Implement pmccntr_sync functionAlistair Francis
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-16 12:42:59 +0000