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path: root/target-arm/helper.c
AgeCommit message (Expand)Author
2013-06-25target-arm: Convert TCG to using (index,value) list for cp migrationPeter Maydell
2013-06-25target-arm: mark up cpregs for no-migrate or raw accessPeter Maydell
2013-06-25target-arm: Add raw_readfn and raw_writefn to ARMCPRegInfoPeter Maydell
2013-03-12target-arm: Override do_interrupt for ARMv7-M profileAndreas Färber
2013-03-12cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber
2013-03-12cpu: Pass CPUState to cpu_interrupt()Andreas Färber
2013-03-12cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber
2013-03-05ARM: KVM: Add support for KVM on ARM architectureChristoffer Dall
2013-03-05target-arm: Drop CPUARMState* argument from bank_number()Peter Maydell
2013-02-23target-arm: Use mul[us]2 and add2 in umlal et alRichard Henderson
2013-02-16target-arm: Move TCG initialization to ARMCPU initfnAndreas Färber
2013-02-16target-arm: Update ARMCPU to QOM realizefnAndreas Färber
2013-01-30target-arm: Rename CPU typesAndreas Färber
2013-01-27target-arm: Detect attempt to instantiate non-CPU type in cpu_init()Andreas Färber
2013-01-15cpu: Move cpu_index field to CPUStateAndreas Färber
2013-01-11target-arm: Fix SWI (SVC) instruction in M profile.Alex_Rozenman@mentor.com
2012-12-23Merge branch 'master' of git://git.qemu.org/qemu into qom-cpuAndreas Färber
2012-12-19cpu: Introduce CPUListState structAndreas Färber
2012-12-19softmmu: move include files to include/sysemu/Paolo Bonzini
2012-12-19misc: move include files to include/qemu/Paolo Bonzini
2012-12-19exec: move include files to include/exec/Paolo Bonzini
2012-10-24target-arm: Implement abs_i32 inline rather than as a helperPeter Maydell
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity
2012-09-15target-arm: final conversion to AREG0 free modeBlue Swirl
2012-09-10target-arm: Fix potential buffer overflowStefan Weil
2012-08-10target-arm: Fix typos in commentsPeter Maydell
2012-07-12target-arm: Add support for long format translation table walksPeter Maydell
2012-07-12target-arm: Implement TTBCR changes for LPAEPeter Maydell
2012-07-12target-arm: Implement long-descriptor PAR formatPeter Maydell
2012-07-12target-arm: Use target_phys_addr_t in get_phys_addr()Peter Maydell
2012-07-12target-arm: Add 64 bit PAR, TTBR0, TTBR1 for LPAEPeter Maydell
2012-07-12target-arm: Add 64 bit variants of DBGDRAR and DBGDSAR for LPAEPeter Maydell
2012-07-12target-arm: Add AMAIR0, AMAIR1 LPAE cp15 registersPeter Maydell
2012-07-12target-arm: Implement privileged-execute-never (PXN)Peter Maydell
2012-07-12target-arm: Fix some copy-and-paste errors in cp register namesPeter Maydell
2012-07-12target-arm: Fix typo that meant TTBR1 accesses went to TTBR0Peter Maydell
2012-06-20target-arm: Remove remaining old cp15 infrastructurePeter Maydell
2012-06-20target-arm: Move block cache ops to new cp15 frameworkPeter Maydell
2012-06-20target-arm: Convert final ID registersPeter Maydell
2012-06-20target-arm: Convert MPIDRPeter Maydell
2012-06-20target-arm: Convert cp15 cache ID registersPeter Maydell
2012-06-20target-arm: Convert cp15 crn=0 crm={1,2} feature registersPeter Maydell
2012-06-20target-arm: Convert cp15 crn=1 registersPeter Maydell
2012-06-20target-arm: Convert cp15 crn=9 registersPeter Maydell
2012-06-20target-arm: Convert cp15 crn=6 registersPeter Maydell
2012-06-20target-arm: convert cp15 crn=7 registersPeter Maydell
2012-06-20target-arm: Convert cp15 VA-PA translation registersPeter Maydell
2012-06-20target-arm: Convert cp15 MMU TLB controlPeter Maydell
2012-06-20target-arm: Convert cp15 crn=15 registersPeter Maydell
2012-06-20target-arm: Convert cp15 crn=10 registersPeter Maydell
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