aboutsummaryrefslogtreecommitdiff
path: root/target-arm/helper.c
AgeCommit message (Expand)Author
2015-05-29target-arm: Add AArch64 CPTR registersGreg Bellows
2015-05-29target-arm: Update interrupt handling to use target ELGreg Bellows
2015-05-29target-arm: Move setting of exception info into tlb_fillPeter Maydell
2015-05-18target-arm: Remove unneeded '+'Edgar E. Iglesias
2015-05-18target-arm: Correct accessfn for CNTV_TVAL_EL0Edgar E. Iglesias
2015-05-18target-arm: Correct accessfn for CNTP_{CT}VAL_EL0Edgar E. Iglesias
2015-05-18target-arm: Add EL3 and EL2 TCR checkingGreg Bellows
2015-05-18target-arm: Add TTBR regime function and useGreg Bellows
2015-05-14tcg: Push merged memop+mmu_idx parameter to softmmu routinesRichard Henderson
2015-04-26Allow ARMv8 SCR.SMD updatesGreg Bellows
2015-04-26target-arm: rename c1_coproc to cpacr_el1Sergey Fedorov
2015-04-26target-arm: Add user-mode transaction attributePeter Maydell
2015-04-26target-arm: Use correct memory attributes for page table walksPeter Maydell
2015-04-26target-arm: Honour NS bits in page tablesPeter Maydell
2015-04-01target-arm: Store SPSR_EL1 state in banked_spsr[1] (SPSR_svc)Peter Maydell
2015-03-16target-arm: Ignore low bit of PC in M-profile exception returnPeter Maydell
2015-03-16target-arm: get_phys_addr_lpae: more xn controlAndrew Jones
2015-03-16target-arm: fix get_phys_addr_v6/SCTLR_AFE access checkAndrew Jones
2015-03-16target-arm: convert check_ap to ap_to_rw_protAndrew Jones
2015-02-13target-arm: Add 32/64-bit register syncGreg Bellows
2015-02-05target-arm: fix for exponent comparison in recpe_f64Ildar Isaev
2015-02-05target-arm: Fix brace style in reindented codePeter Maydell
2015-02-05target-arm: Reindent ancient page-table-walk codePeter Maydell
2015-02-05target-arm: Use mmu_idx in get_phys_addr()Peter Maydell
2015-02-05target-arm: Pass mmu_idx to get_phys_addr()Peter Maydell
2015-02-05target-arm: Split AArch64 cases out of ats_write()Peter Maydell
2015-02-05target-arm: Define correct mmu_idx values and pass them in TB flagsPeter Maydell
2015-02-05target-arm: Add checks that cpreg raw accesses are handledPeter Maydell
2015-02-05target-arm: Split NO_MIGRATE into ALIAS and NO_RAWPeter Maydell
2015-02-05target-arm: Add missing SP_ELx register definitionGreg Bellows
2015-02-05target-arm: Add extended RVBAR supportGreg Bellows
2015-02-05target-arm: Fix RVBAR_EL1 register encodingGreg Bellows
2015-01-15target-arm: Fix typo in comment (seperately -> separately)Stefan Weil
2014-12-22target-arm: Merge EL3 CP15 register listsGreg Bellows
2014-12-11target-arm: make MAIR0/1 bankedGreg Bellows
2014-12-11target-arm: make c13 cp regs banked (FCSEIDR, ...)Fabian Aggeler
2014-12-11target-arm: make VBAR bankedGreg Bellows
2014-12-11target-arm: make PAR bankedFabian Aggeler
2014-12-11target-arm: make IFAR/DFAR bankedFabian Aggeler
2014-12-11target-arm: make DFSR bankedFabian Aggeler
2014-12-11target-arm: make IFSR bankedFabian Aggeler
2014-12-11target-arm: make DACR bankedFabian Aggeler
2014-12-11target-arm: make TTBCR bankedFabian Aggeler
2014-12-11target-arm: make TTBR0/1 bankedFabian Aggeler
2014-12-11target-arm: make CSSELR bankedFabian Aggeler
2014-12-11target-arm: respect SCR.FW, SCR.AW and SCTLR.NMFIFabian Aggeler
2014-12-11target-arm: add SCTLR_EL3 and make SCTLR bankedFabian Aggeler
2014-12-11target-arm: add MVBAR supportFabian Aggeler
2014-12-11target-arm: add SDER definitionGreg Bellows
2014-12-11target-arm: add NSACR registerFabian Aggeler
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-25 10:41:44 +0000