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path: root/target-arm/helper.c
AgeCommit message (Expand)Author
2014-10-24target-arm: A32: Emulate the SMC instructionFabian Aggeler
2014-10-24target-arm: rename arm_current_pl to arm_current_elGreg Bellows
2014-10-24target-arm: reject switching to monitor modeSergey Fedorov
2014-10-24target-arm: Correct sense of the DCZID DZP bitPeter Maydell
2014-10-24target-arm: add emulation of PSCI calls for system emulationRob Herring
2014-10-24target-arm: do not set do_interrupt handlers for ARM and AArch64 user modesRob Herring
2014-09-29target-arm: Add support for VIRQ and VFIQEdgar E. Iglesias
2014-09-29target-arm: Add IRQ and FIQ routing to EL2 and 3Edgar E. Iglesias
2014-09-29target-arm: A64: Emulate the SMC insnEdgar E. Iglesias
2014-09-29target-arm: Add a Hypervisor Trap exception typeEdgar E. Iglesias
2014-09-29target-arm: A64: Emulate the HVC insnEdgar E. Iglesias
2014-09-29target-arm: A64: Refactor aarch64_cpu_do_interruptEdgar E. Iglesias
2014-09-29target-arm: Add SCR_EL3Edgar E. Iglesias
2014-09-29target-arm: Add HCR_EL2Edgar E. Iglesias
2014-09-29target-arm: Don't handle c15_cpar changes via tb_flush()Peter Maydell
2014-09-29target-arm: Implement setting guest breakpointsPeter Maydell
2014-09-12target-arm: Make *IS TLB maintenance ops affect all CPUsPeter Maydell
2014-09-12target-arm: Push legacy wildcard TLB ops back into v6Peter Maydell
2014-09-12target-arm: Implement minimal DBGVCR, OSDLR_EL1, MDCCSR_EL0Peter Maydell
2014-09-12target-arm: Remove comment about MDSCR_EL1 being dummy implementationPeter Maydell
2014-09-12target-arm: Set DBGDSCR.MOE for debug exceptions taken to AArch32Peter Maydell
2014-09-12target-arm: Implement handling of fired watchpointsPeter Maydell
2014-09-12target-arm: Move extended_addresses_enabled() to internals.hPeter Maydell
2014-09-12target-arm: Implement setting of watchpointsPeter Maydell
2014-08-29target-arm: Implement pmccfiltr_write functionAlistair Francis
2014-08-29target-arm: Remove old code and replace with new functionsAlistair Francis
2014-08-29target-arm: Implement pmccntr_sync functionAlistair Francis
2014-08-29target-arm: Add arm_ccnt_enabled functionAlistair Francis
2014-08-29target-arm: Implement PMCCNTR_EL0 and related registersAlistair Francis
2014-08-29arm: Implement PMCCNTR 32b read-modify-writePeter Crosthwaite
2014-08-29target-arm: Make the ARM PMCCNTR register 64-bitAlistair Francis
2014-08-19target-arm: Implement MDSCR_EL1 as having statePeter Maydell
2014-08-19target-arm: Correctly handle PSTATE.SS when taking exception to AArch32Peter Maydell
2014-08-19target-arm: Adjust debug ID registers per-CPUPeter Maydell
2014-08-19target-arm: Provide both 32 and 64 bit versions of debug registersPeter Maydell
2014-08-19target-arm: Allow STATE_BOTH reginfo descriptions for more than cp14Peter Maydell
2014-08-19target-arm: Collect up the debug cp register definitionsPeter Maydell
2014-08-04target-arm: A64: fix TLB flush instructionsAlex Bennée
2014-08-04target-arm: don't hardcode mask values in arm_cpu_handle_mmu_faultAlex Bennée
2014-08-04target-arm: Fix bit test in sp_el0_accessStefan Weil
2014-08-04target-arm: Add FAR_EL2 and 3Edgar E. Iglesias
2014-08-04target-arm: Add ESR_EL2 and 3Edgar E. Iglesias
2014-08-04target-arm: Make far_el1 an arrayEdgar E. Iglesias
2014-06-24Fix new typos (found by codespell)Stefan Weil
2014-06-19target-arm: Add ULL suffix to calculation of page sizePeter Maydell
2014-06-19target-arm: implement PD0/PD1 bits for TTBCRFabian Aggeler
2014-06-09target-arm: Fix errors in writes to generic timer control registersPeter Maydell
2014-06-09target-arm: A32/T32: Mask CRC value in calling code, not helperPeter Maydell
2014-06-09target-arm: Correct handling of UXN bit in ARMv8 LPAE page tablesIan Campbell
2014-06-09target-arm: Prepare cpreg writefns/readfns for EL3/SecExtFabian Aggeler
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