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path: root/target-alpha/op_helper.c
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2010-04-27target-alpha: Implement RPCC.Richard Henderson
A minimal implementation that more or less corresponds to the user-level version used by target-i386. More hoops will want to be jumped through when alpha gets system-level emulation. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27target-alpha: Fix load-locked/store-conditional.Richard Henderson
Use an exception plus start_exclusive to implement the compare-and-swap. This follows the example set by the MIPS and PPC ports. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27target-alpha: Implement cvtlq inline.Richard Henderson
It's a simple shift and mask sequence. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27target-alpha: Implement rs/rc properly.Richard Henderson
This is a per-cpu flag; there's no need for a spinlock of any kind. We were also failing to manipulate the flag with $31 as a target reg and failing to clear the flag on execution of a return-from-interrupt instruction. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27target-alpha: Implement cpys{, n, e} inline.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-10target-alpha: Implement cvtql inline.Richard Henderson
It's a simple mask and shift sequence. Also, fix a typo in the actual masks used. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-28target-alpha: Implement IEEE FP qualifiers.Richard Henderson
IEEE FP instructions are split up so that the rounding mode coming from the instruction and exceptions (both masking and delivery) are handled external to the base FP operation. FP exceptions are properly raised for non-finite inputs to instructions that do not indicate software completion. A shortcut is applied if CONFIG_SOFTFLOAT_INLINE is defined at the top of translate.c: data is loaded and stored into FP_STATUS directly instead of using the functional interface defined by "softfloat.h". Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-23target-alpha: Mark helper_excp as NORETURN.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-23target-alpha: Clean up arithmetic traps.Richard Henderson
Replace the EXCP_ARITH_OVERFLOW placeholder with the complete set of bits from the EXC_SUM IPR. Use them in the existing places where we raise arithmetic exceptions. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-17target-alpha: Fix float32_to_s vs zero exponent.Richard Henderson
There was a bug in float32_to_s that incorrectly mapped a zero exponent to 0x38. This meant 0.0f != 0. At the same time, fix a generic type punning bug in helper_memory_to_s and helper_s_to_memory. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-17target-alpha: Fix cvtlq.Richard Henderson
We were missing the 0xc0000000 mask, leading to incorrect results. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-17target-alpha: Implement fp branch/cmov inline.Richard Henderson
The old fcmov implementation had a typo: - tcg_gen_mov_i64(cpu_fir[rc], cpu_fir[ra]); which moved the condition, not the second source, to the destination. But it's also easy to implement the simplified fp comparison inline. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13target-alpha: Expand ins*h inline.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13target-alpha: Expand msk*h inline.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13target-alpha: Expand msk*l inline.Richard Henderson
Similar in difficulty to ext*l, already expanded. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13target-alpha: Expand ins*l inline.Richard Henderson
Similar in difficulty to ext*l, already expanded. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13target-alpha: Implement missing MVI instructions.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13target-alpha: Fixes for alpha-linux syscalls.Richard Henderson
1. Add correct definitions of error numbers. 2. Implement SYS_osf_sigprocmask 3. Implement SYS_osf_get/setsysinfo for IEEE_FP_CONTROL. This last requires exposing the FPCR value to do_syscall. Since this value is actually split up into the float_status, expose routines from helper.c to access it. Finally, also add a float_exception_mask field to float_status. We don't actually use it to control delivery of exceptions to the emulator yet, but simply hold the value that we placed there when loading/storing the FPCR. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13target-alpha: Remove bogus DO_TB_FLUSH code from translator.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Get rid of _t suffixmalc
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
2009-09-21Add 'static' to please SparseBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-16Replace always_inline with inlineBlue Swirl
We define inline as always_inline. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-04-10target-alpha: remove amask helperaurel32
The direct use of helper_amask in translate.c was bogus (as env is not assigned). Directly code amask in tcg and remove the helper. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7075 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-10target-alpha: remove helper_load_implveraurel32
There is no need to use an helper. Directly load the value with tcg code. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7074 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-10target-alpha: overflow condition for sublv and subqvaurel32
The conditions to detect overflow in sub operations was wrong. This patch is necessary to boot Tru64. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7073 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-29target-alpha: tb_flush helper should flush the tb (and not the tlb).aurel32
Looks to be a typo fix. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6926 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel32
The attached patch updates the FSF address in the GPL/LGPL boilerplate in most GPL/LGPLed files, and also in COPYING.LIB. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-21target-alpha: use CPU_Float/CPU_Double instead of ugly castsaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5771 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-17TCG variable type checking.pbrook
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-10target-alpha: fix cmpbge instructionaurel32
The cmpbge instruction should compare all 8 bytes of one 64-bit value with another. However, we were looping with a < 7 condition which was skipping the top byte. So if we were doing a compare where the top byte was important, we could get the wrong result (this notably breaks the strlen() function with certain sized strings). (Vince Weaver) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5667 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-30target-alpha: convert palcode ops to TCGaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5360 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-29target-alpha: convert FP ops to TCGaurel32
- Convert FP ops to TCG - Fix S format - Implement F and G formats (untested) - Fix MF_FPCR an MT_FPCR - Fix FTOIS, FTOIT, ITOFF, ITOFS, ITOFT - Fix CPYSN, CPYSE Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5354 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-18target-alpha: convert remaining arith3 functions to TCGaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5254 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-18target-alpha: switch a few helpers to TCGaurel32
Switch a few helpers to TCG and implement RC and RS instructions Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5247 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-17target-alpha: convert byte manipulation instructions to TCGaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5246 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-16target-alpha: convert arith2 instructions to TCGaurel32
Replace gen_arith2 generic macro and dyngon ops by instruction specific optimized TCG code. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5235 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25Fix off-by-one unwinding error.pbrook
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-01 Fix Sparc host compile problem reported by Shaddy Baddahblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3750 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11fixed invalid typebellard
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3582 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-29Adjust s390 addresses (the MSB is defined as "to be ignored").ths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-28Make Alpha and PowerPC targets use shared helpersj_mayer
for clz, clo, ctz, cto and ctpop. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3466 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-28Alpha coding style and inlining fixes.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3462 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-25Use host-utils for Alpha 64x64 bits multiplications.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3443 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14Generate micro-ops for Alpha executive and supervisor modes.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3385 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14Replace is_user variable with mmu_idx in softmmu core,j_mayer
allowing support of more than 2 mmu access modes. Add backward compatibility is_user variable in targets code when needed. Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions. Implement per target mmu modes definitions. As an example, add PowerPC hypervisor mode definition and Alpha executive and kernel modes definitions. Optimize PowerPC case, precomputing mmu_idx when MSR register changes and using the same definition in code translation code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05Alpha architecture emulation core.j_mayer
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2597 c046a42c-6fe2-441c-8c8c-71466251a162
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