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path: root/target-alpha/op_helper.c
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2011-05-31target-alpha: Implement TLB flush primitives.Richard Henderson
Expose these via MTPR, more or less like the real HW does. Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31target-alpha: Use a fixed frequency for the RPCC in system mode.Richard Henderson
Also include the PCC_OFS in the return value. For user mode we can pretend the PCC_OFS value is always zero. Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31target-alpha: Trap for unassigned and unaligned addresses.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31target-alpha: Swap shadow registers moving to/from PALmode.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31target-alpha: Use do_restore_state for arithmetic exceptions.Richard Henderson
This gets the PC right after an arithmetic exception. Also tidies the code in the TLB fault handlers to use common code. Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31target-alpha: Tidy up arithmetic exceptions.Richard Henderson
Introduce and use arith_excp, filling in the trap_arg[01] IPRs. Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31target-alpha: Rationalize internal processor registers.Richard Henderson
Delete all the code that tried to emulate the real IPRs of some unnamed CPU. Replace those with just 3 slots that we can use to communicate trap information between the helper functions that signal exceptions and the OS trap handler. Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31target-alpha: Merge HW_REI and HW_RET implementations.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31target-alpha: Fix translation of PALmode memory insns.Richard Henderson
All of the "raw" memory accesses should be "phys" instead. Fix some confusion about argument ordering of the store routines. Fix the implementation of store-conditional. Delete the "alt-mode" helpers. Because we only implement two mmu modes, let /a imply user-mode unconditionally. Leave some combinations of virt access without permission checks as unimplemented. There are too many hoops through which to jump, and these insns will not be needed in the emulation palcode. Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-04-20Remove unused function parameter from cpu_restore_stateStefan Weil
The previous patch removed the need for parameter puc. Is is now unused, so remove it. Cc: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-04-17softfloat: rename float*_eq() into float*_eq_quiet()Aurelien Jarno
float*_eq functions have a different semantics than other comparison functions. Fix that by first renaming float*_quiet() into float*_eq_quiet(). Note that it is purely mechanical, and the behaviour should be unchanged. That said it clearly highlight problems due to this different semantics, they are fixed later in this patch series. Cc: Alexander Graf <agraf@suse.de> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17target-alpha: use new float64_unordered_quiet() functionAurelien Jarno
Use float64_unordered_quiet() in helper_cmptun() instead of doing the the comparison manually. According to the "Alpha Compiler Writer's Guide", we should use the _quiet version here, as CMPTUN and CMPTEQ should generate InvalidOp for SNaNs but not for QNaNs. Thanks to Peter Maydell <peter.maydell@linaro.org> and Richard Henderson <rth@twiddle.net> for digging into the manuals. Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-02softfloat: Rename float*_is_nan() functions to float*_is_quiet_nan()Peter Maydell
The softfloat functions float*_is_nan() were badly misnamed, because they return true only for quiet NaNs, not for all NaNs. Rename them to float*_is_quiet_nan() to more accurately reflect what they do. This change was produced by: perl -p -i -e 's/_is_nan/_is_quiet_nan/g' $(git grep -l is_nan) (with the results manually checked.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Nathan Froyd <froydnj@codesourcery.com> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27target-alpha: Implement RPCC.Richard Henderson
A minimal implementation that more or less corresponds to the user-level version used by target-i386. More hoops will want to be jumped through when alpha gets system-level emulation. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27target-alpha: Fix load-locked/store-conditional.Richard Henderson
Use an exception plus start_exclusive to implement the compare-and-swap. This follows the example set by the MIPS and PPC ports. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27target-alpha: Implement cvtlq inline.Richard Henderson
It's a simple shift and mask sequence. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27target-alpha: Implement rs/rc properly.Richard Henderson
This is a per-cpu flag; there's no need for a spinlock of any kind. We were also failing to manipulate the flag with $31 as a target reg and failing to clear the flag on execution of a return-from-interrupt instruction. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27target-alpha: Implement cpys{, n, e} inline.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-10target-alpha: Implement cvtql inline.Richard Henderson
It's a simple mask and shift sequence. Also, fix a typo in the actual masks used. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-28target-alpha: Implement IEEE FP qualifiers.Richard Henderson
IEEE FP instructions are split up so that the rounding mode coming from the instruction and exceptions (both masking and delivery) are handled external to the base FP operation. FP exceptions are properly raised for non-finite inputs to instructions that do not indicate software completion. A shortcut is applied if CONFIG_SOFTFLOAT_INLINE is defined at the top of translate.c: data is loaded and stored into FP_STATUS directly instead of using the functional interface defined by "softfloat.h". Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-23target-alpha: Mark helper_excp as NORETURN.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-23target-alpha: Clean up arithmetic traps.Richard Henderson
Replace the EXCP_ARITH_OVERFLOW placeholder with the complete set of bits from the EXC_SUM IPR. Use them in the existing places where we raise arithmetic exceptions. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-17target-alpha: Fix float32_to_s vs zero exponent.Richard Henderson
There was a bug in float32_to_s that incorrectly mapped a zero exponent to 0x38. This meant 0.0f != 0. At the same time, fix a generic type punning bug in helper_memory_to_s and helper_s_to_memory. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-17target-alpha: Fix cvtlq.Richard Henderson
We were missing the 0xc0000000 mask, leading to incorrect results. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-17target-alpha: Implement fp branch/cmov inline.Richard Henderson
The old fcmov implementation had a typo: - tcg_gen_mov_i64(cpu_fir[rc], cpu_fir[ra]); which moved the condition, not the second source, to the destination. But it's also easy to implement the simplified fp comparison inline. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13target-alpha: Expand ins*h inline.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13target-alpha: Expand msk*h inline.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13target-alpha: Expand msk*l inline.Richard Henderson
Similar in difficulty to ext*l, already expanded. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13target-alpha: Expand ins*l inline.Richard Henderson
Similar in difficulty to ext*l, already expanded. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13target-alpha: Implement missing MVI instructions.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13target-alpha: Fixes for alpha-linux syscalls.Richard Henderson
1. Add correct definitions of error numbers. 2. Implement SYS_osf_sigprocmask 3. Implement SYS_osf_get/setsysinfo for IEEE_FP_CONTROL. This last requires exposing the FPCR value to do_syscall. Since this value is actually split up into the float_status, expose routines from helper.c to access it. Finally, also add a float_exception_mask field to float_status. We don't actually use it to control delivery of exceptions to the emulator yet, but simply hold the value that we placed there when loading/storing the FPCR. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13target-alpha: Remove bogus DO_TB_FLUSH code from translator.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Get rid of _t suffixmalc
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
2009-09-21Add 'static' to please SparseBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-16Replace always_inline with inlineBlue Swirl
We define inline as always_inline. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-04-10target-alpha: remove amask helperaurel32
The direct use of helper_amask in translate.c was bogus (as env is not assigned). Directly code amask in tcg and remove the helper. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7075 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-10target-alpha: remove helper_load_implveraurel32
There is no need to use an helper. Directly load the value with tcg code. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7074 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-10target-alpha: overflow condition for sublv and subqvaurel32
The conditions to detect overflow in sub operations was wrong. This patch is necessary to boot Tru64. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7073 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-29target-alpha: tb_flush helper should flush the tb (and not the tlb).aurel32
Looks to be a typo fix. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6926 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel32
The attached patch updates the FSF address in the GPL/LGPL boilerplate in most GPL/LGPLed files, and also in COPYING.LIB. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-21target-alpha: use CPU_Float/CPU_Double instead of ugly castsaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5771 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-17TCG variable type checking.pbrook
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-10target-alpha: fix cmpbge instructionaurel32
The cmpbge instruction should compare all 8 bytes of one 64-bit value with another. However, we were looping with a < 7 condition which was skipping the top byte. So if we were doing a compare where the top byte was important, we could get the wrong result (this notably breaks the strlen() function with certain sized strings). (Vince Weaver) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5667 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-30target-alpha: convert palcode ops to TCGaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5360 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-29target-alpha: convert FP ops to TCGaurel32
- Convert FP ops to TCG - Fix S format - Implement F and G formats (untested) - Fix MF_FPCR an MT_FPCR - Fix FTOIS, FTOIT, ITOFF, ITOFS, ITOFT - Fix CPYSN, CPYSE Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5354 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-18target-alpha: convert remaining arith3 functions to TCGaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5254 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-18target-alpha: switch a few helpers to TCGaurel32
Switch a few helpers to TCG and implement RC and RS instructions Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5247 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-17target-alpha: convert byte manipulation instructions to TCGaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5246 c046a42c-6fe2-441c-8c8c-71466251a162
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