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2021-02-18Hexagon (linux-user/hexagon) Linux user emulationTaylor Simpson
Implementation of Linux user emulation for Hexagon Some common files modified in addition to new files in linux-user/hexagon Acked-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1612763186-18161-31-git-send-email-tsimpson@quicinc.com> [rth: Fix termbits.h on review by Laurent] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-02-16linux-user/aarch64: Signal SEGV_MTEAERR for async tag check errorRichard Henderson
The real kernel collects _TIF_MTE_ASYNC_FAULT into the current thread's state on any kernel entry (interrupt, exception etc), and then delivers the signal in advance of resuming the thread. This means that while the signal won't be delivered immediately, it will not be delayed forever -- at minimum it will be delivered after the next clock interrupt. We don't have a clock interrupt in linux-user, so we issue a cpu_kick to signal a return to the main loop at the end of the current TB. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-29-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16linux-user/aarch64: Signal SEGV_MTESERR for sync tag check faultRichard Henderson
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-28-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16linux-user/aarch64: Pass syndrome to EXC_*_ABORTRichard Henderson
A proper syndrome is required to fill in the proper si_code. Use page_get_flags to determine permission vs translation for user-only. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-27-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16linux-user/aarch64: Implement PROT_MTERichard Henderson
Remember the PROT_MTE bit as PAGE_MTE/PAGE_TARGET_2. Otherwise this does not yet have effect. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-25-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16linux-user/aarch64: Implement PR_MTE_TCF and PR_MTE_TAGRichard Henderson
These prctl fields are required for the function of MTE. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-24-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLERichard Henderson
This is the prctl bit that controls whether syscalls accept tagged addresses. See Documentation/arm64/tagged-address-abi.rst in the linux kernel. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-21-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16linux-user: Handle tags in lock_user/unlock_userRichard Henderson
Resolve the untagged address once, using thread_cpu. Tidy the DEBUG_REMAP code using glib routines. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-20-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16linux-user: Fix types in uaccess.cRichard Henderson
For copy_*_user, only 0 and -TARGET_EFAULT are returned; no need to involve abi_long. Use size_t for lengths. Use bool for the lock_user copy argument. Use ssize_t for target_strlen, because we can't overflow the host memory space. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210212184902.1251044-19-richard.henderson@linaro.org [PMM: moved fix for ifdef error to previous commit] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16linux-user: Move lock_user et al out of lineRichard Henderson
These functions are not small, except for unlock_user without debugging enabled. Move them out of line, and add missing braces on the way. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210212184902.1251044-18-richard.henderson@linaro.org [PMM: fixed the sense of an ifdef test in qemu.h] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16linux-user: Use cpu_untagged_addr in access_ok; split out *_untaggedRichard Henderson
Provide both tagged and untagged versions of access_ok. In a few places use thread_cpu, as the user is several callees removed from do_syscall1. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-17-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16exec: Rename guest_{addr,range}_valid to *_untaggedRichard Henderson
The places that use these are better off using untagged addresses, so do not provide a tagged versions. Rename to make it clear about the address type. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-16-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16linux-user: Use guest_range_valid in access_okRichard Henderson
We're currently open-coding the range check in access_ok; use guest_range_valid when size != 0. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-15-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16linux-user: Explicitly untag memory management syscallsRichard Henderson
We define target_mmap et al as untagged, so that they can be used from the binary loaders. Explicitly call cpu_untagged_addr for munmap, mprotect, mremap syscall entry points. Add a few comments for the syscalls that are exempted by the kernel's tagged-address-abi.rst. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-14-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16exec: Use cpu_untagged_addr in g2h; split out g2h_untaggedRichard Henderson
Use g2h_untagged in contexts that have no cpu, e.g. the binary loaders that operate before the primary cpu is created. As a colollary, target_mmap and friends must use untagged addresses, since they are used by the loaders. Use g2h_untagged on values returned from target_mmap, as the kernel never applies a tag itself. Use g2h_untagged on all pc values. The only current user of tags, aarch64, removes tags from code addresses upon branch, so "pc" is always untagged. Use g2h with the cpu context on hand wherever possible. Use g2h_untagged in lock_user, which will be updated soon. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-13-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16linux-user: Tidy VERIFY_READ/VERIFY_WRITERichard Henderson
These constants are only ever used with access_ok, and friends. Rather than translating them to PAGE_* bits, let them equal the PAGE_* bits to begin. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-8-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16linux-user: Check for overflow in access_okRichard Henderson
Verify that addr + size - 1 does not wrap around. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-7-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16exec: Use uintptr_t for guest_baseRichard Henderson
This is more descriptive than 'unsigned long'. No functional change, since these match on all linux+bsd hosts. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210212184902.1251044-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16linux-user: Introduce PAGE_ANONRichard Henderson
Record whether the backing page is anonymous, or if it has file backing. This will allow us to get close to the Linux AArch64 ABI for MTE, which allows tag memory only on ram-backed VMAs. The real ABI allows tag memory on files, when those files are on ram-backed filesystems, such as tmpfs. We will not be able to implement that in QEMU linux-user. Thankfully, anonymous memory for malloc arenas is the primary consumer of this feature, so this restricted version should still be of use. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-16tcg: Introduce target-specific page data for user-onlyRichard Henderson
This data can be allocated by page_alloc_target_data() and released by page_set_flags(start, end, prot | PAGE_RESET). This data will be used to hold tag memory for AArch64 MTE. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-02-15linux-user/mips: Support the n32 ABI for the R5900Fredrik Noring
Recognise the R5900, which reports itself as MIPS III, as a 64-bit CPU supporting the n32 ABI. Signed-off-by: Fredrik Noring <noring@nocrew.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <5bea109f0c140da6a821aa7f9705d4b3717e86dc.1541701393.git.noring@nocrew.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-02-13linux-user: target: signal: Support TARGET_SS_AUTODISARMChen Gang
Add definitions to pass building. Signed-off-by: Chen Gang <chengang@emindsoft.com.cn> Message-Id: <20201008043105.21058-1-chengang@emindsoft.com.cn> [lv: added the definitions in linux-user/generic/signal.h too] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-02-13linux-user: add TARGET_SO_{DOMAIN,PROTOCOL}Jason A. Donenfeld
These were defined for other platforms but mistakenly left out of mips and generic, so this commit adds them to the places missing. Then it makes them be translated in getsockopt. Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210204153925.2030606-1-Jason@zx2c4.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-02-13linux-user/syscall: Fix do_ioctl_ifconf() for 64 bit targets.Stefan
The sizeof(struct ifreq) is 40 for 64 bit and 32 for 32 bit architectures. This structure contains a union of other structures, of which struct ifmap is the biggest for 64 bit architectures. Calling ioclt(…, SIOCGIFCONF, …) fills a struct sockaddr of that union, and do_ioctl_ifconf() only considered that struct sockaddr for the size of the union, which has the same size as struct ifmap on 32 bit architectures. So do_ioctl_ifconf() assumed a wrong size of 32 for struct ifreq instead of the correct size of 40 on 64 bit architectures. The fix makes do_ioctl_ifconf() handle struct ifmap as the biggest part of the union, treating struct ifreq with the correct size. Signed-off-by: Stefan <stefan-guix@vodafonemail.de> Message-Id: <60AA0765-53DD-43D1-A3D2-75F1778526F6@vodafonemail.de> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-02-13linux-user/mmap: Avoid asserts for out of range mremap callsRichard Purdie
If mremap() is called without the MREMAP_MAYMOVE flag with a start address just before the end of memory (reserved_va) where new_size would exceed it (and GUEST_ADDR_MAX), the assert(end - 1 <= GUEST_ADDR_MAX) in  page_set_flags() would trigger. Add an extra guard to the guest_range_valid() checks to prevent this and avoid asserting binaries when reserved_va is set. This meant a bug I was seeing locally now gives the same behaviour  regardless of whether reserved_va is set or not. Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <70c46e7b999bafbb01d54bfafd44b420d0b782e9.camel@linuxfoundation.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-02-13linux-user: Fix loading of BSS segmentsGiuseppe Musacchio
Some ELF binaries encode the .bss section as an extension of the data ones by setting the segment p_memsz > p_filesz. Some other binaries take a different route and encode it as a stand-alone PT_LOAD segment with p_filesz = 0 and p_memsz > 0. Both the encodings are actually correct per ELF specification but the ELF loader had some troubles in handling the former: with the old logic it was very likely to get Qemu to crash in zero_bss when trying to access unmapped memory. zero_bss isn't meant to allocate whole zero-filled segments but to "complete" a previously mapped segment with the needed zero bits. The fix is pretty simple, if the segment is completely zero-filled we simply allocate one or more pages (according to p_memsz) and avoid calling zero_bss altogether. Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com> Message-Id: <c9106487-dc4d-120a-bd48-665b3c617287@gmail.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-02-13linux-user: fix O_NONBLOCK in signalfd4() and eventfd2() syscallsHelge Deller
On the hppa target userspace binaries may call signalfd4() and eventfd2() with an old TARGET_O_NONBLOCK value of 000200004 instead of 000200000 for the "mask" syscall parameter, in which case the current emulation doesn't handle the translation to the native O_NONBLOCK value correctly. The 0x04 bit is not masked out before the new O_NONBLOCK bit is set and as such when calling the native syscall errors out with EINVAL. Fix this by introducing TARGET_O_NONBLOCK_MASK which is used to mask off all possible bits. This define defaults to TARGET_O_NONBLOCK when not defined otherwise, so for all other targets the implementation will behave as before. This patch needs to be applied on top of my previous two patches. Bug was found and patch was verified by using qemu-hppa as debian buildd server on x86_64. Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210210061214.GA221322@ls3530.fritz.box> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-02-13linux-user: fix O_NONBLOCK usage for hppa targetHelge Deller
Historically the parisc linux port tried to be compatible with HP-UX userspace and as such defined the O_NONBLOCK constant to 0200004 to emulate separate NDELAY & NONBLOCK values. Since parisc was the only Linux platform which had two bits set, this produced various userspace issues. Finally it was decided to drop the (never completed) HP-UX compatibilty, which is why O_NONBLOCK was changed upstream to only have one bit set in future with this commit: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=75ae04206a4d0e4f541c1d692b7febd1c0fdb814 This patch simply adjusts the value for qemu-user too. Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210201220551.GA8015@ls3530.fritz.box> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-02-13linux-user: Add missing TARGET___O_TMPFILE for hppa and alphaHelge Deller
The hppa and alpha targets miss the #define of the TARGET___O_TMPFILE and as such fail to run a trivial symlink command like ln -s /bin/bash /tmp which results in an -EINVAL return code. Adding the define fixes the problem. Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210201155922.GA18291@ls3530.fritz.box> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-02-13linux-user/signal: Decode waitid si_codeAlistair Francis
When mapping the host waitid status to the target status we previously just used decoding information in the status value. This doesn't follow what the waitid documentation describes, which instead suggests using the si_code value for the decoding. This results in the incorrect values seen when calling waitid. This is especially apparent on RV32 where all wait calls use waitid (see the bug case). This patch just passes the waitid status directly back to the guest. Buglink: https://bugs.launchpad.net/qemu/+bug/1906193 Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Tested-by: Andreas K. Hüttel <dilfridge@gentoo.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <1fb2d56aa23a81f4473e638abe9e2d78c09a3d5b.1611080607.git.alistair.francis@wdc.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-02-13linux-user/mips64: Support o32 ABI syscallsPhilippe Mathieu-Daudé
o32 ABI syscalls start at offset 4000. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20201119161710.1985083-3-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-02-13linux-user/mips64: Restore setup_frame() for o32 ABIPhilippe Mathieu-Daudé
64-bit MIPS targets lost setup_frame() during the refactor in commit 8949bef18b9. Restore it declaring TARGET_ARCH_HAS_SETUP_FRAME, to be able to build the o32 ABI target. Fixes: 8949bef18b9 ("linux-user: move mips/mips64 signal.c parts to mips directory") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20201119161710.1985083-2-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-02-05accel: replace struct CpusAccel with AccelOpsClassClaudio Fontana
This will allow us to centralize the registration of the cpus.c module accelerator operations (in accel/accel-softmmu.c), and trigger it automatically using object hierarchy lookup from the new accel_init_interfaces() initialization step, depending just on which accelerators are available in the code. Rename all tcg-cpus.c, kvm-cpus.c, etc to tcg-accel-ops.c, kvm-accel-ops.c, etc, matching the object type names. Signed-off-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20210204163931.7358-18-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-02-05accel: extend AccelState and AccelClass to user-modeClaudio Fontana
Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> [claudio: rebased on Richard's splitwx work] Signed-off-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20210204163931.7358-17-cfontana@suse.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-01-21linux-user: Remove obsolete F_SHLCK and F_EXLCK translationMichael Forney
These lock types are unsupported by Linux since v2.2[0][1] and always return EINVAL (except on SPARC up until v2.6, which just warned). musl libc does not define these constants, so just remove them from the translation cases. [0] https://github.com/mpe/linux-fullhistory/blob/v2.2.0/fs/locks.c#L322-L324 [1] https://github.com/mpe/linux-fullhistory/blob/v2.2.0/fs/locks.c#L429-L445 Signed-off-by: Michael Forney <mforney@mforney.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20210114223602.9004-1-mforney@mforney.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-01-21linux-user: Add IPv6 options to do_print_sockopt()Shu-Chun Weng
Signed-off-by: Shu-Chun Weng <scw@google.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20201218193213.3566856-5-scw@google.com> [lv: Add missing <linux/in6.h> include for IPV6_ADDR_PREFERENCES] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-01-20linux-user: add missing IPv6 get/setsockopt optionShu-Chun Weng
IPV6_ADDR_PREFERENCES (RFC5014: Source address selection) was not supported. Signed-off-by: Shu-Chun Weng <scw@google.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20201218193213.3566856-4-scw@google.com> [PMD: Add missing <linux/in6.h> include for IPV6_ADDR_PREFERENCES] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-01-20linux-user: add missing UDP get/setsockopt optionShu-Chun Weng
SOL_UDP manipulate options at UDP level. All six options currently defined in linux source include/uapi/linux/udp.h take integer values. Signed-off-by: Shu-Chun Weng <scw@google.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20201218193213.3566856-3-scw@google.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-01-20linux-user: Support F_ADD_SEALS and F_GET_SEALS fcntlsShu-Chun Weng
Also reorder blocks so that they are all in the same order everywhere. Signed-off-by: Shu-Chun Weng <scw@google.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20201218193213.3566856-2-scw@google.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-01-18riscv: Add semihosting support for user modeKito Cheng
This could made testing more easier and ARM/AArch64 has supported on their linux user mode too, so I think it should be reasonable. Verified GCC testsuite with newlib/semihosting. Signed-off-by: Kito Cheng <kito.cheng@sifive.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Keith Packard <keithp@keithp.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210107170717.2098982-7-keithp@keithp.com> Message-Id: <20210108224256.2321-18-alex.bennee@linaro.org>
2021-01-18riscv: Add semihosting supportKeith Packard
Adapt the arm semihosting support code for RISCV. This implementation is based on the standard for RISC-V semihosting version 0.2 as documented in https://github.com/riscv/riscv-semihosting-spec/releases/tag/0.2 Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20210107170717.2098982-6-keithp@keithp.com> Message-Id: <20210108224256.2321-17-alex.bennee@linaro.org>
2021-01-18semihosting: Change common-semi API to be architecture-independentKeith Packard
The public API is now defined in hw/semihosting/common-semi.h. do_common_semihosting takes CPUState * instead of CPUARMState *. All internal functions have been renamed common_semi_ instead of arm_semi_ or arm_. Aside from the API change, there are no functional changes in this patch. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20210107170717.2098982-3-keithp@keithp.com> Message-Id: <20210108224256.2321-14-alex.bennee@linaro.org>
2021-01-18semihosting: Move ARM semihosting code to shared directoriesKeith Packard
This commit renames two files which provide ARM semihosting support so that they can be shared by other architectures: 1. target/arm/arm-semi.c -> hw/semihosting/common-semi.c 2. linux-user/arm/semihost.c -> linux-user/semihost.c The build system was modified use a new config variable, CONFIG_ARM_COMPATIBLE_SEMIHOSTING, which has been added to the ARM softmmu and linux-user default configs. The contents of the source files has not been changed in this patch. Signed-off-by: Keith Packard <keithp@keithp.com> [AJB: rename arm-compat-semi, select SEMIHOSTING] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210107170717.2098982-2-keithp@keithp.com> Message-Id: <20210108224256.2321-13-alex.bennee@linaro.org>
2021-01-18gdbstub: drop CPUEnv from gdb_exit()Alex Bennée
gdb_exit() has never needed anything from env and I doubt we are going to start now. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210108224256.2321-8-alex.bennee@linaro.org>
2021-01-14target/mips: Extract FPU helpers to 'fpu_helper.h'Philippe Mathieu-Daudé
Extract FPU specific helpers from "internal.h" to "fpu_helper.h". Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201120210844.2625602-2-f4bug@amsat.org>
2021-01-14target/mips/mips-defs: Rename ISA_MIPS32R6 as ISA_MIPS_R6Philippe Mathieu-Daudé
The MIPS ISA release 6 is common to 32/64-bit CPUs. To avoid holes in the insn_flags type, update the definition with the next available bit. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210104221154.3127610-16-f4bug@amsat.org>
2021-01-14target/mips/mips-defs: Rename ISA_MIPS32R2 as ISA_MIPS_R2Philippe Mathieu-Daudé
The MIPS ISA release 2 is common to 32/64-bit CPUs. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210104221154.3127610-13-f4bug@amsat.org>
2021-01-14target/mips/mips-defs: Use ISA_MIPS32R6 definition to check Release 6Philippe Mathieu-Daudé
Use the single ISA_MIPS32R6 definition to check if the Release 6 ISA is supported, whether the CPU support 32/64-bit. For now we keep '32' in the definition name, we will rename it as ISA_MIPS_R6 in few commits. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210104221154.3127610-11-f4bug@amsat.org>
2021-01-14target/mips/mips-defs: Use ISA_MIPS32R2 definition to check Release 2Philippe Mathieu-Daudé
Use the single ISA_MIPS32R2 definition to check if the Release 2 ISA is supported, whether the CPU support 32/64-bit. For now we keep '32' in the definition name, we will rename it as ISA_MIPS_R2 in few commits. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210104221154.3127610-8-f4bug@amsat.org>
2021-01-07tcg: Add --accel tcg,split-wx propertyRichard Henderson
Plumb the value through to alloc_code_gen_buffer. This is not supported by any os or tcg backend, so for now enabling it will result in an error. Reviewed-by: Joelle van Dyne <j@getutm.app> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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