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2019-02-15linux-user/elfload: enable HWCAP_CPUID for AArch64Alex Bennée
Userspace programs should (in theory) query the ELF HWCAP before probing these registers. Now we have implemented them all make it public. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190205190224.2198-6-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-01aarch64-linux-user: Enable HWCAP bits for PAuthRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-01aarch64-linux-user: Update HWCAP bits from linux 5.0-rc1Richard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-01-11qemu/queue.h: leave head structs anonymous unless necessaryPaolo Bonzini
Most list head structs need not be given a name. In most cases the name is given just in case one is going to use QTAILQ_LAST, QTAILQ_PREV or reverse iteration, but this does not apply to lists of other kinds, and even for QTAILQ in practice this is only rarely needed. In addition, we will soon reimplement those macros completely so that they do not need a name for the head struct. So clean up everything, not giving a name except in the rare case where it is necessary. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-29linux-user: Read and set FP ABI value from MIPS abiflagsStefan Markovic
Set fp_abi and interp_fp_abi values to current fp_abi value read from MIPS.abiflags. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
2018-10-29linux-user: Extract MIPS abiflags from ELF fileStefan Markovic
Read MIPS.abiflags section from ELF file into Mips_elf_abiflags_v0 struct. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
2018-10-24target/arm: Convert v8.2-fp16 from feature bit to aa64pfr0 testRichard Henderson
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20181016223115.24100-9-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-10-24target/arm: Convert sve from feature bit to aa64pfr0 testRichard Henderson
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20181016223115.24100-8-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-10-24target/arm: Convert division from feature bits to isar0 testsRichard Henderson
Both arm and thumb2 division are controlled by the same ISAR field, which takes care of the arm implies thumb case. Having M imply thumb2 division was wrong for cortex-m0, which is v6m and does not have thumb2 at all, much less thumb2 division. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20181016223115.24100-5-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-10-24target/arm: Convert v8 extensions from feature bits to isar testsRichard Henderson
Most of the v8 extensions are self-contained within the ISAR registers and are not implied by other feature bits, which makes them the easiest to convert. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20181016223115.24100-4-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-09-28Merge remote-tracking branch ↵Peter Maydell
'remotes/vivier2/tags/linux-user-for-3.1-pull-request' into staging - some fixes for setrlimit() and write() - fixes ELF loader when host page size is greater than target page size - add SO_LINGER to getsockopt()/setsockopt() - move TargetFdTrans from syscall.c v2: add "#include <linux/netlink.h>" in linux-user/fd-trans.c # gpg: Signature made Tue 25 Sep 2018 21:51:13 BST # gpg: using RSA key F30C38BD3F2FBE3C # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" # gpg: aka "Laurent Vivier <laurent@vivier.eu>" # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-3.1-pull-request: linux-user: do setrlimit selectively linux-user: write(fd, NULL, 0) parity with linux's treatment of same linux-user: elf: mmap all the target-pages of hostpage for data segment linux-user: add SO_LINGER to {g,s}etsockopt linux-user: move TargetFdTrans functions to their own file Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-09-25linux-user: elf: mmap all the target-pages of hostpage for data segmentShivaprasad G Bhat
If the hostpage size is greater than the TARGET_PAGESIZE, the target-pages of size TARGET_PAGESIZE are marked valid only till the length requested during the elfload. The glibc attempts to consume unused space in the last page of data segment(__libc_memalign() in elf/dl-minimal.c). If PT_LOAD p_align is greater than or equal to hostpage size, the GLRO(dl_pagesize) is actually the host pagesize as set in the auxillary vectors. So, there is no explicit mmap request for the remaining target-pages on the last hostpage. The glibc assumes that particular space as available and subsequent attempts to use those addresses lead to crash as the target_mmap has not marked them valid for those target-pages. The issue is seen when trying to chroot to 16.04-x86_64 ubuntu on a PPC64 host where the fork fails to access the thread_id as it is allocated on a page not marked valid. The recent glibc doesn't have checks for thread-id in fork, but the issue can manifest somewhere else, none the less. The fix here is to map all the target-pages of the hostpage during the elfload if the p_align is greater than or equal to hostpage size, for data segment to allow the glibc for proper consumption. Signed-off-by: Shivaprasad G Bhat <sbhat@linux.vnet.ibm.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <153553435604.51992.5640085189104207249.stgit@lep8c.aus.stglabs.ibm.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-09-07target-ppc: Extend HWCAP2 bits for ISA 3.0Sandipan Das
This adds the HWCAP2 bit to detect if a linux user process is running on an ISA 3.0 compliant cpu like POWER9. This can be verified using a simple test program that prints the value in the auxiliary vector for AT_HWCAP2 as shown below. Before: $ qemu-ppc64le -cpu power8 test 0x8c000000 $ qemu-ppc64le -cpu power9 test 0x8c000000 After: $ qemu-ppc64le -cpu power8 test 0x8c000000 $ qemu-ppc64le -cpu power9 test 0x8c800000 Signed-off-by: Sandipan Das <sandipan@linux.ibm.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-08-24elf: Relax MIPS' elf_check_arch() to accept EM_NANOMIPS tooAleksandar Markovic
Starting from nanoMIPS introduction, machine variant can be EM_MIPS or EM_NANOMIPS. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
2018-07-22linux-user: fix ELF load alignment errorLaurent Vivier
When we try to use some targets on ppc64, it can happen the target doesn't support the host page size to align ELF load sections and fails with: ELF load command alignment not page-aligned Since commit a70daba3771 ("linux-user: Tell guest about big host page sizes") the host page size is used to align ELF sections, but this doesn't work if the alignment required by the load section is smaller than the host one. For these cases, we continue to use the TARGET_PAGE_SIZE instead of the host one. I have tested this change on ppc64, and it fixes qemu linux-user for: s390x, m68k, i386, arm, aarch64, hppa and I have tested it doesn't break the following targets: x86_64, mips64el, sh4 mips and mipsel abort, but I think for another reason. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [lv: fixed "info->alignment = 0"] Message-Id: <20180716195349.29959-1-laurent@vivier.eu>
2018-06-29target/arm: Implement ARMv8.2-DotProdRichard Henderson
We've already added the helpers with an SVE patch, all that remains is to wire up the aa64 and aa32 translators. Enable the feature within -cpu max for CONFIG_USER_ONLY. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180627043328.11531-36-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-29target/arm: Enable SVE for aarch64-linux-userRichard Henderson
Enable ARM_FEATURE_SVE for the generic "max" cpu. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180627043328.11531-35-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-05-10target/arm: Introduce ARM_FEATURE_V8_ATOMICS and initial decodeRichard Henderson
The insns in the ARMv8.1-Atomics are added to the existing load/store exclusive and load/store reg opcode spaces. Rearrange the top-level decoders for these to accomodate. The Atomics insns themselves still generate Unallocated. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180508151437.4232-8-richard.henderson@linaro.org [PMM: Drop the ARM_FEATURE_V8_1 feature flag] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-05-03linux-user: ARM-FDPIC: Add support of FDPIC for ARM.Christophe Lyon
Add FDPIC info into image_info structure since interpreter info is on stack and needs to be saved to be accessed later on. Co-Authored-By: Mickaël Guêné <mickael.guene@st.com> Signed-off-by: Christophe Lyon <christophe.lyon@st.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20180430080404.7323-4-christophe.lyon@st.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-05-03linux-user: ARM-FDPIC: Identify ARM FDPIC binariesChristophe Lyon
Define an ARM-specific version of elf_is_fdpic: FDPIC ELF objects are identified with e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC. Co-Authored-By: Mickaël Guêné <mickael.guene@st.com> Signed-off-by: Christophe Lyon <christophe.lyon@st.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20180430080404.7323-3-christophe.lyon@st.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-05-03Remove CONFIG_USE_FDPIC.Christophe Lyon
We want to avoid code disabled by default, because it ends up less tested. This patch removes all instances of #ifdef CONFIG_USE_FDPIC, most of which can be safely kept. For the ones that should be conditionally executed, we define elf_is_fdpic(). Without this patch, defining CONFIG_USE_FDPIC would prevent QEMU from building precisely because elf_is_fdpic is not defined. Signed-off-by: Christophe Lyon <christophe.lyon@st.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20180430080404.7323-2-christophe.lyon@st.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-04-10linux-user: implement HWCAP bits on MIPSJames Cowgill
Add support for the two currently defined HWCAP bits on MIPS - R6 and MSA. Buglink: https://bugs.launchpad.net/qemu/+bug/1754372 Signed-off-by: James Cowgill <james.cowgill@mips.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180315151348.6451-1-james.cowgill@mips.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-03-20linux-user: init_guest_space: Try to make ARM space+commpage continuousLuke Shumaker
At a fixed distance after the usable memory that init_guest_space maps, for 32-bit ARM targets we also need to map a commpage. The normal init_guest_space logic doesn't keep this in mind when searching for an address range. If !host_start, then try to find a big continuous segment where we can put both the usable memory and the commpage; we then munmap that segment and set current_start to that address; and let the normal code mmap the usable memory and the commpage separately. That is: if we don't have hint of where to start looking for memory, come up with one that is better than NULL. Depending on host_size and guest_start, there may or may not be a gap between the usable memory and the commpage, so this is slightly more restrictive than it needs to be; but it's only a hint, so that's OK. We only do that for !host start, because if host_start, then either: - we got an address passed in with -B, in which case we don't want to interfere with what the user said; - or host_start is based off of the ELF image's loaddr. The check "if (host_start && real_start != current_start)" suggests that we really want lowest available address that is >= loaddr. I don't know why that is, but I'm trusting that Paul Brook knew what he was doing when he wrote the original version of that check in c581deda322080e8beb88b2e468d4af54454e4b3 way back in 2010. Signed-off-by: Luke Shumaker <lukeshu@parabola.nu> Message-Id: <20171228180814.9749-11-lukeshu@lukeshu.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-03-17Merge remote-tracking branch 'remotes/xtensa/tags/20180316-xtensa' into stagingPeter Maydell
target/xtensa linux-user support. - small cleanup for xtensa registers dumping (-d cpu); - add support for debugging linux-user process with xtensa-linux-gdb (as opposed to xtensa-elf-gdb), which can only access unprivileged registers; - enable MTTCG for target/xtensa; - cleanup in linux-user/mmap area making sure that it works correctly with limited 30-bit-wide user address space; - import xtensa-specific definitions from the linux kernel, conditionalize user-only/softmmu-only code and add handlers for signals, exceptions, process/thread creation and core registers dumping. # gpg: Signature made Fri 16 Mar 2018 16:46:19 GMT # gpg: using RSA key 51F9CC91F83FA044 # gpg: Good signature from "Max Filippov <filippov@cadence.com>" # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20180316-xtensa: MAINTAINERS: fix W: address for xtensa qemu-binfmt-conf.sh: add qemu-xtensa target/xtensa: add linux-user support linux-user: drop unused target_msync function linux-user: fix target_mprotect/target_munmap error return values linux-user: fix assertion in shmdt linux-user: fix mmap/munmap/mprotect/mremap/shmat target/xtensa: support MTTCG target/xtensa: use correct number of registers in gdbstub target/xtensa: mark register windows in the dump target/xtensa: dump correct physical registers Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # linux-user/syscall.c
2018-03-16target/xtensa: add linux-user supportMax Filippov
Import list of syscalls from the kernel source. Conditionalize code/data that is only used with softmmu. Implement exception handlers. Implement signal hander (only the core registers for now, no coprocessors or TIE). Cc: Riku Voipio <riku.voipio@iki.fi> Cc: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-03-13linux-user: init_guest_space: Add a comment about search strategyLuke Shumaker
Signed-off-by: Luke Shumaker <lukeshu@parabola.nu> Message-Id: <20171228180814.9749-10-lukeshu@lukeshu.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-03-13linux-user: init_guest_space: Don't try to align if we'll reject itLuke Shumaker
If the ensure-alignment code gets triggered, then the "if (host_start && real_start != current_start)" check will always trigger, so save 2 syscalls and put that check first. Note that we can't just switch to using MAP_FIXED for that check, because then we couldn't differentiate between a failure because "there isn't enough space" and "there isn't enough space *here*". Signed-off-by: Luke Shumaker <lukeshu@parabola.nu> Message-Id: <20171228180814.9749-9-lukeshu@lukeshu.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-03-13linux-user: init_guest_space: Clean up control flow a bitLuke Shumaker
Instead of doing if (check1) { if (check2) { success; } } retry; Do a clearer if (!check1) { goto try_again; } if (!check2) { goto try_again; } success; try_again: retry; Besides being clearer, this makes it easier to insert more checks that need to trigger a retry on check failure, or rearrange them, or anything like that. Because some indentation is changing, "ignore space change" may be useful for viewing this patch. Signed-off-by: Luke Shumaker <lukeshu@parabola.nu> Message-Id: <20171228180814.9749-8-lukeshu@lukeshu.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [lv: modified to try again fi valid == 0, not valid == -1 (error case)] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-03-09linux-user: init_guest_commpage: Add a comment about size checkLuke Shumaker
Signed-off-by: Luke Shumaker <lukeshu@parabola.nu> Message-Id: <20171228180814.9749-7-lukeshu@lukeshu.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-03-09linux-user: init_guest_space: Clarify page alignment logicLuke Shumaker
There are 3 parts to this change: - Add a comment showing the relative sizes and positions of the blocks of memory - introduce and use new aligned_{start,size} instead of adjusting real_{start_size} - When we clean up (on failure), munmap(real_start, real_size) instead of munmap(aligned_start, aligned_size). It *shouldn't* make any difference, but I will admit that this does mean we are making the syscall with different values, so this isn't quite a no-op patch. Signed-off-by: Luke Shumaker <lukeshu@parabola.nu> Message-Id: <20171228180814.9749-6-lukeshu@lukeshu.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-03-09linux-user: init_guest_space: Correctly handle guest_start in commpage ↵Luke Shumaker
initialization init_guest_commpage needs to check if the mapped space, which ends at real_start+real_size overlaps with where it needs to put the commpage, which is (assuming sane qemu_host_page_size) guest_base + 0xffff000, where guest_base is real_start - guest_start. [guest_base][ 0xffff0000 ][commpage] [guest_base][guest_start][real_size] [commpage] [ real_start ][real_size] [commpage] ^ fail if this gap < 0 Since init_guest_commpage wants to do everything relative to guest_base (rather than real_start), it obviously needs to be comparing 0xffff0000 against guest_start+real_size, not just real_size. This bug has been present since 806d102141b99d4f1e55a97d68b7ea8c8ba3129f in 2012, but guest_start is usually 0, and prior to v2.11 real_size was usually much smaller than 0xffff0000, so it was uncommon for it to have made a difference. Signed-off-by: Luke Shumaker <lukeshu@parabola.nu> Message-Id: <20171228180814.9749-5-lukeshu@lukeshu.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-03-09linux-user: init_guest_space: Clean up if we can't initialize the commpageLuke Shumaker
We'll just exit with an error anyway, so it doesn't really matter, but it is cleaned up in all of the other places were we error out. Signed-off-by: Luke Shumaker <lukeshu@parabola.nu> Message-Id: <20171228180814.9749-4-lukeshu@lukeshu.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-03-09linux-user: Rename validate_guest_space => init_guest_commpageLuke Shumaker
init_guest_commpage is a much more honest description of what the function does. validate_guest_space not only suggests that the function has no side-effects, but also introduces confusion as to why it is only needed on 32-bit ARM targets. Signed-off-by: Luke Shumaker <lukeshu@parabola.nu> Message-Id: <20171228180814.9749-3-lukeshu@lukeshu.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-03-09linux-user: Use #if to only call validate_guest_space for 32-bit ARM targetLuke Shumaker
Instead of defining a bogus validate_guest_space that always returns 1 on targets other than 32-bit ARM, use #if blocks to only call it on 32-bit ARM targets. This makes the "normal" flow control clearer. Signed-off-by: Luke Shumaker <lukeshu@parabola.nu> Message-Id: <20171228180814.9749-2-lukeshu@lukeshu.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [lv: fix condition to "!= 1" as requested by Peter] Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-03-09linux-user: Drop unicore32 codePeter Maydell
We dropped the unicore32-linux-user target in commit 5e2b40f7271cf9 in 2016. Nobody has made any attempt to fix the issues that caused us to drop it, so remove the associated code. (The system emulation parts of unicore32 remain.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180308144733.25615-2-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2018-03-07RISC-V Linux User EmulationMichael Clark
Implementation of linux user emulation for RISC-V. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-02target/arm: Add ARM_FEATURE_V8_FCMARichard Henderson
Not enabled anywhere yet. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180228193125.20577-11-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-03-02target/arm: Add ARM_FEATURE_V8_RDMRichard Henderson
Not enabled anywhere yet. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180228193125.20577-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-03-01linux-user: Report AArch64 FP16 support via hwcap bitsPeter Maydell
Set the appropriate Linux hwcap bits to tell the guest binary if we have implemented half-precision floating point support. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2018-02-25linux-user: introduce functions to detect CPU typeYunQiang Su
Add a function to return ELF e_flags and use it to select the CPU model. Signed-off-by: YunQiang Su <syq@debian.org> [lv: split the patch and some cleanup in get_elf_eflags()] Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180220173307.25125-3-laurent@vivier.eu>
2018-02-09target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction supportArd Biesheuvel
Add support for the new ARMv8.2 SHA-3, SM3, SM4 and SHA-512 instructions to AArch64 user mode emulation. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Message-id: 20180207111729.15737-6-ard.biesheuvel@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-01-23linux-user: Add AT_SECURE auxvalMarco A L Barbosa
Signed-off-by: Marco A L Barbosa <malbarbo@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20180111183714.22834-2-malbarbo@gmail.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2017-11-20linux-user: Fix calculation of auxv lengthPeter Maydell
In commit 7c4ee5bcc82e643 we changed the order in which we construct the AUXV, but forgot to adjust the calculation of the length. The result is that we set info->auxv_len to a bogus and negative value, and then later on the code in open_self_auxv() gets confused and ends up presenting the guest with an empty file. Since we now have to calculate the auxv length up-front as part of figuring out how much we're going to put on the stack, set info->auxv_len then; this allows us to assert that we put the same number of entries into auxv as we pre-calculated, rather than merely having a comment saying we need to do that. Fixes: https://bugs.launchpad.net/qemu/+bug/1728116 Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2017-10-16linux-user: Allow -R values up to 0xffff0000 for 32-bit ARM guestsPeter Maydell
The 32-bit ARM validate_guest_space() check tests whether the specified -R value leaves enough space for us to put the commpage in at 0xffff0f00. However it was incorrectly doing a <= check for the check against (guest_base + guest_size), which meant that it wasn't permitting the guest space to butt right up against the commpage. Fix the comparison, so that -R values all the way up to 0xffff0000 work correctly. Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
2017-07-31linux-user/sh4: fix incorrect memory writePhilippe Mathieu-Daudé
not hit since 2009! :) linux-user/elfload.c:1102:20: warning: Out of bound memory access (access exceeds upper limit of memory block) (*regs[i]) = tswap32(env->gregs[i]); ~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~ Reported-by: Clang Static Analyzer Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2017-06-29linux-user: Put PPC AT_IGNOREPPC auxv entries in the right placePeter Maydell
The 32-bit PPC auxv is a bit complicated because in the mists of time it used to be 16-aligned rather than directly after the environment. Older glibc versions had code to try to probe for whether it needed alignment or not: https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c;hb=e84eabb3871c9b39e59323bf3f6b98c2ca9d1cd0 and the kernel has code which puts some magic entries at the bottom to ensure that the alignment probe fails: http://elixir.free-electrons.com/linux/latest/source/arch/powerpc/include/asm/elf.h#L158 QEMU has similar code too, but it was broken by commit 7c4ee5bcc82e64, which changed elfload.c from filling in the auxv starting at the highest address and working down to starting at the lowest address and working up. This means that the ARCH_DLINFO hook must now be invoked first rather than last, and the entries in it for PPC must be reversed so that the magic AT_IGNOREPPC entries come at the lowest address in the auxv as they should. The effect of this was that if running a guest binary that used an old glibc with the alignment probing the guest ld.so code would segfault if the size of the guest environment and argv happened to put the auxv at an address that triggered the alignment code in the guest glibc. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Tested-by: Richard Henderson <rth@twiddle.net> Message-id: 1498582198-6649-1-git-send-email-peter.maydell@linaro.org
2017-05-04target/openrisc: implement shadow registersStafford Horne
Shadow registers are part of the openrisc spec along with sr[cid], as part of the fast context switching feature. When exceptions occur, instead of having to save registers to the stack if enabled the CID will increment and a new set of registers will be available. This patch only implements shadow registers which can be used as extra scratch registers via the mfspr and mtspr if required. This is implemented in a way where it would be easy to add on the fast context switching, currently cid is hardcoded to 0. This is need for openrisc linux smp kernels to boot correctly. Signed-off-by: Stafford Horne <shorne@gmail.com>
2017-02-16linux-user: Use correct types in load_symbols()Peter Maydell
Coverity doesn't like the code in load_symbols() which assumes it can use 'int' for a variable that might hold an offset into the guest ELF file, because in a 64-bit guest that could overflow. Guest binaries with 2GB sections aren't very likely and this isn't a security issue because we fully trust the guest linux-user binary anyway, but we might as well use the right types, which will placate Coverity. Use uint64_t to hold section sizes, and bail out if the symbol table is too large rather than just overflowing an int. (Coverity issue CID1005776) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1486249533-5260-1-git-send-email-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2017-02-14target/openrisc: Keep SR_F in a separate variableRichard Henderson
This avoids having to keep merging and extracting the flag from SR. Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-24nios2: Add usermode binaries emulationMarek Vasut
Add missing bits for qemu-user required for emulating Altera Nios2 userspace binaries. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chris Wulff <crwulff@gmail.com> Cc: Jeff Da Silva <jdasilva@altera.com> Cc: Ley Foon Tan <lftan@altera.com> Cc: Sandra Loosemore <sandra@codesourcery.com> Cc: Yves Vandervennet <yvanderv@altera.com> Reviewed-by: Alexander Graf <agraf@suse.de> Message-Id: <20170118220146.489-4-marex@denx.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
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