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2021-01-23accel/tcg: Restrict cpu_io_recompile() from other acceleratorsPhilippe Mathieu-Daudé
As cpu_io_recompile() is only called within TCG accelerator in cputlb.c, declare it locally. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210117164813.4101761-6-f4bug@amsat.org> [rth: Adjust vs changed tb_flush_jmp_cache patch.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-01-23accel/tcg: Restrict tb_gen_code() from other acceleratorsPhilippe Mathieu-Daudé
tb_gen_code() is only called within TCG accelerator, declare it locally. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210117164813.4101761-4-f4bug@amsat.org> [rth: Adjust vs changed tb_flush_jmp_cache patch.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-01-23accel/tcg: Move tb_flush_jmp_cache() to cputlb.cRichard Henderson
Move and make the function static, as the only users are here in cputlb.c. Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-01-23accel/tcg: Make cpu_gen_init() staticPhilippe Mathieu-Daudé
cpu_gen_init() is TCG specific, only used in tcg/translate-all.c. No need to export it to other accelerators, declare it statically. Reviewed-by: Claudio Fontana <cfontana@suse.de> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210117164813.4101761-2-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-01-22tcg: Optimize inline dup_const for MO_64Richard Henderson
Avoid the out-of-line function call for immediate MO_64. In addition, diagnose all invalid constants at compile-time. Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-01-22qemu/compiler: Split out qemu_build_not_reached_alwaysRichard Henderson
Provide a symbol that can always be used to signal an error, regardless of optimization. Usage of this should be protected by e.g. __builtin_constant_p, which guards for optimization. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-01-21Update linux headers to 5.11-rc2Eric Farman
Signed-off-by: Eric Farman <farman@linux.ibm.com> Message-Id: <20210104202057.48048-3-farman@linux.ibm.com> [CH: dropped qatomic->atomic changes in pvrdma_ring.h] Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2021-01-20osdep.h: Remove <sys/signal.h> includeMichael Forney
Prior to 2a4b472c3c, sys/signal.h was only included on OpenBSD (apart from two .c files). The POSIX standard location for this header is just <signal.h> and in fact, OpenBSD's signal.h includes sys/signal.h itself. Unconditionally including <sys/signal.h> on musl causes warnings for just about every source file: /usr/include/sys/signal.h:1:2: warning: #warning redirecting incorrect #include <sys/signal.h> to <signal.h> [-Wcpp] 1 | #warning redirecting incorrect #include <sys/signal.h> to <signal.h> | ^~~~~~~ Since there don't seem to be any platforms which require including <sys/signal.h> in addition to <signal.h>, and some platforms like Haiku lack it completely, just remove it. Tested building on OpenBSD after removing this include. Signed-off-by: Michael Forney <mforney@mforney.org> Tested-by: John Snow <jsnow@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20210113215600.16100-1-mforney@mforney.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-01-19target/arm: Implement an IMPDEF pauth algorithmRichard Henderson
Without hardware acceleration, a cryptographically strong algorithm is too expensive for pauth_computepac. Even with hardware accel, we are not currently expecting to link the linux-user binaries to any crypto libraries, and doing so would generally make the --static build fail. So choose XXH64 as a reasonably quick and decent hash. Tested-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210111235740.462469-2-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-01-19Merge remote-tracking branch ↵Peter Maydell
'remotes/huth-gitlab/tags/pull-request-2021-01-19' into staging * Refactor next-cube interrupt and register handling into a proper QOM device # gpg: Signature made Tue 19 Jan 2021 08:15:39 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "huth@tuxfamily.org" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/huth-gitlab/tags/pull-request-2021-01-19: hw/m68k/next-cube: Add missing header comment to next-cube.h hw/m68k/next-cube: Add vmstate for NeXTPC device hw/m68k/next-cube: Remove unused fields from NeXTState hw/m68k/next-cube: Move rtc into NeXTPC struct hw/m68k/next-cube: Make next_irq GPIO inputs to NEXT_PC device hw/m68k/next-cube: Move int_status and int_mask to NeXTPC struct hw/m68k/next-cube: Make next_irq take NeXTPC* as its opaque hw/m68k/next-cube: Move scr_ops into NeXTPC device hw/m68k/next-cube: Move mmio_ops into NeXTPC device hw/m68k/next-cube: Move register/interrupt functionality into a device hw/m68k/next-cube: Make next_irq() function static Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-01-19hw/m68k/next-cube: Add missing header comment to next-cube.hPeter Maydell
The next-cube.h file is missing the usual copyright-and-license header; add it (same as the next-cube.c one). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210115201206.17347-12-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2021-01-19hw/m68k/next-cube: Make next_irq GPIO inputs to NEXT_PC devicePeter Maydell
Make the next_irq function be GPIO inputs to the NEXT_PC device, rather than a freestanding set of qemu_irq lines. This fixes a minor Coverity issue where it correctly points out the trivial memory leak of the memory allocated in the call to qemu_allocate_irqs(). Fixes: CID 1421962 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210115201206.17347-8-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2021-01-19hw/m68k/next-cube: Make next_irq() function staticPeter Maydell
The next_irq() function is global, but isn't actually used anywhere outside next-cube.c. Make it static. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210115201206.17347-2-peter.maydell@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2021-01-19spapr_hcall.c: make do_client_architecture_support staticDaniel Henrique Barboza
The function is called only inside spapr_hcall.c. Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20210114180628.1675603-3-danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-01-19spapr.h: fix trailing whitespace in phb_placementDaniel Henrique Barboza
This whitespace was messing with lots of diffs if you happen to use an editor that eliminates trailing whitespaces on file save. Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20210114180628.1675603-2-danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-01-19spapr: Improve handling of memory unplug with old guestsGreg Kurz
Since commit 1e8b5b1aa16b ("spapr: Allow memory unplug to always succeed") trying to unplug memory from a guest that doesn't support it (eg. rhel6) no longer generates an error like it used to. Instead, it leaves the memory around : only a subsequent reboot or manual use of drmgr within the guest can complete the hot-unplug sequence. A flag was added to SpaprMachineClass so that this new behavior only applies to the default machine type. We can do better. CAS processes all pending hot-unplug requests. This means that we don't really care about what the guest supports if the hot-unplug request happens before CAS. All guests that we care for, even old ones, set enough bits in OV5 that lead to a non-empty bitmap in spapr->ov5_cas. Use that as a heuristic to decide if CAS has already occured or not. Always accept unplug requests that happen before CAS since CAS will process them. Restore the previous behavior of rejecting them after CAS when we know that the guest doesn't support memory hot-unplug. This behavior is suitable for all machine types : this allows to drop the pre_6_0_memory_unplug flag. Fixes: 1e8b5b1aa16b ("spapr: Allow memory unplug to always succeed") Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <161012708715.801107.11418801796987916516.stgit@bahia.lan> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-01-19hw/ppc: Remove unused ppcuic_init()Peter Maydell
Now we've converted all the callsites to directly create the QOM UIC device themselves, the ppcuic_init() function is unused and can be removed. The enum defining PPCUIC symbolic constants can be moved to the ppc-uic.h header where it more naturally belongs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-Id: <20210108171212.16500-5-peter.maydell@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-01-18Merge remote-tracking branch ↵Peter Maydell
'remotes/stsquad/tags/pull-testing-and-misc-180121-2' into staging Testing, gdbstub and semihosting patches: - clean-ups to docker images - drop duplicate jobs from shippable - prettier tag generation (+gtags) - generate browsable source tree - more Travis->GitLab migrations - fix checkpatch to deal with commits - gate gdbstub tests on 8.3.1, expand tests - support Xfer:auxv:read gdb packet - better gdbstub cleanup - use GDB's SVE register layout - make arm-compat-semihosting common - add riscv semihosting support - add HEAPINFO, ELAPSED, TICKFREQ, TMPNAM and ISERROR to semihosting # gpg: Signature made Mon 18 Jan 2021 10:09:11 GMT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-testing-and-misc-180121-2: (30 commits) semihosting: Implement SYS_ISERROR semihosting: Implement SYS_TMPNAM semihosting: Implement SYS_ELAPSED and SYS_TICKFREQ riscv: Add semihosting support for user mode riscv: Add semihosting support semihosting: Support SYS_HEAPINFO when env->boot_info is not set semihosting: Change internal common-semi interfaces to use CPUState * semihosting: Change common-semi API to be architecture-independent semihosting: Move ARM semihosting code to shared directories target/arm: use official org.gnu.gdb.aarch64.sve layout for registers gdbstub: ensure we clean-up when terminated gdbstub: drop gdbserver_cleanup in favour of gdb_exit gdbstub: drop CPUEnv from gdb_exit() gdbstub: add support to Xfer:auxv:read: packet gdbstub: implement a softmmu based test Revert "tests/tcg/multiarch/Makefile.target: Disable run-gdbstub-sha1 test" configure: gate our use of GDB to 8.3.1 or above test/guest-debug: echo QEMU command as well scripts/checkpatch.pl: fix git-show invocation to include diffstat gitlab: migrate the minimal tools and unit tests from Travis ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # default-configs/targets/riscv32-linux-user.mak # default-configs/targets/riscv64-linux-user.mak
2021-01-18Merge remote-tracking branch ↵Peter Maydell
'remotes/alistair/tags/pull-riscv-to-apply-20210117-3' into staging First RISC-V PR for 6.0 This PR: - Fixes some issues with the m25p80 - Improves GDB support for RISC-V - Fixes some Linux boot issues, specifiaclly 32-bit boot failures - Enforces PMP exceptions correctly - Fixes some Coverity issues # gpg: Signature made Sun 17 Jan 2021 21:53:19 GMT # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-to-apply-20210117-3: riscv: Pass RISCVHartArrayState by pointer target/riscv: Remove built-in GDB XML files for CSRs target/riscv: Generate the GDB XML file for CSR registers dynamically target/riscv: Add CSR name in the CSR function table target/riscv: Make csr_ops[CSR_TABLE_SIZE] external hw/misc/sifive_u_otp: handling the fails of blk_pread and blk_pwrite hw/riscv: sifive_u: Use SIFIVE_U_CPU for mc->default_cpu_type target/riscv/pmp: Raise exception if no PMP entry is configured RISC-V: Place DTB at 3GB boundary instead of 4GB gdb: riscv: Add target description hw/block: m25p80: Implement AAI-WP command support for SST flashes hw/block: m25p80: Don't write to flash if write is disabled Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-01-18semihosting: Implement SYS_ELAPSED and SYS_TICKFREQKeith Packard
These are part of Semihosting for AArch32 and AArch64 Release 2.0 Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210107170717.2098982-8-keithp@keithp.com> Message-Id: <20210108224256.2321-19-alex.bennee@linaro.org>
2021-01-18gdbstub: drop gdbserver_cleanup in favour of gdb_exitAlex Bennée
Despite it's name it didn't actually clean-up so let us document gdb_exit() better and use that. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210108224256.2321-9-alex.bennee@linaro.org>
2021-01-18gdbstub: drop CPUEnv from gdb_exit()Alex Bennée
gdb_exit() has never needed anything from env and I doubt we are going to start now. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210108224256.2321-8-alex.bennee@linaro.org>
2021-01-17Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell
pc,pci,virtio: fixes, features Fixes all over the place. PXB support for ARM. boot index for vhost-user-fs. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Sun 17 Jan 2021 11:44:55 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: acpi: Update _DSM method in expected files acpi: Enable pxb unit-test for ARM virt machine Kconfig: Compile PXB for ARM_VIRT acpi/gpex: Exclude pxb's resources from PCI0 acpi/gpex: Inform os to keep firmware resource map acpi: Add addr offset in build_crs acpi: Fix unmatched expected DSDT.pxb file acpi: Allow DSDT acpi table changes vhost-user-fs: add the "bootindex" property pci/shpc: don't push attention button when ejecting powered-off device Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-01-17acpi: Add addr offset in build_crsJiahui Cen
AML needs Address Translation offset to describe how a bridge translates addresses accross the bridge when using an address descriptor, and especially on ARM, the translation offset of pio resource is usually non zero. Therefore, it's necessary to pass offset for pio, mmio32, mmio64 and bus number into build_crs. Acked-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Jiahui Cen <cenjiahui@huawei.com> Message-Id: <20210114100643.10617-4-cenjiahui@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-01-16riscv: Pass RISCVHartArrayState by pointerAlistair Francis
We were accidently passing RISCVHartArrayState by value instead of pointer. The type is 824 bytes long so let's correct that and pass it by pointer instead. Fixes: Coverity CID 1438099 Fixes: Coverity CID 1438100 Fixes: Coverity CID 1438101 Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Message-id: f3e04424723e0e222769991896cc82308fd23f76.1610751609.git.alistair.francis@wdc.com
2021-01-15Merge remote-tracking branch 'remotes/kraxel/tags/ui-20210115-pull-request' ↵Peter Maydell
into staging ui/gtk: refresh rate fixes. ui/vnc: add support for desktop resize and power contol. ui/vnc: misc bugfixes. # gpg: Signature made Fri 15 Jan 2021 10:24:10 GMT # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/ui-20210115-pull-request: vnc: add support for extended desktop resize vnc: move initialization to framebuffer_update_request vnc: move check into vnc_cursor_define vnc: Fix a memleak in vnc_display_connect() ui: add support for remote power control to VNC server vnc: fix unfinalized tlscreds for VncDisplay ui/gtk: update monitor interval on egl displays ui/gtk: expose gd_monitor_update_interval ui/gtk: limit virtual console max update interval ui/gtk: rename variable window to widget ui/gtk: don't try to redefine SI prefixes Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-01-15ui/gtk: expose gd_monitor_update_intervalNikola Pavlica
The gd_egl_refresh function, as the name suggests, is responsible for refreshing displays when using EGL graphics with QEMU's GTK UI. This is a perfect candidate for a function to update the refresh rate in. Since gd_monitor_update_interval is inaccessible from the gd_egl_refresh function, we need to expose/globalize it in the include/ui/gtk.h file. Signed-off-by: Nikola Pavlica <pavlica.nikola@gmail.com> Message-Id: <20210114140153.301473-2-pavlica.nikola@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-01-15ui/gtk: don't try to redefine SI prefixesVolker Rümelin
Redefining SI prefixes is always wrong. 1s has per definition 1000ms. Remove the misnamed named constant and replace it with a comment explaining the frequency to period conversion in two simple steps. Now you can cancel out the unit mHz in the comment with the implicit unit mHz in refresh_rate_millihz and see why the implicit unit ms for update_interval remains. Signed-off-by: Volker Rümelin <vr_qemu@t-online.de> Message-Id: <20201213165724.13418-1-vr_qemu@t-online.de> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2021-01-14Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210113' ↵Peter Maydell
into staging Improvements to tcg constant handling. Force utf8 for decodetree. # gpg: Signature made Thu 14 Jan 2021 02:15:42 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth-gitlab/tags/pull-tcg-20210113: (24 commits) decodetree: Open files with encoding='utf-8' tcg/aarch64: Use tcg_constant_vec with tcg vec expanders tcg/ppc: Use tcg_constant_vec with tcg vec expanders tcg: Remove tcg_gen_dup{8,16,32,64}i_vec tcg/i386: Use tcg_constant_vec with tcg vec expanders tcg: Add tcg_reg_alloc_dup2 tcg: Remove movi and dupi opcodes tcg/tci: Add special tci_movi_{i32,i64} opcodes tcg: Use tcg_constant_{i32,i64,vec} with gvec expanders tcg: Use tcg_constant_{i32,i64} with tcg plugins tcg: Use tcg_constant_{i32,i64} with tcg int expanders tcg: Use tcg_constant_i32 with icount expander tcg: Convert tcg_gen_dupi_vec to TCG_CONST tcg/optimize: Use tcg_constant_internal with constant folding tcg/optimize: Adjust TempOptInfo allocation tcg/optimize: Improve find_better_copy tcg: Introduce TYPE_CONST temporaries tcg: Expand TempOptInfo to 64-bits tcg: Rename struct tcg_temp_info to TempOptInfo tcg: Expand TCGTemp.val to 64-bits ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-01-13Merge remote-tracking branch 'remotes/mcayland/tags/qemu-macppc-20210113' ↵Peter Maydell
into staging qemu-macppc updates # gpg: Signature made Wed 13 Jan 2021 13:02:20 GMT # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F # gpg: issuer "mark.cave-ayland@ilande.co.uk" # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full] # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * remotes/mcayland/tags/qemu-macppc-20210113: macio: don't set user_creatable to false macio: wire macio GPIOs to OpenPIC using sysbus IRQs macio: move OpenPIC inside macio-newworld device mac_newworld: delay wiring of PCI IRQs in New World machine macio: move heathrow PIC inside macio-oldworld device mac_oldworld: move initialisation of grackle before heathrow mac_oldworld: remove duplicate bus check for PPC_INPUT(env) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-01-13tcg: Remove tcg_gen_dup{8,16,32,64}i_vecRichard Henderson
These interfaces have been replaced by tcg_gen_dupi_vec and tcg_constant_vec. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-01-13tcg: Remove movi and dupi opcodesRichard Henderson
These are now completely covered by mov from a TYPE_CONST temporary. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-01-13tcg/tci: Add special tci_movi_{i32,i64} opcodesRichard Henderson
The normal movi opcodes are going away. We need something for TCI to use internally. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-01-13tcg: Use tcg_constant_{i32,i64,vec} with gvec expandersRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-01-13tcg: Use tcg_constant_{i32,i64} with tcg int expandersRichard Henderson
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-01-13tcg: Use tcg_constant_i32 with icount expanderRichard Henderson
We must do this before we adjust tcg_out_movi_i32, lest the under-the-hood poking that we do for icount be broken. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-01-13tcg: Introduce TYPE_CONST temporariesRichard Henderson
These will hold a single constant for the duration of the TB. They are hashed, so that each value has one temp across the TB. Not used yet, this is all infrastructure. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-01-13tcg: Expand TCGTemp.val to 64-bitsRichard Henderson
This will reduce the differences between 32-bit and 64-bit hosts, allowing full 64-bit constants to be created with the same interface. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-01-13tcg: Add temp_readonlyRichard Henderson
In most, but not all, places that we check for TEMP_FIXED, we are really testing that we do not modify the temporary. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-01-13tcg: Consolidate 3 bits into enum TCGTempKindRichard Henderson
The temp_fixed, temp_global, temp_local bits are all related. Combine them into a single enumeration. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-01-13Merge remote-tracking branch 'remotes/armbru/tags/pull-yank-2021-01-13' into ↵Peter Maydell
staging Yank patches patches for 2021-01-13 # gpg: Signature made Wed 13 Jan 2021 09:25:46 GMT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-yank-2021-01-13: tests/test-char.c: Wait for the chardev to connect in char_socket_client_dupid_test io: Document qmp oob suitability of qio_channel_shutdown and io_shutdown io/channel-tls.c: make qio_channel_tls_shutdown thread-safe migration: Add yank feature chardev/char-socket.c: Add yank feature block/nbd.c: Add yank feature Introduce yank feature Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-01-13vhost-user-fs: add the "bootindex" propertyLaszlo Ersek
virtio-fs qualifies as a bootable device minimally under OVMF, but currently the necessary "bootindex" property is missing. Add the property. Expose the property only in the PCI device, for now. There is no boot support for virtiofs on s390x (ccw) for the time being [1] [2], so leave the CCW device unchanged. Add the property to the base device still, because adding the alias to the CCW device later will be easier this way [3]. [1] https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg01745.html [2] https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg01870.html [3] https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg01751.html Example OpenFirmware device path for the "vhost-user-fs-pci" device in the "bootorder" fw_cfg file: /pci@i0cf8/pci-bridge@1,6/pci1af4,105a@0/filesystem@0 Cc: "Dr. David Alan Gilbert" <dgilbert@redhat.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Ján Tomko <jtomko@redhat.com> Cc: Stefan Hajnoczi <stefanha@redhat.com> Cc: virtio-fs@redhat.com Signed-off-by: Laszlo Ersek <lersek@redhat.com> Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20210112131603.12686-1-lersek@redhat.com> Acked-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-01-13macio: wire macio GPIOs to OpenPIC using sysbus IRQsMark Cave-Ayland
This both allows the wiring to be done as Ben suggested in his original comment in gpio.c and also enables the OpenPIC object property link to be removed. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20201229175619.6051-7-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2021-01-13macio: move OpenPIC inside macio-newworld deviceMark Cave-Ayland
The OpenPIC device is located within the macio device on real hardware so make it a child of the macio-newworld device. This also removes the need for setting and checking a separate PIC object property link on the macio-newworld device which currently causes the automated QOM introspection tests to fail. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20201229175619.6051-6-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2021-01-13macio: move heathrow PIC inside macio-oldworld deviceMark Cave-Ayland
The heathrow PIC is located within the macio device on real hardware so make it a child of the macio-oldworld device. This also removes the need for setting and checking a separate PIC object property link on the macio-oldworld device which currently causes the automated QOM introspection tests to fail. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20201229175619.6051-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2021-01-13io: Document qmp oob suitability of qio_channel_shutdown and io_shutdownLukas Straub
Migration and yank code assume that qio_channel_shutdown is thread -safe and can be called from qmp oob handler. Document this after checking the code. Signed-off-by: Lukas Straub <lukasstraub2@web.de> Acked-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <32b8c27e256da043f0f00db05bd7ab8fbc506070.1609167865.git.lukasstraub2@web.de> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2021-01-13Introduce yank featureLukas Straub
The yank feature allows to recover from hanging qemu by "yanking" at various parts. Other qemu systems can register themselves and multiple yank functions. Then all yank functions for selected instances can be called by the 'yank' out-of-band qmp command. Available instances can be queried by a 'query-yank' oob command. Signed-off-by: Lukas Straub <lukasstraub2@web.de> Acked-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-Id: <69934ceacfd33a7dfe53db145ecc630ad39ee47c.1609167865.git.lukasstraub2@web.de> Acked-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2021-01-12Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ↵Peter Maydell
staging * UI configury cleanups and Meson conversion * scripts/gdb improvements * WHPX cleanups and fixes * cirrus win32 CI improvements * meson gnutls workaround # gpg: Signature made Tue 12 Jan 2021 16:05:19 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: target/i386: Use X86Seg enum for segment registers configure: quote command line arguments in config.status configure: move Cocoa incompatibility checks to Meson configure: move GTK+ detection to Meson configure: move X11 detection to Meson gtk: remove CONFIG_GTK_GL cocoa: do not enable coreaudio automatically virtio-scsi: trace events meson: Propagate gnutls dependency Docs/RCU: Correct sample code of qatomic_rcu_set scripts/gdb: implement 'qemu bt' scripts/gdb: fix 'qemu coroutine' when users selects a non topmost stack frame meson: fix Cocoa option in summary whpx: move whpx_lapic_state from header to c file maintainers: Add me as Windows Hosted Continuous Integration maintainer cirrus/msys2: Cache msys2 mingw in a better way. cirrus/msys2: Exit powershell with $LastExitCode whpx: move internal definitions to whpx-internal.h whpx: rename whp-dispatch to whpx-internal.h meson: do not use CONFIG_VIRTFS Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-01-12hw/misc: Add a PWM module for NPCM7XXHao Wu
The PWM module is part of NPCM7XX module. Each NPCM7XX module has two identical PWM modules. Each module contains 4 PWM entries. Each PWM has two outputs: frequency and duty_cycle. Both are computed using inputs from software side. This module does not model detail pulse signals since it is expensive. It also does not model interrupts and watchdogs that are dependant on the detail models. The interfaces for these are left in the module so that anyone in need for these functionalities can implement on their own. The user can read the duty cycle and frequency using qom-get command. Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Message-id: 20210108190945.949196-5-wuhaotsh@google.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-01-12hw/adc: Add an ADC module for NPCM7XXHao Wu
The ADC is part of NPCM7XX Module. Its behavior is controled by the ADC_CON register. It converts one of the eight analog inputs into a digital input and stores it in the ADC_DATA register when enabled. Users can alter input value by using qom-set QMP command. Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Message-id: 20210108190945.949196-4-wuhaotsh@google.com [PMM: Added missing hw/adc/trace.h file] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
generated by cgit v1.2.3 (git 2.26.2) at 2025-02-12 00:36:59 +0000