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2014-01-09Merge remote-tracking branch 'afaerber/tags/qom-devices-for-anthony' into ↵Anthony Liguori
staging QOM infrastructure fixes and device conversions * QOM interface fixes and unit test * Device no_user sanitization and documentation * Device error reporting improvement * Conversion of APIC, ICC, IOAPIC to QOM realization model # gpg: Signature made Tue 24 Dec 2013 09:04:05 AM PST using RSA key ID 3E7E013F # gpg: Good signature from "Andreas Färber <afaerber@suse.de>" # gpg: aka "Andreas Färber <afaerber@suse.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 174F 0347 1BCC 221A 6175 6F96 FA2E D12D 3E7E 013F * afaerber/tags/qom-devices-for-anthony: (24 commits) qdev-monitor: Improve error message for -device nonexistant ioapic: QOM'ify ioapic ioapic: Cleanup for QOM'ification icc_bus: QOM'ify ICC apic: QOM'ify APIC apic: Cleanup for QOM'ification qdev: Drop misleading qbus_free() function qom: Detect bad reentrance during object_class_foreach() tests: Test QOM interface casting qom: Do not register interface "types" in the type table and fix names qom: Split out object and class caches qdev: Document that pointer properties kill device_add hw: cannot_instantiate_with_device_add_yet due to pointer props qdev-monitor: Avoid device_add crashing on non-device driver name qdev: Do not let the user try to device_add when it cannot work isa: Clean up use of cannot_instantiate_with_device_add_yet vt82c686: Clean up use of cannot_instantiate_with_device_add_yet piix3 piix4: Clean up use of cannot_instantiate_with_device_add_yet ich9: Document why cannot_instantiate_with_device_add_yet pci-host: Consistently set cannot_instantiate_with_device_add_yet ...
2014-01-09Merge remote-tracking branch 'mjt/trivial-patches' into stagingAnthony Liguori
* mjt/trivial-patches: acpi unit-test: Remove temporary disk after test mainstone: Fix duplicate array values for key 'space' pxa27x: Add 'const' attribute to keyboard maps pxa27x: Reduce size of keyboard matrix mapping doc: Mention chardev:id in available devices for -serial configure: Python tests must be done before help message configure: Rewrite code for help message fix -boot strict regressed in commit 6ef4716 vl: make boot_strict variable static (not used outside vl.c) x86: only allow real mode to access 32bit without LMA linux-user: Use macro TARGET_NSIG_WORDS where possible exynos4210: Use macro ARRAY_SIZE where possible ui/cocoa: Use macro ARRAY_SIZE where possible misc: Use macro ARRAY_SIZE where possible openrisc: Fix spelling in comment (transaltion -> translation) hw/arm/highbank: Simplify code (memory region in device state) Message-id: 1388182050-10270-1-git-send-email-mjt@msgid.tls.msk.ru Signed-off-by: Anthony Liguori <aliguori@amazon.com>
2014-01-08softfloat: Add support for ties-away roundingPeter Maydell
IEEE754-2008 specifies a new rounding mode: "roundTiesToAway: the floating-point number nearest to the infinitely precise result shall be delivered; if the two nearest floating-point numbers bracketing an unrepresentable infinitely precise result are equally near, the one with larger magnitude shall be delivered." Implement this new mode (it is needed for ARM). The general principle is that the required code is exactly like the ties-to-even code, except that we do not need to do the "in case of exact tie clear LSB to round-to-even", because the rounding operation naturally causes the exact tie to round up in magnitude. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Add float16 <=> float64 conversion functionsPeter Maydell
Add the conversion functions float16_to_float64() and float64_to_float16(), which will be needed for the ARM A64 instruction set. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Provide complete set of accessors for fp statePeter Maydell
Tidy up the get/set accessors for the fp state to add missing ones and make them all inline in softfloat.h rather than some inline and some not. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Add float32_to_uint64()Tom Musta
This patch adds the float32_to_uint64() routine, which converts a 32-bit floating point number to an unsigned 64 bit number. This contribution can be licensed under either the softfloat-2a or -2b license. Signed-off-by: Tom Musta <tommusta@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: removed harmless but silly int64_t casts] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Make the int-to-float functions take exact-width typesPeter Maydell
Currently the int-to-float functions take types which are specified as "at least X bits wide", rather than "exactly X bits wide". This is confusing and unhelpful since it means that the callers have to include an explicit cast to [u]intXX_t to ensure the correct behaviour. Fix them all to take the exactly-X-bits-wide types instead. Note that this doesn't change behaviour at all since at the moment we happen to define the 'int32' and 'uint32' types as exactly 32 bits wide, and the 'int64' and 'uint64' types as exactly 64 bits wide. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Add 16 bit integer to float conversionsPeter Maydell
Add the float to 16 bit integer conversion routines. These can be trivially implemented in terms of the int32_to_float* routines, but providing them makes our API more symmetrical and can simplify callers. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Add float to 16bit integer conversions.Will Newton
ARMv8 requires support for converting 32 and 64bit floating point values to signed and unsigned 16bit integers. Signed-off-by: Will Newton <will.newton@linaro.org> [PMM: updated not to incorrectly set Inexact for Invalid inputs] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08arm_gic: Rename GIC_X_TRIGGER to GIC_X_EDGE_TRIGGERChristoffer Dall
TRIGGER can really mean mean anything (e.g. was it triggered, is it level-triggered, is it edge-triggered, etc.). Rename to EDGE_TRIGGER to make the code comprehensible without looking up the data structure. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Message-id: 1387606179-22709-2-git-send-email-christoffer.dall@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-01-01pxa27x: Add 'const' attribute to keyboard mapsStefan Weil
The mapping is a hardware feature, so it is relatively constant. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-01-01pxa27x: Reduce size of keyboard matrix mappingStefan Weil
The row and column values use only a very limited range (-1 ... 7), so a byte value is sufficient. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-12-24ioapic: QOM'ify ioapicxiaoqiang zhao
Convert 'init' function to QOM's 'realize' for ioapic and kvm-ioapic. Change variable 'ioapic_no' from static to global. Then we can drop the 'instance_no' function argument. Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-12-24icc_bus: QOM'ify ICCxiaoqiang zhao
For consistency, QOM'ify APIC's parent bus. Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-12-24apic: QOM'ify APICxiaoqiang zhao
Convert 'init' function to QOM's 'realize' for apic, kvm/apic and xen/xen_apic. Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-12-24qdev: Drop misleading qbus_free() functionStefan Hajnoczi
Same reasoning as commit 02a5c4c97422b40034f31265e0f139f7846172a8 ("qdev: Drop misleading qdev_free() function"). The qbus_free() function removes the child from the namespace and decrements the reference count. It does not, however, guarantee to free the child since the refcount may still be held. Just call object_unparent() directly. Suggested-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-12-24qom: Do not register interface "types" in the type table and fix namesPaolo Bonzini
There should be no need to look up nor enumerate the interface "types", whose "classes" are really just vtables. Just create the types and add them to the interface list of the parent type. Interfaces not registering their type anymore means that accessing superclass::interface by type name will fail when initializing subclass::interface. Thus, we need to pre-initialize the subclass's parent_type field before calling type_initialize. Apart from this, the interface "types" should never be used and thus it is harmless to leave them out of the hashtable. Further, the interface types had a bug with interfaces that are inherited from a superclass: The implementation type name was wrong (for example it was subclass::superclass::interface rather than just subclass::interface). This patch fixes this as well. Reported-by: Igor Mammedov <imammedo@redhat.com> Tested-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-12-24qom: Split out object and class cachesPeter Crosthwaite
The object-cast and class-cast caches cannot be shared because class caching is conditional on the target type not being an interface and object caching is unconditional. Leads to a bug when a class cast to an interface follows an object cast to the same interface type: FooObject = FOO(obj); FooClass = FOO_GET_CLASS(obj); Where TYPE_FOO is an interface. The first (object) cast will be successful and cache the casting result (i.e. TYPE_FOO will be cached). The second (class) cast will then check the shared cast cache and register a hit. The issue is, when a class cast hits in the cache it just returns a pointer cast of the input class (i.e. the concrete class). When casting to an interface, the cast itself must return the interface class, not the concrete class. The implementation of class cast caching already ensures that the returned cast result is only a pointer cast before caching. The object cast logic however does not have this check. Resolve by just splitting the object and class caches. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Tested-by: Nathan Rossi <nathan.rossi@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-12-24qdev: Document that pointer properties kill device_addMarkus Armbruster
Ask users of DEFINE_PROP_PTR() to set cannot_instantiate_with_device_add_yet, or explain why it's not needed. Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-12-23qdev: Replace no_user by cannot_instantiate_with_device_add_yetMarkus Armbruster
In an ideal world, machines can be built by wiring devices together with configuration, not code. Unfortunately, that's not the world we live in right now. We still have quite a few devices that need to be wired up by code. If you try to device_add such a device, it'll fail in sometimes mysterious ways. If you're lucky, you get an unmysterious immediate crash. To protect users from such badness, DeviceClass member no_user used to make device models unavailable with -device / device_add, but that regressed in commit 18b6dad. The device model is still omitted from help, but is available anyway. Attempts to fix the regression have been rejected with the argument that the purpose of no_user isn't clear, and it's prone to misuse. This commit clarifies no_user's purpose. Anthony suggested to rename it cannot_instantiate_with_device_add_yet_due_to_internal_bugs, which I shorten somewhat to keep checkpatch happy. While there, make it bool. Every use of cannot_instantiate_with_device_add_yet gets a FIXME comment asking for rationale. The next few commits will clean them all up, either by providing a rationale, or by getting rid of the use. With that done, the regression fix is hopefully acceptable. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel.a@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-12-20device_tree: qemu_fdt_setprop: Rename val_array argPeter Crosthwaite
Looking at the implementation, this doesn't really have a lot to do with arrays. Its just a pointer to a buffer and is passed through to the wrapped fn (qemu_fdt_setprop) unchanged. So rename to make it consistent with libfdt, which in the wrapped function just calls it "val". Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-12-20device_tree: s/qemu_devtree/qemu_fdt globallyPeter Crosthwaite
The qemu_devtree API is a wrapper around the fdt_ set of APIs. Rename accordingly. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> [agraf: also convert hw/arm/virt.c] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-12-20roms: Flush icache when writing roms to guest memoryAlexander Graf
We use the rom infrastructure to write firmware and/or initial kernel blobs into guest address space. So we're basically emulating the cache off phase on very early system bootup. That phase is usually responsible for clearing the instruction cache for anything it writes into cachable memory, to ensure that after reboot we don't happen to execute stale bits from the instruction cache. So we need to invalidate the icache every time we write a rom into guest address space. We do not need to do this for every DMA since the guest expects it has to flush the icache manually in that case. This fixes random reboot issues on e5500 (booke ppc) for me. Signed-off-by: Alexander Graf <agraf@suse.de>
2013-12-20spapr-rtas: add ibm, (get|set)-system-parameterAlexey Kardashevskiy
This adds very basic handlers for ibm,get-system-parameter and ibm,set-system-parameter RTAS calls. The only parameter handled at the moment is "platform-processor-diagnostics-run-mode" which is always disabled and does not support changing. This is expected to make "ppc64_cpu --run-mode=1" happy. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> [agraf: s/papameter/parameter/g] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-12-20spapr-rtas: replace return code constants with macrosAlexey Kardashevskiy
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-12-17hw/arm: add allwinner a10 SoC supportliguang
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1387159292-10436-5-git-send-email-lig.fnst@cn.fujitsu.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-17hw/intc: add allwinner A10 interrupt controllerliguang
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1387159292-10436-4-git-send-email-lig.fnst@cn.fujitsu.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-17hw/timer: add allwinner a10 timerliguang
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1387159292-10436-3-git-send-email-lig.fnst@cn.fujitsu.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-17vmstate: Add support for an array of ptimer_state *Peter Maydell
Add support for defining a vmstate field which is an array of pointers to structures, and use this to define a VMSTATE_PTIMER_ARRAY() which allows an array of ptimer_state* to be used by devices. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1387159292-10436-2-git-send-email-lig.fnst@cn.fujitsu.com
2013-12-17hw/arm/digic: add UART supportAntony Pavlov
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1387188908-754-5-git-send-email-antonynpavlov@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-17hw/arm/digic: add timer supportAntony Pavlov
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1387188908-754-4-git-send-email-antonynpavlov@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-17hw/arm: add very initial support for Canon DIGIC SoCAntony Pavlov
DIGIC is Canon Inc.'s name for a family of SoC for digital cameras and camcorders. There is no publicly available specification for DIGIC chips. All information about DIGIC chip internals is based on reverse engineering efforts made by CHDK (http://chdk.wikia.com) and Magic Lantern (http://www.magiclantern.fm) projects contributors. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1387188908-754-2-git-send-email-antonynpavlov@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-17host-utils: add clrsb32/64 - count leading redundant sign bitsClaudio Fontana
this patch introduces wrappers for the clrsb builtins, which count the leading redundant sign bits. Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2013-12-16char: add qemu_chr_fe_event()Marc-André Lureau
Teach the chardev frontend to send event. This is used by the Spice port chardev currently. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-12-16include: add missing config-host.h includeMarc-André Lureau
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-12-16qmp_change_blockdev() remove unused has_formatMarc-André Lureau
Signed-off-by: Marc-André Lureau <marcandre.lureau@gmail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2013-12-13Merge remote-tracking branch 'bonzini/virtio' into stagingAnthony Liguori
# By Andreas Färber (18) and Paolo Bonzini (12) # Via Paolo Bonzini * bonzini/virtio: (30 commits) virtio: Convert exit to unrealize virtio: Complete converting VirtioDevice to QOM realize virtio-scsi: Convert to QOM realize virtio-rng: Convert to QOM realize virtio-balloon: Convert to QOM realize virtio-net: Convert to QOM realize virtio-serial: Convert to QOM realize virtio-blk: Convert to QOM realize virtio-9p: Convert to QOM realize virtio: Start converting VirtioDevice to QOM realize virtio-scsi: QOM realize preparations virtio-rng: QOM realize preparations virtio-balloon: QOM realize preparations virtio-net: QOM realize preparations virtio-serial: QOM realize preparations virtio-blk: QOM realize preparations virtio-9p: QOM realize preparations virtio-blk-dataplane: Improve error reporting virtio-pci: add device_unplugged callback virtio-rng: switch exit callback to VirtioDeviceClass ...
2013-12-13Merge remote-tracking branch 'mst/tags/for_anthony' into stagingAnthony Liguori
acpi.pci,pc,memory core fixes Most notably this includes changes to exec to support full 64 bit addresses. This also flushes out patches that got queued during 1.7 freeze. There are new tests, and a bunch of bug fixes all over the place. There are also some changes mostly useful for downstreams. I'm also listing myself as pc co-maintainer. I'm doing this reluctantly, but this seems to be necessary to make sure patches are not lost or delayed too much, and posting the MAINTAINERS patch did not seem to make anyone else volunteer. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Wed 11 Dec 2013 10:21:51 AM PST using RSA key ID D28D5469 # gpg: Can't check signature: public key not found # By Michael S. Tsirkin (14) and others # Via Michael S. Tsirkin * mst/tags/for_anthony: (28 commits) pc: use macro for HPET type hpet: fix build with CONFIG_HPET off acpi unit-test: adjust the test data structure for better handling acpi unit-test: load and check facs table exec: separate sections and nodes per address space memory.c: bugfix - ref counting mismatch in memory_region_find hpet: enable to entitle more irq pins for hpet hpet: inverse polarity when pin above ISA_NUM_IRQS pci: fix pci bridge fw path ACPI DSDT: Make control method `IQCR` serialized acpi: strip compiler info in built-in DSDT acpi unit-test: verify signature and checksum smbios: Set system manufacturer, product & version by default exec: reduce L2_PAGE_SIZE exec: make address spaces 64-bit wide exec: memory radix tree page level compression exec: pass hw address to phys_page_find exec: extend skip field to 6 bit, page entry to 32 bit exec: replace leaf with skip split definitions for exec.c and translate-all.c radix trees ... Message-id: cover.1386786228.git.mst@redhat.com Signed-off-by: Anthony Liguori <aliguori@amazon.com>
2013-12-11hpet: fix build with CONFIG_HPET offMichael S. Tsirkin
make hpet_find inline so we don't need to build hpet.c to check if hpet is enabled. Fixes link error with CONFIG_HPET off. Cc: qemu-stable@nongnu.org Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-12-11hpet: enable to entitle more irq pins for hpetLiu Ping Fan
Owning to some different hardware design, piix and q35 need different compat. So making them diverge. On q35, IRQ2/8 can be reserved for hpet timer 0/1. And pin 16~23 can be assigned to hpet as guest chooses. So we introduce intcap property to do that. Consider the compat and piix/q35, we finally have the following value for intcap: For piix, hpet's intcap is hard coded as IRQ2. For pc-q35-1.7 and earlier, we use IRQ2 for compat reason. Otherwise IRQ2, IRQ8, and IRQ16~23 are allowed. Signed-off-by: Liu Ping Fan <pingfank@linux.vnet.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-12-10softfloat: Add minNum() and maxNum() functions to softfloat.Will Newton
Add floatnn_minnum() and floatnn_maxnum() functions which are equivalent to the minNum() and maxNum() functions from IEEE 754-2008. They are similar to min() and max() but differ in the handling of QNaN arguments. Signed-off-by: Will Newton <will.newton@linaro.org> Message-id: 1386158099-9239-5-git-send-email-will.newton@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10hw/arm/boot: Allow boards to provide an fdt blobJohn Rigby
If no fdt is provided on command line and the new field get_dtb in struct arm_boot_info is set then call it to get a device tree blob. Signed-off-by: John Rigby <john.rigby@linaro.org> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Message-id: 1385140638-10444-4-git-send-email-peter.maydell@linaro.org [PMM: minor tweaks and cleanup] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10cpu/a9mpcore: Add Global TimerFrançois LEGAL
Add the global timer to A9 MPCore. Signed-off-by: François LEGAL <devel@thom.fr.eu.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: ff92f35f438ac671b57d99d823723dd3e62d2c49.1385969450.git.peter.crosthwaite@xilinx.com [PC Changes: * new commit message * split off original version as a separate patch * Rebased against new mpcore implementation (with struct embedding) ] Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10hw/timer: Introduce ARM A9 Global Timer.Peter Crosthwaite
The ARM A9 MPCore has a timer that is global to all cores in the cluster. The timer is shared but each core has a private independent comparator and interrupt. Based on version contributed by Francois LEGAL. Signed-off-by: François LEGAL <devel@thom.fr.eu.org> Message-id: 4918e89476b8da916be2964ec41578b50d569a37.1385969450.git.peter.crosthwaite@xilinx.com [PC changes: * New commit message * Re-implemented as single timer model * Fixed backwards counting issue in polled mode * completed VMSD fields * macroified magic numbers (and headerified reg definitions) * split of as device-model-only patch * use bitops for 64 bit register access * Fixed auto increment mode to check condition properly * general cleanup (names/style etc). ] Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> [PMM: * minor typo fixes * added missing return after error_setg() * dropped setting dc->no_user = 1 ] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10cpu/a9mpcore: reorder operations/declarationsPeter Crosthwaite
To make it consistent for easier code reading. The order in which variables are defined and functions are called is set to match the address map ordering. The new consistent order of doing stuff is: SCU -> GIC -> MPTimer -> WDT. 0 functional change. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 8f31398e6d9a93f57291399f269039da1a77a2b5.1385969450.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10smbios: Set system manufacturer, product & version by defaultMarkus Armbruster
Currently, we get SeaBIOS defaults: manufacturer Bochs, product Bochs, no version. Best SeaBIOS can do, but we can provide better defaults: manufacturer QEMU, product & version taken from QEMUMachine desc and name. Take care to do this only for new machine types, of course. Note: Michael Tsirkin doesn't trust us to keep values of QEMUMachine member product stable in the future. Use copies instead, and in a way that makes it obvious that they're guest ABI. Note that we can be trusted to keep values of member name, because that has always been ABI. Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-12-10qtest: split configuration of qtest accelerator and chardevPaolo Bonzini
qtest uses the icount infrastructure to implement a test-driven vm_clock. This however is not necessary when using -qtest as a "probe" together with a normal TCG-, KVM- or Xen-based virtual machine. Hence, split out the call to configure_icount into a new function that is called only for "-machine accel=qtest"; and disable those commands when running with an accelerator other than qtest. This also fixes an assertion failure with "qemu-system-x86_64 -machine accel=qtest" but no -qtest option. This is a valid case, albeit somewhat weird; nothing will happen in the VM but you'll still be able to interact with the monitor or the GUI. Now that qtest_init is not limited to an int(void) function, change global variables that are not used outside qtest_init to arguments. And finally, cleanup useless parts of include/sysemu/qtest.h. The file is not used at all for user-only emulation, and qtest is not available on Win32 due to its usage of sigwait. Reported-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Tested-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-12-10pc: map PCI address space as catchall region for not mapped addressesMichael S. Tsirkin
With a help of negative memory region priority PCI address space is mapped underneath RAM regions effectively catching every access to addresses not mapped by any other region. It simplifies PCI address space mapping into system address space. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Igor Mammedov <imammedo@redhat.com>
2013-12-10hw: Pass QEMUMachine to its init() methodMarkus Armbruster
Put it in QEMUMachineInitArgs, so I don't have to touch every board. Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-12-09virtio: Convert exit to unrealizeAndreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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