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2015-09-10qga: Clean up unnecessarily dirty castsMarkus Armbruster
qga_vss_fsfreeze() casts error_set_win32() from void (*)(Error **, int, ErrorClass, const char *, ...) to void (*)(void **, int, int, const char *, ...) The result is later called. Since the two types are not compatible, the call is undefined behavior. It works in practice anyway. However, there's no real need for trickery here. Clean it up as follows: * Declare struct Error, and fix the first parameter. * Switch to error_setg_win32(). This gets rid of the troublesome ErrorClass parameter. Requires converting error_setg_win32() from macro to function, but that's trivially easy, because this is the only user of error_set_win32(). Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2015-09-10error: Make error_setg() a functionMarkus Armbruster
Saves a tiny amount of code at every call site. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2015-09-08xlnx-zynqmp: Connect the sysbus AHCI to ZynqMPAlistair Francis
Connect the Sysbus AHCI device to ZynqMP. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Sai Pavan Boddu <saipava@xilinx.com> [PMM: removed unnecessary brackets in error_propagate call] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-08hw/intc/arm_gic_common: Configure IRQs as NS if doing direct NS kernel bootPeter Maydell
If we directly boot a kernel in NonSecure on a system where the GIC supports the security extensions then we must cause the GIC to configure its interrupts into group 1 (NonSecure) rather than the usual group 0, and with their initial priority set to the highest NonSecure priority rather than the usual highest Secure priority. Otherwise the guest kernel will be unable to use any interrupts. Implement this behaviour, controlled by a flag which we set if appropriate when the ARM bootloader code calls our ARMLinuxBootIf interface callback. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1441383782-24378-4-git-send-email-peter.maydell@linaro.org
2015-09-08hw/arm: new interface for devices which need to behave differently for ↵Peter Maydell
kernel boot For ARM we have a little minimalist bootloader in hw/arm/boot.c which takes the place of firmware if we're directly booting a Linux kernel. Unfortunately a few devices need special case handling in this situation to do the initialization which on real hardware would be done by firmware. (In particular if we're booting a kernel in NonSecure state then we need to make a TZ-aware GIC put all its interrupts into Group 1, or the guest will be unable to use them.) Create a new QOM interface which can be implemented by devices which need to do something different from their default reset behaviour. The callback will be called after machine initialization and before first reset. Suggested-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1441383782-24378-3-git-send-email-peter.maydell@linaro.org
2015-09-08qom: Add recursive version of object_child_for_eachPeter Crosthwaite
Useful for iterating through an entire QOM subtree. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1441383782-24378-2-git-send-email-peter.maydell@linaro.org
2015-09-08hw/intc/arm_gic: Drop running_irq and last_active arraysPeter Maydell
The running_irq and last_active arrays represent state which doesn't exist in a real hardware GIC. The only thing we use them for is updating the running priority when an interrupt is completed, but in fact we can use the active-priority registers to do this. The running priority is always the priority corresponding to the lowest set bit in the active priority registers, because only one interrupt at any particular priority can be active at once. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1438089748-5528-5-git-send-email-peter.maydell@linaro.org
2015-09-08hw/intc/arm_gic: Fix handling of GICC_APR<n>, GICC_NSAPR<n> registersPeter Maydell
A GICv2 has both GICC_APR<n> and GICC_NSAPR<n> registers, with the latter holding the active priority bits for Group 1 interrupts (usually Nonsecure interrupts), and the Nonsecure view of the GICC_APR<n> is the second half of the GICC_NSAPR<n> registers. Turn our half-hearted implementation of APR<n> into a proper implementation of both APR<n> and NSAPR<n>: * Add the underlying state for NSAPR<n> * Make sure APR<n> aren't visible for pre-GICv2 * Implement reading of NSAPR<n> * Make non-secure reads of APR<n> behave correctly * Implement writing to APR<n> and NSAPR<n> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1438089748-5528-4-git-send-email-peter.maydell@linaro.org
2015-09-07Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20150907' into stagingPeter Maydell
s390x fixes and improvements: - various bugfixes (css/event-facility) - more efficient adapter interrupt routes setup - gdb enhancement - sclp got treated with a lot of remodelling/cleanup # gpg: Signature made Mon 07 Sep 2015 15:42:43 BST using RSA key ID C6F02FAF # gpg: Good signature from "Cornelia Huck <huckc@linux.vnet.ibm.com>" # gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>" * remotes/cohuck/tags/s390x-20150907: (23 commits) s390/sclp: simplify calculation of rnmax s390/sclp: store the increment_size in the sclp device s390: unify allocation of initial memory s390: move memory calculation into the sclp device s390/sclp: ignore memory hotplug operations if it is disabled s390: disallow memory hotplug for the s390-virtio machine s390: no need to manually parse for slots and maxmem s390/sclp: move sclp_service_interrupt into the sclp device s390/sclp: move sclp_execute related functions into the SCLP class s390/sclp: introduce a root sclp device s390/sclp: temporarily fix unassignment/reassignment of memory subregions s390/sclp: replace sclp event types with proper defines s390/sclp: rework sclp event facility initialization + device realization sclp/s390: rework sclp cpu hotplug device notification s390x/gdb: support reading/writing of control registers s390x/kvm: make setting of in-kernel irq routes more efficient pc-bios/s390-ccw: rebuild image pc-bios/s390-ccw: Device detection in higher subchannel sets s390x/event-facility: fix location of receive mask s390x/css: start with cleared cstat/dstat ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07s390/sclp: store the increment_size in the sclp deviceDavid Hildenbrand
Let's calculate it once and reuse it. Suggested-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com> Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com> Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07s390/sclp: move sclp_service_interrupt into the sclp deviceDavid Hildenbrand
Let's make that function a method of the new sclp device, keeping the wrapper for existing users. We can now let go of get_event_facility(). Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com> Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07s390/sclp: move sclp_execute related functions into the SCLP classDavid Hildenbrand
Let's move the sclp_execute related functions into the SCLP class and pass the device state as parameter, so we have easy access to the SCLPDevice later on. Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com> Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07s390/sclp: introduce a root sclp deviceDavid Hildenbrand
Let's create a root sclp device, which has other sclp devices as children (e.g. the event facility for now) and can later be used for migration of sclp specific attributes and setup of memory. Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com> Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07s390/sclp: replace sclp event types with proper definesDavid Hildenbrand
Introduce TYPE_SCLP_QUIESCE and make use of it. Also use TYPE_SCLP_CPU_HOTPLUG where applicable. Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com> Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07s390/sclp: rework sclp event facility initialization + device realizationDavid Hildenbrand
The current code only works by chance. The event facility is a sysbus device, but specifies in its class structure as parent the DeviceClass (instead of a device class). The init function in return lies therefore at the same position as the init function of SysBusDeviceClass and gets triggered instead - a very bad idea of doing that (e.g. the parameter types don't match). Let's bring the initialization code up to date, initializing the event facility + child events in .instance_init and moving the realization of the child events out of the init call, into the realization step. Device realization is now automatically performed when the event facility itself is realized. That realization implicitly triggers realization of the child bus, which in turn initializes the events. Please note that we have to manually propagate the realization of the bus children, common code still has a TODO set for that task. Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com> Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07s390x/event-facility: fix location of receive maskCornelia Huck
For read event mask, we assumed that the layout of the sccb was |sccb header|event buffer header|receive mask|...| The correct layout, however, is |sccb header|receive mask|...| as in-buffer and |sccb header|event buffer header|...| as out-buffer. Fix this: This makes selective read work. Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-07Make pow2ceil() and pow2floor() inlinePeter Maydell
Since the pow2floor() function is now used in a hot code path, make it inline; for consistency, provide pow2ceil() as an inline function too. Because these functions use ctz64() we have to put the inline versions into host-utils.h, so they have access to ctz64(), and move the inline is_power_of_2() along with them. We then need to include host-utils.h from qemu-common.h so that the files which use these functions via qemu-common.h still have access to them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1437741192-20955-7-git-send-email-peter.maydell@linaro.org
2015-09-07Remove unused qemu_fls functionPeter Maydell
Nothing uses qemu_fls() any more, so delete it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1437741192-20955-6-git-send-email-peter.maydell@linaro.org
2015-09-07i.MX: Add i2C devices to i.MX31 SOCJean-Christophe Dubois
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: fb20e6bf5cf946c4530b2cfb55c7e37f5a0fc051.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07i.MX: Add qtest support for I2C device emulator.Jean-Christophe Dubois
This is using a ds1338 RTC chip on the I2C bus. This RTC chip is not present on the real 3DS PDK board. Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Acked-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 05601683a2a95c881cbc9f22651a044d969bd0ae.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07i.MX: Add SOC support for i.MX25Jean-Christophe Dubois
For now we support the following devices: * CPU: ARM926 * Interrupt Controller: AVIC * CCM * UART x 5 * EPIT x 2 * GPT x 4 * FEC * I2C x 3 Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 62218bfa90f9101f79098e768c3d58bd92dcb7f3.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07i.MX: Add FEC Ethernet EmulatorJean-Christophe Dubois
This is based on mcf_fec.c FEC implementation for Coldfire * A generic PHY was added (borrowwed from LAN9118) * The buffer management is also modified as buffers are slightly different between Coldfire and i.MX Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: fb314f8a120aa49f8f6ad886f312c649b484fb5a.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07i.MX: Add I2C controller emulatorJean-Christophe Dubois
The slave mode is not implemented. Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 508dbf2ebe26ec383d3a12a1db5a7890ac8acf20.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07i.MX: KZM: use standalone i.MX31 SOC supportJean-Christophe Dubois
Convert the KZM board to use the i.MX31 SoC defintition instead of redefining the entire SoC on the machine level. Major rewrite of the machine init code. While touching the memory map comment de-indent to the correct level of indentation. This obsoletes the legacy i.MX device device creation helpers which are removed. Tested by booting a minimal Linux system on the emulated platform Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 5e783561f092e1c939562fdff001f1ab1194b07f.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07i.MX: Add SOC support for i.MX31Jean-Christophe Dubois
For now we support the following devices: * CPU: ARM1136 * Interrupt Controller: AVIC * CCM * UART x 2 * EPIT x 2 * GPT Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: f146d819594e41568daec42a1d0f440cdfe3df76.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07hw/arm/virt: Add high MMIO PCI region, 512G in sizePavel Fedin
This large region is necessary for some devices like ivshmem and video cards 32-bit kernels can be built without LPAE support. In this case such a kernel will not be able to use PCI controller which has windows in high addresses. In order to work around the problem, "highmem" option is introduced. It defaults to on on, but can be manually set to off in order to be able to run those old 32-bit guests. Signed-off-by: Pavel Fedin <p.fedin@samsung.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> [PMM: Added missing ULL suffixes and a comment to the a15memmap[] entry] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07smbios: add smbios 3.0 supportWei Huang
This patch adds support for SMBIOS 3.0 entry point. When caller invokes smbios_set_defaults(), it can specify entry point as 2.1 or 3.0. Then smbios_get_tables() will return the entry point table in right format. Acked-by: Gabriel Somlo <somlo@cmu.edu> Tested-by: Gabriel Somlo <somlo@cmu.edu> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Wei Huang <wei@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Message-id: 1440615870-9518-2-git-send-email-wei@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07include/exec/softmmu-semi.h: Add support for 64-bit valuesPeter Maydell
Add support for getting and setting 64-bit values in the softmmu semihosting support functions. This will be needed for 64-bit ARM semihosting. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Christopher Covington <cov@codeaurora.org> Message-id: 1439483745-28752-6-git-send-email-peter.maydell@linaro.org
2015-09-07gdbstub: Implement gdb_do_syscallv()Peter Maydell
Implement a variant of the existing gdb_do_syscall() which takes a va_list. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Christopher Covington <cov@codeaurora.org> Message-id: 1439483745-28752-4-git-send-email-peter.maydell@linaro.org
2015-09-03Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20150903' into stagingPeter Maydell
First batch of s390x patches for 2.5: - introduce 2.5 compat machine - support for migration of storage keys # gpg: Signature made Thu 03 Sep 2015 11:28:06 BST using RSA key ID C6F02FAF # gpg: Good signature from "Cornelia Huck <huckc@linux.vnet.ibm.com>" # gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>" * remotes/cohuck/tags/s390x-20150903: s390x: Disable storage key migration on old machine type s390x: Migrate guest storage keys (initial memory only) s390x: Info skeys sub-command s390x: Dump-skeys hmp support s390x: Dump storage keys qmp command s390x: Enable new s390-storage-keys device s390x: Create QOM device for s390 storage keys s390x: add 2.5 compat s390-ccw-virtio machine Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-03s390x: Disable storage key migration on old machine typeJason J. Herne
This code disables storage key migration when an older machine type is specified. Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Jason J. Herne <jjherne@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-03s390x: Info skeys sub-commandJason J. Herne
Provide an info skeys hmp sub-command to allow the end user to dump a storage key for a given address. This is useful for guest operating system developers. Reviewed-by: Thomas Huth <thuth@linux.vnet.ibm.com> Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Jason J. Herne <jjherne@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-03s390x: Dump-skeys hmp supportJason J. Herne
Add dump-skeys command to the human monitor. Reviewed-by: Thomas Huth <thuth@linux.vnet.ibm.com> Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Jason J. Herne <jjherne@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-03s390x: Create QOM device for s390 storage keysJason J. Herne
A new QOM style device is provided to back guest storage keys. A special version for KVM is created, which handles the storage key access via KVM_S390_GET_SKEYS and KVM_S390_SET_SKEYS ioctl. Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Jason J. Herne <jjherne@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-09-02block: more check for replaced nodeWen Congyang
We use mirror+replace to fix quorum's broken child. bs/s->common.bs is quorum, and to_replace is the broken child. The new child is target_bs. Without this patch, the replace node can be any node, and it can be top BDS with BB, or another quorum's child. We just check if the broken child is part of the quorum BDS in this patch. Signed-off-by: Wen Congyang <wency@cn.fujitsu.com> Message-id: 55A86486.1000404@cn.fujitsu.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2015-08-26exec-all: Translate TCI return addresses backwards tooPeter Crosthwaite
This subtraction of return addresses applies directly to TCI as well as host-TCG. This fixes Linux boots for at least Microblaze, CRIS, ARM and SH4 when using TCI. [sw: Removed indentation for preprocessor statement] [sw: The patch also fixes Linux boot for x86_64] Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
2015-08-25cputlb: Add functions for flushing TLB for a single MMU indexPeter Maydell
Guest CPU TLB maintenance operations may be sufficiently specialized to only need to flush TLB entries corresponding to a particular MMU index. Implement cputlb functions for this, to avoid the inefficiency of flushing TLB entries which we don't need to. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1439548879-1972-2-git-send-email-peter.maydell@linaro.org
2015-08-25xlnx-zynqmp: Connect the four OCM banksAlistair Francis
The Xilinx EP108 has four separate OCM banks which are located adjacent to each other. This patch adds the four banks to the ZynqMP SoC. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: afa6ba31163a5d541a0bef4b0dc11f2597e0c495.1436813543.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-08-24linux-user: remove useless macros GUEST_BASE and RESERVED_VALaurent Vivier
As we have removed CONFIG_USE_GUEST_BASE, we always use a guest base and the macros GUEST_BASE and RESERVED_VA become useless: replace them by their values. Reviewed-by: Alexander Graf <agraf@suse.de> Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <1440420834-8388-1-git-send-email-laurent@vivier.eu> Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-08-24linux-user: remove --enable-guest-base/--disable-guest-baseLaurent Vivier
All tcg host architectures now support the guest base and as there is no real performance lost, it can be always enabled. Anyway, guest base use can be disabled lively by setting guest base to 0. CONFIG_USE_GUEST_BASE is defined as (USE_GUEST_BASE && USER_ONLY), it should have to be replaced by CONFIG_USER_ONLY in non CONFIG_USER_ONLY parts, but as some other parts are using !CONFIG_SOFTMMU I have chosen to use !CONFIG_SOFTMMU instead. Reviewed-by: Alexander Graf <agraf@suse.de> Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <1440373328-9788-2-git-send-email-laurent@vivier.eu> Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-08-19apic_internal.h: Include cpu.h directlyPeter Maydell
apic_internal.h relies on cpu.h having been included (for the X86CPU type); include it directly rather than relying on it being pulled in via one of the other includes like timer.h. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
2015-08-19qemu-common.h: Move muldiv64() to host-utils.hPeter Maydell
Move the muldiv64() function from qemu-common.h to host-utils.h. This puts it together with all the other arithmetic functions where we provide a version with __int128_t and a fallback without, and allows headers which need muldiv64() to avoid including qemu-common.h. We don't include host-utils from qemu-common.h, to avoid dragging more things into qemu-common.h than it already has; in practice everywhere that needs muldiv64() can get it via qemu/timer.h. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
2015-08-19osdep.h: Add header commentPeter Maydell
Add a header comment to osdep.h, explaining what the header is for and some rules to avoid circular-include difficulties. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
2015-08-19osdep.h: Move some OS header includes and fixups from qemu-common.hPeter Maydell
qemu-common.h has some system header includes and fixups for things that might be missing. This is really an OS dependency and belongs in osdep.h, so move it across. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
2015-08-19qemu-common.h: Move Win32 fixups into os-win32.hPeter Maydell
qemu-common.h includes some fixups for things the Win32 headers don't define or define weirdly. These really belong in os-win32.h, so move them there. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
2015-08-19compiler.h: Use glue() in QEMU_BUILD_BUG_ON definePeter Maydell
Rather than rolling custom concatenate-strings macros for the QEMU_BUILD_BUG_ON macro to use, use the glue() macro we already have (since it's now available to us in this header). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
2015-08-19osdep.h: Move some compiler-specific things to compiler.hPeter Maydell
osdep.h has a few things which are really compiler specific; move them to compiler.h, and include compiler.h from osdep.h. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
2015-08-19osdep.h: Remove qemu_printfPeter Maydell
qemu_printf is an ancient remnant which has been a simple #define to printf for over a decade, and is used in only a few places. Expand it out in those places and remove the #define. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Daniel P. Berrange <berrange@redhat.com>
2015-08-18Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell
* SCSI fixes from Stefan and Fam * vhost-scsi fix from Igor and Lu Lina * a build system fix from Daniel * two more multi-arch-related patches from Peter C. * TCG patches from myself and Sergey Fedorov * RCU improvement from Wen Congyang * a few more simple cleanups # gpg: Signature made Fri 14 Aug 2015 22:41:52 BST using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: disas: Defeature print_target_address hw: fix mask for ColdFire UART command register scsi-generic: identify AIO callbacks more clearly scsi-disk: identify AIO callbacks more clearly scsi: create restart bottom half in the right AioContext configure: only add CONFIG_RDMA to config-host.h once qemu-nbd: remove unnecessary qemu_notify_event() vhost-scsi: Clarify vhost_virtqueue_mask argument exec: use macro ROUND_UP for alignment rcu: Allow calling rcu_(un)register_thread() during synchronize_rcu() exec: drop cpu_can_do_io, just read cpu->can_do_io cpu_defs: Simplify CPUTLB padding logic cpu-exec: Do not invalidate original TB in cpu_exec_nocache() vhost/scsi: call vhost_dev_cleanup() at unrealize() time virtio-scsi-test: Add test case for tail unaligned WRITE SAME scsi-disk: Fix assertion failure on WRITE SAME tests: virtio-scsi: clear unit attention after reset scsi-disk: fix cmd.mode field typo virtio-scsi: use virtqueue_map_sg() when loading requests Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-08-14exec: drop cpu_can_do_io, just read cpu->can_do_ioPaolo Bonzini
After commit 626cf8f (icount: set can_do_io outside TB execution, 2014-12-08), can_do_io is set to 1 if not executing code. It is no longer necessary to make this assumption in cpu_can_do_io. It is also possible to remove the use_icount test, simply by never setting cpu->can_do_io to 0 unless use_icount is true. With these changes cpu_can_do_io boils down to a read of cpu->can_do_io. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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