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2024-03-13spapr: nested: Introduce cap-nested-papr for Nested PAPR APIHarsh Prateek Bora
Introduce a SPAPR capability cap-nested-papr which enables nested PAPR API for nested guests. This new API is to enable support for KVM on PowerVM and the support in Linux kernel has already merged upstream. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-03-13spapr: nested: Use correct source for parttbl info for nested PAPR API.Harsh Prateek Bora
For nested PAPR API, we use SpaprMachineStateNestedGuest struct to store partition table info, use the same in spapr_get_pate_nested() via helper. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-03-13spapr: nested: Introduce H_GUEST_[GET|SET]_STATE hcalls.Harsh Prateek Bora
Introduce the nested PAPR hcalls: - H_GUEST_GET_STATE which is used to get state of a nested guest or a guest VCPU. The value field for each element in the request is destination to be updated to reflect current state on success. - H_GUEST_SET_STATE which is used to modify the state of a guest or a guest VCPU. On success, guest (or its VCPU) state shall be updated as per the value field for the requested element(s). Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-03-13spapr: nested: Initialize the GSB elements lookup table.Harsh Prateek Bora
Nested PAPR API provides a standard Guest State Buffer (GSB) format with unique IDs for each guest state element for which get/set state is supported by the API. Some of the elements are read-only and/or guest-wide. Introducing additional required GSB elements and helper routines for state exchange of each of the nested guest state elements for which get/set state should be supported by the API. [amachhiw: set the PCR whenever logical PVR is set] Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com> Signed-off-by: Amit Machhiwal <amachhiw@linux.vnet.ibm.com> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-03-13spapr: nested: Extend nested_ppc_state for nested PAPR APIHarsh Prateek Bora
Currently, nested_ppc_state stores a certain set of registers and works with nested_[load|save]_state() for state transfer as reqd for nested-hv API. Extending these with additional registers state as reqd for nested PAPR API. Acked-by: Nicholas Piggin <npiggin@gmail.com> Suggested-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-03-13spapr: nested: Introduce H_GUEST_CREATE_VCPU hcall.Harsh Prateek Bora
Introduce the nested PAPR hcall H_GUEST_CREATE_VCPU which is used to create and initialize the specified VCPU resource for the previously created guest. Each guest can have multiple VCPUs upto max 2048. All VCPUs for a guest gets deallocated on guest delete. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-03-13spapr: nested: Introduce H_GUEST_[CREATE|DELETE] hcalls.Harsh Prateek Bora
Introduce the nested PAPR hcalls: - H_GUEST_CREATE which is used to create and allocate resources for nested guest being created. - H_GUEST_DELETE which is used to delete and deallocate resources for the nested guest being deleted. It also supports deleting all nested guests at once using a deleteAll flag. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-03-13spapr: nested: Introduce H_GUEST_[GET|SET]_CAPABILITIES hcalls.Harsh Prateek Bora
Introduce the nested PAPR hcalls: - H_GUEST_GET_CAPABILITIES which is used to query the capabilities of the API and the L2 guests it provides. - H_GUEST_SET_CAPABILITIES which is used to set the Guest API capabilities that the Host Partition supports and may use. [amachhiw: support for p9 compat mode and return register bug fixes] Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Amit Machhiwal <amachhiw@linux.vnet.ibm.com> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-03-13spapr: nested: keep nested-hv related code restricted to its API.Harsh Prateek Bora
spapr_exit_nested and spapr_get_pate_nested_hv contains code which is specific to nested-hv API. Isolating code flows based on API helps extending it to be used with different API as well. Suggested-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-03-13spapr: nested: Introduce SpaprMachineStateNested to store related info.Harsh Prateek Bora
Currently, nested_ptcr is being used by existing nested-hv API to store nested guest related info. This need to be organised to extend support for the nested PAPR API which would need to store additional info related to nested guests in next series of patches. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-03-13spapr: nested: move nested part of spapr_get_pate into spapr_nested.cHarsh Prateek Bora
Most of the nested code has already been moved to spapr_nested.c This logic inside spapr_get_pate is related to nested guests and better suited for spapr_nested.c, hence moving there. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-03-13spapr: nested: register nested-hv api hcalls only for cap-nested-hvHarsh Prateek Bora
Since cap-nested-hv is an optional capability, it makes sense to register api specfic hcalls only when respective capability is enabled. This requires to introduce a new API to unregister hypercalls to maintain sanity across guest reboot since caps are re-applied across reboots and re-registeration of hypercalls would hit assert otherwise. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-03-13ppc/pnv: Improve pervasive topology calculation for big-coreCaleb Schlossin
Big (SMT8) cores have a complicated function to map the core, thread ID to pervasive topology (PIR). Fix this for power8, power9, and power10. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Caleb Schlossin <calebs@linux.vnet.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
2024-03-12virtio-gpu: fix scanout migration post-loadMarc-André Lureau
The current post-loading code for scanout has a FIXME: it doesn't take the resource region/rect into account. But there is more, when adding blob migration support in commit f66767f75c9, I didn't realize that blob resources could be used for scanouts. This situationn leads to a crash during post-load, as they don't have an associated res->image. virtio_gpu_do_set_scanout() handle all cases, but requires the associated virtio_gpu_framebuffer, which is currently not saved during migration. Add a v2 of "virtio-gpu-one-scanout" with the framebuffer fields, so we can restore blob scanouts, as well as fixing the existing FIXME. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Sebastian Ott <sebott@redhat.com>
2024-03-12Merge tag 'net-pull-request' of https://github.com/jasowang/qemu into stagingPeter Maydell
# -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEEIV1G9IJGaJ7HfzVi7wSWWzmNYhEFAmXwPUAACgkQ7wSWWzmN # YhFnIwgAgctDniJwlRxXB01eVlzXz7IulHnpSby07XEJxENSpGB8ufaeE4eK5gJy # NVK6C2+1EU2vRxm4oIdcvtN4C4/jtRbYYjiSTx7eE4FmSkqshSnR5XCV72LDqG3i # WbzInjMvYfysmcMXLfrWgxOnVew9WqEzlpEWlc7FfNKnkzBVf+JDztfqCUx0XM7H # qefw4ImjqQw993QxJpipXC7aEGUyouB0RIBB71FkCa9ihlh9x7W68evbOI/jTn5q # HWuStgS02sKHjRFliMbdbMY77FNUz4Yroo/GKSvGt64atxkQSJqPNAV+/9n18LNy # QAH5eK6cXFPOIAaYpADU5kHDVVAFiw== # =iBdx # -----END PGP SIGNATURE----- # gpg: Signature made Tue 12 Mar 2024 11:32:16 GMT # gpg: using RSA key 215D46F48246689EC77F3562EF04965B398D6211 # gpg: Good signature from "Jason Wang (Jason Wang on RedHat) <jasowang@redhat.com>" [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 215D 46F4 8246 689E C77F 3562 EF04 965B 398D 6211 * tag 'net-pull-request' of https://github.com/jasowang/qemu: ebpf: Updated eBPF program and skeleton. qmp: Added new command to retrieve eBPF blob. virtio-net: Added property to load eBPF RSS with fds. ebpf: Added eBPF initialization by fds. ebpf: Added eBPF map update through mmap. Avoid unaligned fetch in ladr_match() e1000e: fix link state on resume igb: fix link state on resume Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-12Merge tag 'hw-misc-20240312' of https://github.com/philmd/qemu into stagingPeter Maydell
Misc HW patch queue - Rename hw/ide/ahci-internal.h for consistency (Zoltan) - More convenient PCI hotplug trace events (Vladimir) - Short CLI option to add drives for sam460ex machine (Zoltan) - More missing ERRP_GUARD() macros (Zhao) - Avoid faulting when unmapped I/O BAR is accessed on SPARC EBUS (Mark) - Remove unused includes in hw/core/ (Zhao) - New PCF8574 GPIO over I2C model (Dmitriy) - Require ObjC on Darwin macOS by default (Peter) - Corrected "-smp parameter=1" placement in docs/ (Zhao) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmXwEJkACgkQ4+MsLN6t # wN4A3hAAngVu7VmyrfqYF6jfDMUuRGYaKf4D73/KF6R1PsU+nJdN7UAkECLj8o7g # mkcAQu1U3fKCUssF6MJ2a3kU+rD1OkkA/ZcitzgWwEjCK8KVjtMt2HzEqX+B/X+e # RUVjXMOMkyV48MF0+yLhJz+lQiDpEBFVxIgssPBNUz1Pw9IfoXp29Bfz+bYBThS4 # ywAdvCefNzSira0Nt6RWTnvgBHB/1+aLy1uMSt0Xu926zcqoxQJ0b//0flYL8vAf # JuSSZuiXPw+oAc3qG3d6aPl3g8DrFn3pvPD471KlFQAnB0dlhEZZqNBPvraySpHl # h04Y8teHYj9XfxPtaWfaEdgQCazdkKFR/q7E5c9GU00Rf469BJeuo9Pzkm4kWfbU # sbCl8em5biVZ5DpBIOMT3/D0JOyGf7/CM8y5c3Jc92hapx2NdSszkvCicrDE1+i0 # zEr4N0P/F2x5KFVFkQ3Xzv2Jtzw+iXj6kSE5a5/64GMK29Mqu/EPaSkvwGDQOs3N # QJ9mpa4gg47g310a0/nH0i5eVbvGVuzcCMP6VXOBVr18cJ7JFQFFiYcvoTDXNQ2m # sq5xUelRimnWfKpawomJXkS+/j0usH61/aQBuDKfj45i8/XFRejCIk0gMWQ9hjyD # no1HqDN8CVXtiPNSinC7ctNHU5ClS0xO/BRl0h3PGC7Bl+A2eVY= # =JQg1 # -----END PGP SIGNATURE----- # gpg: Signature made Tue 12 Mar 2024 08:21:45 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20240312' of https://github.com/philmd/qemu: docs/about/deprecated.rst: Move SMP configurations item to system emulator section meson.build: Always require an objc compiler on macos hosts hw/gpio: introduce pcf8574 driver hw/core: Cleanup unused included headers in numa.c hw/core: Cleanup unused included header in machine-qmp-cmds.c hw/core: Cleanup unused included headers in cpu-common.c sun4u: remap ebus BAR0 to use unassigned_io_ops instead of alias to PCI IO space hw/misc/ivshmem: Fix missing ERRP_GUARD() for error_prepend() hw/core/qdev-properties-system: Fix missing ERRP_GUARD() for error_prepend() hw/core/loader-fit: Fix missing ERRP_GUARD() for error_prepend() hw/ppc/sam460ex: Support short options for adding drives hw/pci: add some convenient trace-events for pcie and shpc hotplug hw/ide/ahci: Rename ahci_internal.h to ahci-internal.h Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-12Merge tag 'migration-20240311-pull-request' of ↵Peter Maydell
https://gitlab.com/peterx/qemu into staging Migration pull request - Avihai's fix to allow vmstate iterators to not starve for VFIO - Maksim's fix on additional check on precopy load error - Fabiano's fix on fdatasync() hang in mapped-ram - Jonathan's fix on vring cached access over MMIO regions - Cedric's cleanup patches 1-4 out of his error report series - Yu's fix for RDMA migration (which used to be broken even for 8.2) - Anthony's small cleanup/fix on err message - Steve's patches on privatize migration.h - Xiang's patchset to enable zero page detections in multifd threads # -----BEGIN PGP SIGNATURE----- # # iIgEABYKADAWIQS5GE3CDMRX2s990ak7X8zN86vXBgUCZe9+uBIccGV0ZXJ4QHJl # ZGhhdC5jb20ACgkQO1/MzfOr1wamaQD/SvmpMEcuRndT9LPSxzXowAGDZTBpYUfv # 5XAbx80dS9IBAO8PJJgQJIBHBeacyLBjHP9CsdVtgw5/VW+wCsbfV4AB # =xavb # -----END PGP SIGNATURE----- # gpg: Signature made Mon 11 Mar 2024 21:59:20 GMT # gpg: using EDDSA key B9184DC20CC457DACF7DD1A93B5FCCCDF3ABD706 # gpg: issuer "peterx@redhat.com" # gpg: Good signature from "Peter Xu <xzpeter@gmail.com>" [marginal] # gpg: aka "Peter Xu <peterx@redhat.com>" [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: B918 4DC2 0CC4 57DA CF7D D1A9 3B5F CCCD F3AB D706 * tag 'migration-20240311-pull-request' of https://gitlab.com/peterx/qemu: (34 commits) migration/multifd: Add new migration test cases for legacy zero page checking. migration/multifd: Enable multifd zero page checking by default. migration/multifd: Implement ram_save_target_page_multifd to handle multifd version of MigrationOps::ram_save_target_page. migration/multifd: Implement zero page transmission on the multifd thread. migration/multifd: Add new migration option zero-page-detection. migration/multifd: Allow clearing of the file_bmap from multifd migration/multifd: Allow zero pages in file migration migration: purge MigrationState from public interface migration: delete unused accessors migration: privatize colo interfaces migration: migration_file_set_error migration: migration_is_device migration: migration_thread_is_self migration: export vcpu_dirty_limit_period migration: export migration_is_running migration: export migration_is_active migration: export migration_is_setup_or_active migration: remove migration.h references migration: export fewer options migration: Fix format in error message ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-12virtio-net: Added property to load eBPF RSS with fds.Andrew Melnychenko
eBPF RSS program and maps may now be passed during initialization. Initially was implemented for libvirt to launch qemu without permissions, and initialized eBPF program through the helper. Signed-off-by: Andrew Melnychenko <andrew@daynix.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2024-03-12hw/core: Declare CPUArchId::cpu as CPUState instead of ObjectPhilippe Mathieu-Daudé
Do not accept any Object for CPUArchId::cpu field, restrict it to CPUState type. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240129164514.73104-3-philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-03-11hw/gpio: introduce pcf8574 driverDmitriy Sharikhin
NXP PCF8574 and compatible ICs are simple I2C GPIO expanders. PCF8574 incorporates quasi-bidirectional IO, and simple communication protocol, when IO read is I2C byte read, and IO write is I2C byte write. User can think of it as open-drain port, when line high state is input and line low state is output. Signed-off-by: Dmitrii Sharikhin <d.sharikhin@yadro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <f1552d822276e878d84c01eba2cf2c7c9ebdde00.camel@yadro.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-03-11migration/multifd: Add new migration option zero-page-detection.Hao Xiang
This new parameter controls where the zero page checking is running. 1. If this parameter is set to 'legacy', zero page checking is done in the migration main thread. 2. If this parameter is set to 'none', zero page checking is disabled. Signed-off-by: Hao Xiang <hao.xiang@bytedance.com> Reviewed-by: Peter Xu <peterx@redhat.com> Acked-by: Markus Armbruster <armbru@redhat.com> Link: https://lore.kernel.org/r/20240311180015.3359271-4-hao.xiang@linux.dev Signed-off-by: Peter Xu <peterx@redhat.com>
2024-03-11Merge tag 'pull-vfio-20240310' of https://github.com/legoater/qemu into stagingPeter Maydell
vfio queue: * Allow cpr-reboot for vfio # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmXtrhMACgkQUaNDx8/7 # 7KFCgw/7BEdbP4e32/+D0Mk1+oeiulgGvo/kPtg7waWACrijWxG5K5/c0kcFnhte # OnpDfObnF7l2GjKU61SAluTocWcVbb8A61Tt5+ta5xxPQGp5XCXF7aIkb/DQQDq/ # yU7pQCmqMMSgo+siR6yb+g/2t71dYlMyCbW3LU5/oGQkFtsSXjWHqnTut+wFeuRT # Vd62vHcZqHWG2epoyEnW3HCVMrZ8Dl+PLGkORV55P6uEzZuKwgoCTmR2m5/NLkdU # SF4ZnZzruqkc1dsRh+vYFglQ6GttzWz1VBJg8GJTwrXAJ7C7JSTS25fNRNNhRkJl # 2/DZbdMyyJWJmrv9AXwWEEJ+bSSbM3uM76hqgMFVUlyz9y8FXduwf4MIkZjl0Jg5 # phJb3Awxxxd61I3vWhi9lZKS/RHQ5anA+rBt/4RxdnzqZ3mDcoBhiEjNaGp1Yghv # QbkOSUmY8aBFdeqaw4UqpL2l6mlN/idAOIyq7ADp0S2/eNftw/FGBEu+KP5C/IZF # vReB36qWws9go9w8aDdyK/1bB9vMI3fo/AA8Y4Cnr22tEbgctfygl2jmmyHZUFDI # R8/NESzv17G2/g7OowCqG0qrOWW+UTDcDCkOlVFlLABiij9aNUYV631cQ379K7tR # mFo10BlTcXV83XkA9iM9qqIIVNoYm5uJRva+oEaBncRIAGiYTF4= # =kiGc # -----END PGP SIGNATURE----- # gpg: Signature made Sun 10 Mar 2024 12:56:51 GMT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-vfio-20240310' of https://github.com/legoater/qemu: vfio: allow cpr-reboot migration if suspended vfio: register container for cpr Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-09Merge tag 'hw-misc-20240309' of https://github.com/philmd/qemu into stagingPeter Maydell
Misc HW patch queue - hmp: Shorter 'info qtree' output (Zoltan) - qdev: Add a granule_mode property (Eric) - Some ERRP_GUARD() fixes (Zhao) - Doc & style fixes in docs/interop/firmware.json (Thomas) - hw/xen: Housekeeping (Phil) - hw/ppc/mac99: Change timebase frequency 25 -> 100 MHz (Mark) - hw/intc/apic: Memory leak fix (Paolo) - hw/intc/grlib_irqmp: Ensure ncpus value is in range (Clément) - hw/m68k/mcf5208: Add support for reset (Angelo) - hw/i386/pc: Housekeeping (Phil) - hw/core/smp: Remove/deprecate parameter=0,1 adapting test-smp-parse (Zhao) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmXstpMACgkQ4+MsLN6t # wN6XBw//dNItFhf1YX+Au4cNoQVDgHE9RtzEIGOnwcL1CgrA9rAQQfLRE5KWM6sN # 1qiPh+T6SPxtiQ2rw4AIpsI7TXjO72b/RDWpUUSwnfH39eC77pijkxIK+i9mYI9r # p0sPjuP6OfolUFYeSbYX+DmNZh1ONPf27JATJQEf0st8dyswn7lTQvJEaQ97kwxv # UKA0JD5l9LZV8Zr92cgCzlrfLcbVblJGux9GYIL09yN78yqBuvTm77GBC/rvC+5Q # fQC5PQswJZ0+v32AXIfSysMp2R6veo4By7VH9Lp51E/u9jpc4ZbcDzxzaJWE6zOR # fZ01nFzou1qtUfZi+MxNiDR96LP6YoT9xFdGYfNS6AowZn8kymCs3eo7M9uvb+rN # A2Sgis9rXcjsR4e+w1YPBXwpalJnLwB0QYhEOStR8wo1ceg7GBG6zHUJV89OGzsA # KS8X0aV1Ulkdm/2H6goEhzrcC6FWLg8pBJpfKK8JFWxXNrj661xM0AAFVL9we356 # +ymthS2x/RTABSI+1Lfsoo6/SyXoimFXJJWA82q9Yzoaoq2gGMWnfwqxfix6JrrA # PuMnNP5WNvh04iWcNz380P0psLVteHWcVfTRN3JvcJ9iJ2bpjcU1mQMJtvSF9wBn # Y8kiJTUmZCu3br2e5EfxmypM/h8y29VD/1mxPk8Dtcq3gjx9AU4= # =juZH # -----END PGP SIGNATURE----- # gpg: Signature made Sat 09 Mar 2024 19:20:51 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20240309' of https://github.com/philmd/qemu: (43 commits) hw/m68k/mcf5208: add support for reset tests/unit/test-smp-parse: Test "parameter=0" SMP configurations tests/unit/test-smp-parse: Test smp_props.has_clusters tests/unit/test-smp-parse: Test the full 7-levels topology hierarchy tests/unit/test-smp-parse: Test "drawers" and "books" combination case tests/unit/test-smp-parse: Test "drawers" parameter in -smp tests/unit/test-smp-parse: Test "books" parameter in -smp tests/unit/test-smp-parse: Make test cases aware of the book/drawer tests/unit/test-smp-parse: Bump max_cpus to 4096 tests/unit/test-smp-parse: Use CPU number macros in invalid topology case tests/unit/test-smp-parse: Drop the unsupported "dies=1" case hw/core/machine-smp: Calculate total CPUs once in machine_parse_smp_config() hw/core/machine-smp: Deprecate unsupported "parameter=1" SMP configurations hw/core/machine-smp: Remove deprecated "parameter=0" SMP configurations docs/interop/firmware.json: Fix doc for FirmwareFlashMode docs/interop/firmware.json: Align examples hw/intc/grlib_irqmp: abort realize when ncpus value is out of range mac_newworld: change timebase frequency from 100MHz to 25MHz for mac99 machine hmp: Add option to info qtree to omit details qdev: Add a granule_mode property ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-09Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into stagingPeter Maydell
trivial patches for 2024-03-09 # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEe3O61ovnosKJMUsicBtPaxppPlkFAmXshtIPHG1qdEB0bHMu # bXNrLnJ1AAoJEHAbT2saaT5ZMFUIAKTd1rYzRs6x4wXitaWbYIIs2d6UB/HLbzz2 # BVHZwoYqsW3TuNFJp4njHhexZ76nFlT8xMuOKB5tAm4KOmqOdxS/mfThuSGsWGP7 # CAk35ENOMQbii/jp6tqawop+H0rVMSJjBrkU4vLRAtQ7g1ISnX6tJi3wiyS+FtHq # 9eIfgJgM77tvq6RLPZTUrUBevMWQfjMcvXmMnYqL4Z1dnibIb5/R3RKAnEc4CUoS # hMw94wBcq+ZOQNPnY7d+WioKq7JcSWX7UW5NuHo+C+G83nq1/5vE8Oe2kNwzFyDL # 9sIqL8bz6v8iiqcVMIBykSAZhYH9QEuVRJso18UE5w0B8k4CQcM= # =dIAF # -----END PGP SIGNATURE----- # gpg: Signature made Sat 09 Mar 2024 15:57:06 GMT # gpg: using RSA key 7B73BAD68BE7A2C289314B22701B4F6B1A693E59 # gpg: issuer "mjt@tls.msk.ru" # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" [full] # gpg: aka "Michael Tokarev <mjt@corpit.ru>" [full] # gpg: aka "Michael Tokarev <mjt@debian.org>" [full] # Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5 # Subkey fingerprint: 7B73 BAD6 8BE7 A2C2 8931 4B22 701B 4F6B 1A69 3E59 * tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: docs/acpi/bits: add some clarity and details while also improving formating hw/mem/cxl_type3: Fix problem with g_steal_pointer() hw/pci-bridge/cxl_upstream: Fix problem with g_steal_pointer() hw/cxl/cxl-cdat: Fix type of buf in ct3_load_cdat() qerror: QERR_DEVICE_IN_USE is no longer used, drop blockdev: Fix block_resize error reporting for op blockers char: Slightly better error reporting when chardev is in use make-release: switch to .xz format by default hw/scsi/lsi53c895a: Fix typo in comment hw/vfio/pci.c: Make some structure static replay: Improve error messages about configuration conflicts Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-09qdev: Add a granule_mode propertyEric Auger
Introduce a new enum type property allowing to set an IOMMU granule. Values are 4k, 8k, 16k, 64k and host. This latter indicates the vIOMMU granule will match the host page size. A subsequent patch will add such a property to the virtio-iommu device. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240227165730.14099-2-eric.auger@redhat.com>
2024-03-09hw/i386/pc: Remove pc_compat_1_4..1.7[] left over declarationsPhilippe Mathieu-Daudé
These definitions were removed in commit ea985d235b ("pc_piix: remove pc-i440fx-1.4 up to pc-i440fx-1.7"). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20240301185936.95175-2-philmd@linaro.org>
2024-03-09hw/xen: Extract 'xen_igd.h' from 'xen_pt.h'Philippe Mathieu-Daudé
"hw/xen/xen_pt.h" requires "hw/xen/xen_native.h" which is target specific. It also declares IGD methods, which are not target specific. Target-agnostic code can use IGD methods. To allow that, extract these methos into a new "hw/xen/xen_igd.h" header. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: David Woodhouse <dwmw@amazon.co.uk> Message-Id: <20231114143816.71079-18-philmd@linaro.org>
2024-03-09hw/xen: Rename 'ram_memory' global variable as 'xen_memory'Philippe Mathieu-Daudé
To avoid a potential global variable shadow in hw/i386/pc_piix.c::pc_init1(), rename Xen's "ram_memory" as "xen_memory". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: David Woodhouse <dwmw@amazon.co.uk> Message-Id: <20231114143816.71079-11-philmd@linaro.org>
2024-03-09hw/mem/cxl_type3: Fix problem with g_steal_pointer()Thomas Huth
When setting GLIB_VERSION_MAX_ALLOWED to GLIB_VERSION_2_58 or higher, glib adds type safety checks to the g_steal_pointer() macro. This triggers errors in the ct3_build_cdat_entries_for_mr() function which uses the g_steal_pointer() for type-casting from one pointer type to the other (which also looks quite weird since the local pointers have all been declared with g_autofree though they are never freed here). Fix it by using a proper typecast instead. For making this possible, we have to remove the QEMU_PACKED attribute from some structs since GCC otherwise complains that the source and destination pointer might have different alignment restrictions. Removing the QEMU_PACKED should be fine here since the structs are already naturally aligned. Anyway, add some QEMU_BUILD_BUG_ON() statements to make sure that we've got the right sizes (without padding in the structs). Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2024-03-09hw/pci-bridge/cxl_upstream: Fix problem with g_steal_pointer()Thomas Huth
When setting GLIB_VERSION_MAX_ALLOWED to GLIB_VERSION_2_58 or higher, glib adds type safety checks to the g_steal_pointer() macro. This triggers errors in the build_cdat_table() function which uses the g_steal_pointer() for type-casting from one pointer type to the other (which also looks quite weird since the local pointers have all been declared with g_autofree though they are never freed here). Let's fix it by using a proper typecast instead. For making this possible, we have to remove the QEMU_PACKED attribute from some structs since GCC otherwise complains that the source and destination pointer might have different alignment restrictions. Removing the QEMU_PACKED should be fine here since the structs are already naturally aligned. Anyway, add some QEMU_BUILD_BUG_ON() statements to make sure that we've got the right sizes (without padding in the structs). Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2024-03-09Merge tag 'pull-hv-balloon-20240308' of ↵Peter Maydell
https://github.com/maciejsszmigiero/qemu into staging Hyper-V Dynamic Memory and VMBus misc small patches This pull request contains two small patches to hv-balloon: the first one replacing alloca() usage with g_malloc0() + g_autofree and the second one adding additional declaration of a protocol message struct with an optional field explicitly defined to avoid a Coverity warning. Also included is a VMBus patch to print a warning when it is enabled without the recommended set of Hyper-V features (enlightenments) since some Windows versions crash at boot in this case. # -----BEGIN PGP SIGNATURE----- # # iQGzBAABCAAdFiEE4ndqq6COJv9aG0oJUrHW6VHQzgcFAmXrQeMACgkQUrHW6VHQ # zgcvWwv9GUCDnidnDka8WGF2wgBEaPPdC2JXcqRFFLADISBAn/3fhsOERO6FwYuN # pouhVEJnHpp9ueNAx+et51ySRzGCaL+VdOGGeReQllIOZGsnOnB8JfM58UE4lX4Z # prCr72bxFsunxRqlqxssejrc8fBhgEQRPo5lQabl73rxftpXkNTHY0CGTwlvnaY1 # CzEBTBuowzkZJbQYDL8Qim2HrYqrSnOaend6bbrj9P6P+UFw9wLJU5tkfYCiHUjg # Ux2Fjjx+5+qD9yE7khtxSHqjwWYkR7xA9di1yv4Znqg18gzdbuqnlrKR7F0v98yh # sWFy+fyfVRDg+G2yh2F+vAUjmAJUrfw5+GL3uZTWIevoQUoSHBQfgUEJrlIKvykZ # WP1XuAZRH3m2akDOXOWZVcDhkb3zPKtPJYZ2WncBZk+DLCs/vg94Taq0FcZefBTn # 6qsFjs2lHz96uOSzgqICfU34ghcxfU5xgzmvKxKAiriOItmRMHgIYOXLHRfaIJhV # MT/9OMuW # =kVny # -----END PGP SIGNATURE----- # gpg: Signature made Fri 08 Mar 2024 16:50:43 GMT # gpg: using RSA key E2776AABA08E26FF5A1B4A0952B1D6E951D0CE07 # gpg: Good signature from "Maciej S. Szmigiero <mail@maciej.szmigiero.name>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 727A 0D4D DB9E D9F6 039B ECEF 847F 5E37 90CE 0977 # Subkey fingerprint: E277 6AAB A08E 26FF 5A1B 4A09 52B1 D6E9 51D0 CE07 * tag 'pull-hv-balloon-20240308' of https://github.com/maciejsszmigiero/qemu: vmbus: Print a warning when enabled without the recommended set of features hv-balloon: define dm_hot_add_with_region to avoid Coverity warning hv-balloon: avoid alloca() usage Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-08vfio: allow cpr-reboot migration if suspendedSteve Sistare
Allow cpr-reboot for vfio if the guest is in the suspended runstate. The guest drivers' suspend methods flush outstanding requests and re-initialize the devices, and thus there is no device state to save and restore. The user is responsible for suspending the guest before initiating cpr, such as by issuing guest-suspend-ram to the qemu guest agent. Relax the vfio blocker so it does not apply to cpr, and add a notifier that verifies the guest is suspended. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Cédric Le Goater <clg@redhat.com>
2024-03-08vfio: register container for cprSteve Sistare
Define entry points to perform per-container cpr-specific initialization and teardown. Signed-off-by: Steve Sistare <steven.sistare@oracle.com> Reviewed-by: Cédric Le Goater <clg@redhat.com>
2024-03-08Merge tag 'pull-target-arm-20240308' of ↵Peter Maydell
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * Implement FEAT_ECV * STM32L4x5: Implement GPIO device * Fix 32-bit SMOPA * Refactor v7m related code from cpu32.c into its own file * hw/rtc/sun4v-rtc: Relicense to GPLv2-or-later # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmXrM50ZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3l3aD/9BDWm3LNSIyHQ0qFD1l6wc # JeAymSBecMD6sfRaPloLaB5HlU9AhLQWHe8Sa/hkWdYPhvhh6keESlVScJXi6Irq # wm3MuDJwr9QZgXWuHsEwXj4sve+O/MgDHcYSyEldbcyqjbivMCUKCGXeT2VxQftd # LarETxUTsdPeaWm3Lm11CkiO5r0DMJyebgVc6jloT9O1oK8szrkDix09U6eCGhXy # l1ep0KY2mk+MtoboDflD3W/Zu0LrAZ1159r4LqTMD2Hp9Tt222aDOjEKi+Qjns22 # E86YCy7kPcsHVOskF42SkZ8M044T/tCetKgnOHqn8hbTCW5uNT+zJNC1feAB92pi # 4xWErOfYy7d5UVzWfUYudGKrb91rr5h2jd1SWn2NeQtdmU8KyFEjQS1y4FNZvPTD # lrzyuTv8daeKSImq6JPzws/MJRh5I87TpRgKDg6hTJDaUCLu0yIuV9pkUsIdJ5mW # 01ol8tmDgpBRsxjJlIf40KxOt5SQ2VoYh7L8jgRjGv9DEP5hU1AkPqQGtyx7Wcd/ # ImRYQ/cOqircJPqX60DHljZDACVOzrFIEmpKvu45tt1On0iNXKCMuIl0vwI9XERx # CSgqIz7KDI5gNlruZQDyHvVehQZW7sJo9rH5RawqObsUHTlg5rLb++79Da2RWtbV # yvQLaI3qPngknz//1eAKxg== # =YmPl # -----END PGP SIGNATURE----- # gpg: Signature made Fri 08 Mar 2024 15:49:49 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20240308' of https://git.linaro.org/people/pmaydell/qemu-arm: target/arm: Move v7m-related code from cpu32.c into a separate file hw/rtc/sun4v-rtc: Relicense to GPLv2-or-later target/arm: Fix 32-bit SMOPA tests/qtest: Add STM32L4x5 GPIO QTest testcase hw/arm: Connect STM32L4x5 GPIO to STM32L4x5 SoC hw/gpio: Implement STM32L4x5 GPIO target/arm: Enable FEAT_ECV for 'max' CPU target/arm: Implement FEAT_ECV CNTPOFF_EL2 handling target/arm: Define CNTPCTSS_EL0 and CNTVCTSS_EL0 target/arm: Implement new FEAT_ECV trap bits target/arm: Don't allow RES0 CNTHCTL_EL2 bits to be written target/arm: use FIELD macro for CNTHCTL bit definitions target/arm: Timer _EL02 registers UNDEF for E2H == 0 target/arm: Move some register related defines to internals.h Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-08vmbus: Print a warning when enabled without the recommended set of featuresMaciej S. Szmigiero
Some Windows versions crash at boot or fail to enable the VMBus device if they don't see the expected set of Hyper-V features (enlightenments). Since this provides poor user experience let's warn user if the VMBus device is enabled without the recommended set of Hyper-V features. The recommended set is the minimum set of Hyper-V features required to make the VMBus device work properly in Windows Server versions 2016, 2019 and 2022. Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
2024-03-08hv-balloon: define dm_hot_add_with_region to avoid Coverity warningMaciej S. Szmigiero
Since the presence of a hot add memory region is optional in hot add request message it wasn't part of this message declaration (struct dm_hot_add). Instead, the code allocated such enlarged message by simply adding the necessary size for this extra field to the size of basic hot add message struct. However, Coverity considers accessing this extra member to be an out-of-bounds access, even thought the memory is actually there. Fix this by adding an extended variant of this message that explicitly has an additional union dm_mem_page_range at its end. CID: #1523903 Signed-off-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
2024-03-08hw/arm/virt-acpi-build.c: Migrate SPCR creation to common locationSia Jee Heng
RISC-V should also generate the SPCR in a manner similar to ARM. Therefore, instead of replicating the code, relocate this function to the common AML build. Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20240129021440.17640-2-jeeheng.sia@starfivetech.com> [ Changes by AF: - Add missing Language SPCR entry ] Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-03-07hw/rtc/sun4v-rtc: Relicense to GPLv2-or-laterPeter Maydell
The sun4v RTC device model added under commit a0e893039cf2ce0 in 2016 was unfortunately added with a license of GPL-v3-or-later, which is not compatible with other QEMU code which has a GPL-v2-only license. Relicense the code in the .c and the .h file to GPL-v2-or-later, to make it compatible with the rest of QEMU. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini (for Red Hat) <pbonzini@redhat.com> Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20240223161300.938542-1-peter.maydell@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-07hw/arm: Connect STM32L4x5 GPIO to STM32L4x5 SoCInès Varhol
Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20240305210444.310665-3-ines.varhol@telecom-paris.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-07hw/gpio: Implement STM32L4x5 GPIOInès Varhol
Features supported : - the 8 STM32L4x5 GPIOs are initialized with their reset values (except IDR, see below) - input mode : setting a pin in input mode "externally" (using input irqs) results in an out irq (transmitted to SYSCFG) - output mode : setting a bit in ODR sets the corresponding out irq (if this line is configured in output mode) - pull-up, pull-down - push-pull, open-drain Difference with the real GPIOs : - Alternate Function and Analog mode aren't implemented : pins in AF/Analog behave like pins in input mode - floating pins stay at their last value - register IDR reset values differ from the real one : values are coherent with the other registers reset values and the fact that AF/Analog modes aren't implemented - setting I/O output speed isn't supported - locking port bits isn't supported - ADC function isn't supported - GPIOH has 16 pins instead of 2 pins - writing to registers LCKR, AFRL, AFRH and ASCR is ineffective Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20240305210444.310665-2-ines.varhol@telecom-paris.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-05accel/tcg: Add tlb_fill_flags to CPUTLBEntryFullRichard Henderson
Allow the target to set tlb flags to apply to all of the comparators. Remove MemTxAttrs.byte_swap, as the bit is not relevant to memory transactions, only the page mapping. Adjust target/sparc to set TLB_BSWAP directly. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240301204110.656742-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-05hw/arm/stm32l4x5_soc.c: Use the RCC SysclkArnaud Minier
Now that we can generate reliable clock frequencies from the RCC, remove the hacky definition of the sysclk in the b_l475e_iot01a initialisation code and use the correct RCC clock. Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240303140643.81957-8-arnaud.minier@telecom-paris.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-05hw/misc/stm32l4x5_rcc: Initialize PLLs and clock multiplexersArnaud Minier
Instantiate the whole clock tree and using the Clock multiplexers and the PLLs defined in the previous commits. This allows to statically define the clock tree and easily follow the clock signal from one end to another. Also handle three-phase reset now that we have defined a known base state for every object. (Reset handling based on hw/misc/zynq_sclr.c) Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Message-id: 20240303140643.81957-5-arnaud.minier@telecom-paris.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-05hw/misc/stm32l4x5_rcc: Add an internal PLL Clock objectArnaud Minier
This object represents the PLLs and their channels. The PLLs allow for a more fine-grained control of the clocks frequency. The migration handling is based on hw/misc/zynq_sclr.c. Three phase reset will be handled in a later commit. Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Message-id: 20240303140643.81957-4-arnaud.minier@telecom-paris.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-05hw/misc/stm32l4x5_rcc: Add an internal clock multiplexer objectArnaud Minier
This object is used to represent every multiplexer in the clock tree as well as every clock output, every presecaler, frequency multiplier, etc. This allows to use a generic approach for every component of the clock tree (except the PLLs). The migration handling is based on hw/misc/zynq_sclr.c. Three phase reset will be handled in a later commit. Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20240303140643.81957-3-arnaud.minier@telecom-paris.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-05hw/misc/stm32l4x5_rcc: Implement STM32L4x5_RCC skeletonArnaud Minier
Add the necessary files to add a simple RCC implementation with just reads from and writes to registers. Also instantiate the RCC in the STM32L4x5_SoC. It is needed for accurate emulation of all the SoC clocks and timers. Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240303140643.81957-2-arnaud.minier@telecom-paris.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-05hw/arm: Connect BSC to BCM2835 board as I2C0, I2C1 and I2C2Rayhan Faizel
BCM2835 has three I2C controllers. All of them share the same interrupt line. Signed-off-by: Rayhan Faizel <rayhan.faizel@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240224191038.2409945-3-rayhan.faizel@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-05hw/i2c: Implement Broadcom Serial Controller (BSC)Rayhan Faizel
A few deficiencies in the current device model need to be noted. 1. FIFOs are not used. All sends and receives are done directly. 2. Repeated starts are not emulated. Repeated starts can be triggered in real hardware by sending a new read transfer request in the window time between transfer active set of write transfer request and done bit set of the same. Signed-off-by: Rayhan Faizel <rayhan.faizel@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240224191038.2409945-2-rayhan.faizel@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-05Merge tag 'pull-tcg-20240301' of https://gitlab.com/rth7680/qemu into stagingPeter Maydell
linux-user: Rewrite elf coredump tcg/aarch64: Apple does not align __int128_t in even registers accel/tcg: Fixes for page tables in mmio memory linux-user: Remove qemu_host_page_{size,mask}, HOST_PAGE_ALIGN migration: Remove qemu_host_page_size hw/tpm: Remove qemu_host_page_size softmmu: Remove qemu_host_page_{size,mask}, HOST_PAGE_ALIGN linux-user: Split and reorganize target_mmap. *-user: Deprecate and disable -p pagesize linux-user: Allow TARGET_PAGE_BITS_VARY target/alpha: Enable TARGET_PAGE_BITS_VARY for user-only target/arm: Enable TARGET_PAGE_BITS_VARY for AArch64 user-only target/ppc: Enable TARGET_PAGE_BITS_VARY for user-only linux-user: Remove pgb_dynamic alignment assertion tcg/optimize: fix uninitialized variable linux-user: Rewrite shmat # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmXiXxQdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/H3QgApu4OgadviJuOBenT # yaGiq+iG4wTL5vVZFK8CgMtq59dJbgJSCooh7U8dn5hIhVuvOU7odUm6embt+4WZ # 0fDZIjrRvdDMM3LdLFhfdZszMNg6w2ceN9dn5iLkW3wxjRBpTzZNbxhh2Sg308+Q # oNd+MlYLijDvQP97+tlQ/PBtndLfV5FkpU74ZinWRgcpcT6oH9sP6TRlAVttefy7 # 3GsIXhDKGoDa/0Jpy86qE//3FUaVRqqcNlAIPXMf47ABQ2y2lZlwsfyty7s55sVW # KgdXdH1GiCgxIonVg4bYvovnwKVH5xHlpsJY48jQtBXR/4exPBFBpeTc422E0Sed # swpayg== # =W3pb # -----END PGP SIGNATURE----- # gpg: Signature made Fri 01 Mar 2024 23:04:52 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20240301' of https://gitlab.com/rth7680/qemu: (60 commits) tests/tcg: Check that shmat() does not break /proc/self/maps linux-user: Rewrite target_shmat linux-user: Add strace for shmat linux-user/loongarch64: Remove TARGET_FORCE_SHMLBA linux-user/x86_64: Handle the vsyscall page in open_self_maps_{2,4} tcg/optimize: fix uninitialized variable linux-user: Remove pgb_dynamic alignment assertion target/alpha: Enable TARGET_PAGE_BITS_VARY for user-only target/ppc: Enable TARGET_PAGE_BITS_VARY for user-only linux-user: Bound mmap_min_addr by host page size target/arm: Enable TARGET_PAGE_BITS_VARY for AArch64 user-only linux-user: Allow TARGET_PAGE_BITS_VARY accel/tcg: Disconnect TargetPageDataNode from page size cpu: Remove page_size_init *-user: Deprecate and disable -p pagesize tests/tcg: Extend file in linux-madvise.c tests/tcg: Remove run-test-mmap-* linux-user: Split out mmap_h_gt_g linux-user: Split out mmap_h_lt_g linux-user: Split out mmap_h_eq_g ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-03-01Merge tag 'pull-loongarch-20240229' of https://gitlab.com/gaosong/qemu into ↵Peter Maydell
staging pull-loongarch-20240229 V2: fix build error on mipsel # -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZeBrwAAKCRBAov/yOSY+ # 33YXA/4+A5Bpe/3+mSAWZSUlluGTqUi0ILBYRMyX1RXovMx4uCRGr7PXzAf03yKS # MZzlVzTuOK69WmTm/iTdYWOxkXisC3gzxL/wm8hP4lzh4c0dHrHRsKHqq6gR3+t2 # ojdZn7TefeflnNqIhxXxgxb1OETofhBNnBJ74pvqxO7XV5SWnA== # =J2Kb # -----END PGP SIGNATURE----- # gpg: Signature made Thu 29 Feb 2024 11:34:24 GMT # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF * tag 'pull-loongarch-20240229' of https://gitlab.com/gaosong/qemu: loongarch: Change the UEFI loading mode to loongarch Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
generated by cgit v1.2.3 (git 2.26.2) at 2025-03-16 02:05:09 +0000