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AgeCommit message (Expand)Author
2020-09-18Use OBJECT_DECLARE_SIMPLE_TYPE when possibleEduardo Habkost
2020-09-18Use OBJECT_DECLARE_TYPE when possibleEduardo Habkost
2020-09-18qom: Remove module_obj_name parameter from OBJECT_DECLARE* macrosEduardo Habkost
2020-09-18sifive: Use DECLARE_*CHECKER* macrosEduardo Habkost
2020-09-18sifive: Move QOM typedefs and add missing includesEduardo Habkost
2020-09-18sifive_u: Rename memmap enum constantsEduardo Habkost
2020-09-18sifive_e: Rename memmap enum constantsEduardo Habkost
2020-09-17x86: move cpu hotplug from pc to x86Gerd Hoffmann
2020-09-17x86: move acpi_dev from pc/microvmGerd Hoffmann
2020-09-17x86: constify x86_machine_is_*_enabledGerd Hoffmann
2020-09-17microvm/acpi: add minimal acpi supportGerd Hoffmann
2020-09-17microvm: make virtio irq base runtime configurableGerd Hoffmann
2020-09-17acpi: move acpi_dsdt_add_power_button() to gedGerd Hoffmann
2020-09-17acpi: ged: add x86 device variant.Gerd Hoffmann
2020-09-17acpi: ged: add control regsGerd Hoffmann
2020-09-15virtio-gpu: make virtio_gpu_ops staticGerd Hoffmann
2020-09-14hw/arm/npcm7xx: add board setup stub for CPU and UART clocksHavard Skinnemoen
2020-09-14hw/ssi: NPCM7xx Flash Interface Unit device modelHavard Skinnemoen
2020-09-14hw/mem: Stubbed out NPCM7xx Memory Controller modelHavard Skinnemoen
2020-09-14hw/nvram: NPCM7xx OTP device modelHavard Skinnemoen
2020-09-14hw/arm: Add two NPCM7xx-based machinesHavard Skinnemoen
2020-09-14hw/arm: Add NPCM730 and NPCM750 SoC modelsHavard Skinnemoen
2020-09-14hw/timer: Add NPCM7xx Timer device modelHavard Skinnemoen
2020-09-14hw/misc: Add NPCM7xx Clock Controller device modelHavard Skinnemoen
2020-09-14hw/misc: Add NPCM7xx System Global Control Registers device modelHavard Skinnemoen
2020-09-13Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200...Peter Maydell
2020-09-09hw/riscv: Move sifive_test model to hw/miscBin Meng
2020-09-09hw/riscv: Move sifive_uart model to hw/charBin Meng
2020-09-09hw/riscv: Move riscv_htif model to hw/charBin Meng
2020-09-09hw/riscv: Move sifive_plic model to hw/intcBin Meng
2020-09-09hw/riscv: Move sifive_clint model to hw/intcBin Meng
2020-09-09hw/riscv: Move sifive_gpio model to hw/gpioBin Meng
2020-09-09hw/riscv: Move sifive_u_otp model to hw/miscBin Meng
2020-09-09hw/riscv: Move sifive_u_prci model to hw/miscBin Meng
2020-09-09hw/riscv: Move sifive_e_prci model to hw/miscBin Meng
2020-09-09hw/riscv: sifive_u: Connect a DMA controllerBin Meng
2020-09-09hw/riscv: clint: Avoid using hard-coded timebase frequencyBin Meng
2020-09-09hw/riscv: microchip_pfsoc: Hook GPIO controllersBin Meng
2020-09-09hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMsBin Meng
2020-09-09hw/net: cadence_gem: Add a new 'phy-addr' propertyBin Meng
2020-09-09hw/riscv: microchip_pfsoc: Connect a DMA controllerBin Meng
2020-09-09hw/dma: Add SiFive platform DMA controller emulationBin Meng
2020-09-09hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD cardBin Meng
2020-09-09hw/sd: Add Cadence SDHCI emulationBin Meng
2020-09-09hw/riscv: microchip_pfsoc: Connect 5 MMUARTsBin Meng
2020-09-09hw/char: Add Microchip PolarFire SoC MMUART emulationBin Meng
2020-09-09hw/riscv: Initial support for Microchip PolarFire SoC Icicle Kit boardBin Meng
2020-09-09hw/riscv: hart: Add a new 'resetvec' propertyBin Meng
2020-09-09pc87312: Rename TYPE_PC87312_SUPERIO to TYPE_PC87312Eduardo Habkost
2020-09-09sabre: Rename SABRE_DEVICE to SABREEduardo Habkost
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