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2016-03-30hw/mips: implement ITC Configuration Tags and Storage CellsLeon Alrae
Implement ITC as a single object consisting of two memory regions: 1) tag_io: ITC Configuration Tags (i.e. ITCAddressMap{0,1} registers) which are accessible by the CPU via CACHE instruction. Also adding MemoryRegion *itc_tag to the CPUMIPSState so that CACHE instruction will dispatch reads/writes directly. 2) storage_io: memory-mapped ITC Storage whose address space is configurable (i.e. enabled/remapped/resized) by writing to ITCAddressMap{0,1} registers. ITC Storage contains FIFO and Semaphore cells. Read-only FIFO bit in the ITC cell tag indicates the type of the cell. If the ITC Storage contains both types of cells then FIFOs are located before Semaphores. Since issuing thread can get blocked on the access to a cell (in E/F Synchronized and P/V Synchronized Views) each cell has a bitmap to track which threads are currently blocked. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-03-30hw/mips/cps: create CPC block inside CPSLeon Alrae
Create Cluster Power Controller and add a link to the CPC MemoryRegion in GCR. Guest can enable / map CPC to any physical address by writing to the memory-mapped GCR_CPC_BASE register. Set vp-start-reset property to 1 to allow only first VP to run from reset. Others are brought up by the guest via CPC memory-mapped registers. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-03-30hw/mips: add initial Cluster Power Controller supportLeon Alrae
Cluster Power Controller (CPC) is responsible for power management in multiprocessing system. It provides registers to control the power and the clock frequency of the individual elements in the system. This patch implements only three registers that are used to control the power state of each VP on a single core: * VP Run is a write-only register used to set each VP to the run state * VP Stop is a write-only register used to set each VP to the suspend state * VP Running is a read-only register indicating the run state of each VP Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-03-30hw/mips: add initial Global Config Register supportYongbok Kim
Add initial GCR support to indicate number of VPs present in the system, L2 bypass mode and revision number. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> [leon.alrae@imgtec.com: * removed GIC part, * changed commit message, * replaced %lx format spec. with PRIx64, * renamed mips_gcr.{c,h} to mips_cmgcr.{c,h}, * replaced CONFIG_MIPS_GIC with CONFIG_MIPS_CPS] Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-03-16bcm2835_property: implement framebuffer control/configuration propertiesGrégory ESTRADE
The property channel driver now interfaces with the framebuffer device to query and set framebuffer parameters. As a result of this, the "get ARM RAM size" query now correctly returns the video RAM base address (not total RAM size), and the ram-size property is no longer relevant here. Signed-off-by: Grégory ESTRADE <gregory.estrade@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Message-id: 1457467526-8840-5-git-send-email-Andrew.Baumann@microsoft.com [AB: cleanup/refactoring for upstream submission] Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16i.MX: Add i.MX6 CCM and ANALOG device.Jean-Christophe Dubois
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 9fa80b4d8c5d0f50c94e77d74f952a7a665e168f.1456868959.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16i.MX: Add the CLK_IPG_HIGH clockJean-Christophe Dubois
EPIT, GPT and other i.MX timers are using "abstract" clocks among which a CLK_IPG_HIGH clock. On i.MX25 and i.MX31 CLK_IPG and CLK_IPG_HIGH are mapped to the same clock but on other SOC like i.MX6 they are mapped to distinct clocks. This patch add the CLK_IPG_HIGH to prepare for SOC where these 2 clocks are different. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 224bf650194760284cb40630e985867e1373276a.1456868959.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16i.MX: Remove CCM useless clock computation handling.Jean-Christophe Dubois
Most clocks supported by the CCM are useless to the qemu framework. Only clocks related to timers (EPIT, GPT, PWM, WATCHDOG, ...) are usefull to QEMU code. Therefore this patch removes clock computation handling for all clocks but: * CLK_NONE, * CLK_IPG, * CLK_32k Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 9e7222efb349801032e60c0f6b0fbad0e5dcf648.1456868959.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16i.MX: Rename CCM NOCLK to CLK_NONE for naming consistency.Jean-Christophe Dubois
This way all CCM clock defines/enums are named CLK_XXX Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 8537df765c1713625c7a8b9aca4c7ca60b42e0c0.1456868959.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-11bcm2835_property: implement "get board revision" queryStephen Warren
Return a valid value from the BCM2835 property mailbox query "get board revision". This query is used by U-Boot. Implementing it fixes the first obvious difference between qemu and real HW. The value returned is currently hard-coded to match the RPi2 I own. Other values are legal, e.g. different board manufacturer field values are likely to exist in the wild. Cc: Andrew Baumann <Andrew.Baumann@microsoft.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Message-id: 1454993910-24077-1-git-send-email-swarren@wwwdotorg.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-03bcm2835_property: add bcm2835 property channelAndrew Baumann
This sits behind the mailbox interface, and implements request/response queries for system properties. The framebuffer-related properties will be added in a later patch. Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-03bcm2835_mbox: add BCM2835 mailboxesAndrew Baumann
This adds the system mailboxes which are used to communicate with a number of GPU peripherals on Pi/Pi2. Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-11i.MX: move i.MX31 CCM object to register arrayJean-Christophe DUBOIS
With this i.MX25 and i.MX31 will have closer implementations. Moreover all i.MX31 CCM registers are now present. Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-12-17i.MX: Add an i.MX25 specific CCM class/instanceJean-Christophe Dubois
With this CCM, i.MX25 timer is accurate with "real world time". Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 2c0cf90be767bfc8520661eca891ab22c61f18fe.1449528242.git.jcd@tribudubois.net Reviewed-by Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-12-17i.MX: Split the CCM class into an abstract base class and a concrete classJean-Christophe Dubois
The IMX_CCM class is now the base abstract class that is used by EPIT and GPT timer implementation. IMX31_CCM class is the concrete class implementing CCM for i.MX31 SOC. For now the i.MX25 continues to use the i.MX31 CCM implementation. An i.MX25 specific CCM will be introduced in a later patch. We also rework initialization to stop using deprecated sysbus device init. Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: fd3c7f87b50f5ebc99ec91f01413db35017f116d.1449528242.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-12-17i.MX: rename i.MX CCM get_clock() function and CLK ID enum namesJean-Christophe Dubois
This is to prepare for CCM code refactoring. This is just a bit of function and enum values renaming. We also remove some useless intermediate variables. Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 53c4d9b9611988a5f56f178f285e04490747925e.1449528242.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-12hw/misc: Add support for ADC controller in Xilinx Zynq 7000Guenter Roeck
Add support for the Xilinx XADC core used in Zynq 7000. References: - Zynq-7000 All Programmable SoC Technical Reference Manual - 7 Series FPGAs and Zynq-7000 All Programmable SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital Converter Tested with Linux using QEMU machine xilinx-zynq-a9 with devicetree files zynq-zc702.dtb and zynq-zc706.dtb, and kernel configuration multi_v7_defconfig. Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> [ PC changes: * Changed macro names to match TRM where possible * Made programmers model macro scheme consistent * Dropped XADC_ZYNQ_ prefix on local macros * Fix ALM field width * Update threshold-comparison interrupts in _update_ints() * factored out DFIFO pushes into helper. Renamed to "push/pop" * Changed xadc_reg to 10 bits and added OOB check. * Reduced scope of MCTL reset to just stop channel coms. * Added dummy read data to write commands * Changed _ to - seperators in string names and filenames * Dropped ------------ in header comment * Catchall'ed _update_ints() in _write handler. * Minor whitespace changes. * Use ZYNQ_XADC_FIFO_DEPTH instead of ARRAY_SIZE() ] Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Tested-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-10-24ivshmem: add check on protocol version in QEMUDavid Marchand
Send a protocol version as the first message from server, clients must close communication if they don't support this protocol version. Older QEMUs should be fine with this change in the protocol since they overrides their own vm_id on reception of an id associated to no eventfd. Signed-off-by: David Marchand <david.marchand@6wind.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> [use fifo_update_and_get()] Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
2015-08-13i.MX: Split CCM emulator in a header file and a source fileJean-Christophe Dubois
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: b1d6f990229b2608bbaba24f4ff359571c0b07da.1437080501.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-03-11stm32f2xx_SYSCFG: Add the stm32f2xx SYSCFGAlistair Francis
This patch adds the stm32f2xx System Configuration Controller. This is used to configure what memory is mapped at address 0 (although that is not supported) as well as configure how the EXTI interrupts work (also not supported at the moment). This device is not required for basic examples, but more complex systems will require it (as well as the EXTI device) Signed-off-by: Alistair Francis <alistair@alistair23.me> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 5d499d7b60b61d5d6dcb310b2e55411b1f53794e.1424175342.git.alistair@alistair23.me Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-12-19vfio: move hw/misc/vfio.c to hw/vfio/pci.c Move vfio.h into include/hw/vfioKim Phillips
This is done in preparation for the addition of VFIO platform device support. Signed-off-by: Kim Phillips <kim.phillips@linaro.org> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2014-06-27vfio: Add vfio_container_ioctl()Alexey Kardashevskiy
While most operations with VFIO IOMMU driver are generic and used inside vfio.c, there are still some operations which only specific VFIO IOMMU drivers implement. The first example of it will be reading a DMA window start from the host. This adds a helper which passes an ioctl request to the container's fd. The helper will check if @req is known. For this, stub is added. This return -1 on any requests for now. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Acked-by: Alex Williamson <alex.williamson@redhat.com> Acked-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-11-05arm11mpcore: Split off SCU deviceAndreas Färber
Inspired by a9scu. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-11-05a9mpcore: Embed A9SCUStateAndreas Färber
Prepares for QOM realize. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-10-31integrator: fix Linux boot failure by emulating dbg regionAlex Bennée
Commit 9b8c69243 (since reverted) broke the ability to boot the kernel as the value returned by unassigned_mem_read returned non-zero and left the kernel looping forever waiting for it to change (see integrator_led_set in the kernel code). Relying on a varying implementation detail is incorrect anyway so this introduces a basic stub of a memory region for the debug/LED section on the integrator board. Signed-off-by: Alex Bennée <alex@bennee.com> Message-id: 1382451366-9539-1-git-send-email-alex.bennee@linaro.org [PMM: removed three unused fields from struct IntegratorDebugState] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-04-08hw: move headers to include/Paolo Bonzini
Many of these should be cleaned up with proper qdev-/QOM-ification. Right now there are many catch-all headers in include/hw/ARCH depending on cpu.h, and this makes it necessary to compile these files per-target. However, fixing this does not belong in these patches. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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