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2023-01-28x86: don't let decompressed kernel image clobber setup_dataJason A. Donenfeld
The setup_data links are appended to the compressed kernel image. Since the kernel image is typically loaded at 0x100000, setup_data lives at `0x100000 + compressed_size`, which does not get relocated during the kernel's boot process. The kernel typically decompresses the image starting at address 0x1000000 (note: there's one more zero there than the compressed image above). This usually is fine for most kernels. However, if the compressed image is actually quite large, then setup_data will live at a `0x100000 + compressed_size` that extends into the decompressed zone at 0x1000000. In other words, if compressed_size is larger than `0x1000000 - 0x100000`, then the decompression step will clobber setup_data, resulting in crashes. Visually, what happens now is that QEMU appends setup_data to the kernel image: kernel image setup_data |--------------------------||----------------| 0x100000 0x100000+l1 0x100000+l1+l2 The problem is that this decompresses to 0x1000000 (one more zero). So if l1 is > (0x1000000-0x100000), then this winds up looking like: kernel image setup_data |--------------------------||----------------| 0x100000 0x100000+l1 0x100000+l1+l2 d e c o m p r e s s e d k e r n e l |-------------------------------------------------------------| 0x1000000 0x1000000+l3 The decompressed kernel seemingly overwriting the compressed kernel image isn't a problem, because that gets relocated to a higher address early on in the boot process, at the end of startup_64. setup_data, however, stays in the same place, since those links are self referential and nothing fixes them up. So the decompressed kernel clobbers it. Fix this by appending setup_data to the cmdline blob rather than the kernel image blob, which remains at a lower address that won't get clobbered. This could have been done by overwriting the initrd blob instead, but that poses big difficulties, such as no longer being able to use memory mapped files for initrd, hurting performance, and, more importantly, the initrd address calculation is hard coded in qboot, and it always grows down rather than up, which means lots of brittle semantics would have to be changed around, incurring more complexity. In contrast, using cmdline is simple and doesn't interfere with anything. The microvm machine has a gross hack where it fiddles with fw_cfg data after the fact. So this hack is updated to account for this appending, by reserving some bytes. Fixup-by: Michael S. Tsirkin <mst@redhat.com> Cc: x86@kernel.org Cc: Philippe Mathieu-Daudé <philmd@linaro.org> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Message-Id: <20221230220725.618763-1-Jason@zx2c4.com> Message-ID: <20230128061015-mutt-send-email-mst@kernel.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Tested-by: Eric Biggers <ebiggers@google.com> Tested-by: Mathias Krause <minipli@grsecurity.net>
2023-01-27intel-iommu: Document iova_treePeter Xu
It seems not super clear on when iova_tree is used, and why. Add a rich comment above iova_tree to track why we needed the iova_tree, and when we need it. Also comment for the map/unmap messages, on how they're used and implications (e.g. unmap can be larger than the mapped ranges). Suggested-by: Jason Wang <jasowang@redhat.com> Signed-off-by: Peter Xu <peterx@redhat.com> Message-Id: <20230109193727.1360190-1-peterx@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-27hw/acpi/acpi_dev_interface: Remove unused parameter from ↵Bernhard Beschow
AcpiDeviceIfClass::madt_cpu The only function ever assigned to AcpiDeviceIfClass::madt_cpu is pc_madt_cpu_entry() which doesn't use the AcpiDeviceIf parameter. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20230121151941.24120-5-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-16hw/i386/pc: Remove unused 'owner' argument from pc_pci_as_mapping_initPhilippe Mathieu-Daudé
This argument was added 9 years ago in commit 83d08f2673 ("pc: map PCI address space as catchall region for not mapped addresses") and has never been used since, so remove it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20230105173826.56748-1-philmd@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2023-01-13hw/intc: Extract the IRQ counting functions into a separate fileThomas Huth
These IRQ counting functions will soon be required in binaries that do not include the APIC code, too, so let's extract them into a separate file that can be linked independently of the APIC code. While we're at it, change the apic_* prefix into kvm_* since the functions are used from the i8259 PIC (i.e. not the APIC), too. Reviewed-by: Bernhard Beschow <shentey@gmail.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20230110095351.611724-2-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-01-09Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu ↵Peter Maydell
into staging virtio,pc,pci: features, cleanups, fixes mostly vhost-vdpa: guest announce feature emulation when using shadow virtqueue support for configure interrupt startup speed ups an acpi change to only generate cluster node in PPTT when specified for arm misc fixes, cleanups Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Sun 08 Jan 2023 08:01:39 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (50 commits) vhost-scsi: fix memleak of vsc->inflight acpi: cpuhp: fix guest-visible maximum access size to the legacy reg block tests: acpi: aarch64: Add *.topology tables tests: acpi: aarch64: Add topology test for aarch64 tests: acpi: Add and whitelist *.topology blobs tests: virt: Update expected ACPI tables for virt test hw/acpi/aml-build: Only generate cluster node in PPTT when specified tests: virt: Allow changes to PPTT test table virtio-pci: fix proxy->vector_irqfd leak in virtio_pci_set_guest_notifiers vdpa: commit all host notifier MRs in a single MR transaction vhost: configure all host notifiers in a single MR transaction vhost: simplify vhost_dev_enable_notifiers vdpa: harden the error path if get_iova_range failed vdpa-dev: get iova range explicitly docs/devel: Rules on #include in headers include: Include headers where needed include/hw/virtio: Break inclusion loop include/hw/cxl: Break inclusion loop cxl_pci.h and cxl_cdat_h include/hw/pci: Include hw/pci/pci.h where needed include/hw/pci: Split pci_device.h off pci.h ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-01-08include: Include headers where neededMarkus Armbruster
A number of headers neglect to include everything they need. They compile only if the headers they need are already included from elsewhere. Fix that. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221222120813.727830-3-armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-08include/hw/pci: Break inclusion loop pci_bridge.h and cxl.hMarkus Armbruster
hw/pci/pci_bridge.h and hw/cxl/cxl.h include each other. Fortunately, breaking the loop is merely a matter of deleting unnecessary includes from headers, and adding them back in places where they are now missing. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20221222100330.380143-2-armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2023-01-06KVM: remove support for kernel-irqchip=offPaolo Bonzini
-machine kernel-irqchip=off is broken for many guest OSes; kernel-irqchip=split is the replacement that works, so remove the deprecated support for the former. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-12-21hw: Add compat machines for 8.0Cornelia Huck
Add 8.0 machine types for arm/i440fx/m68k/q35/s390x/spapr. Reviewed-by: Cédric Le Goater <clg@kaod.org> [ppc] Reviewed-by: Thomas Huth <thuth@redhat.com> [s390x] Reviewed-by: Greg Kurz <groug@kaod.org> [ppc] Signed-off-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <20221212152145.124317-2-cohuck@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org>
2022-11-07intel-iommu: PASID supportJason Wang
This patch introduce ECAP_PASID via "x-pasid-mode". Based on the existing support for scalable mode, we need to implement the following missing parts: 1) tag VTDAddressSpace with PASID and support IOMMU/DMA translation with PASID 2) tag IOTLB with PASID 3) PASID cache and its flush 4) PASID based IOTLB invalidation For simplicity PASID cache is not implemented so we can simply implement the PASID cache flush as a no and leave it to be implemented in the future. For PASID based IOTLB invalidation, since we haven't had L1 stage support, the PASID based IOTLB invalidation is not implemented yet. For PASID based device IOTLB invalidation, it requires the support for vhost so we forbid enabling device IOTLB when PASID is enabled now. Those work could be done in the future. Note that though PASID based IOMMU translation is ready but no device can issue PASID DMA right now. In this case, PCI_NO_PASID is used as PASID to identify the address without PASID. vtd_find_add_as() has been extended to provision address space with PASID which could be utilized by the future extension of PCI core to allow device model to use PASID based DMA translation. This feature would be useful for: 1) prototyping PASID support for devices like virtio 2) future vPASID work 3) future PRS and vSVA work Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com> Message-Id: <20221028061436.30093-5-jasowang@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-11-07intel-iommu: drop VTDBusJason Wang
We introduce VTDBus structure as an intermediate step for searching the address space. This works well with SID based matching/lookup. But when we want to support SID plus PASID based address space lookup, this intermediate steps turns out to be a burden. So the patch simply drops the VTDBus structure and use the PCIBus and devfn as the key for the g_hash_table(). This simplifies the codes and the future PASID extension. To prevent being slower for past vtd_find_as_from_bus_num() callers, a vtd_as cache indexed by the bus number is introduced to store the last recent search result of a vtd_as belongs to a specific bus. Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com> Message-Id: <20221028061436.30093-3-jasowang@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Yi Liu <yi.l.liu@intel.com>
2022-08-25hw: Add compat machines for 7.2Cornelia Huck
Add 7.2 machine types for arm/i440fx/m68k/q35/s390x/spapr. Signed-off-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20220727121755.395894-1-cohuck@redhat.com> [thuth: fixed conflict with pcmc->legacy_no_rng_seed] Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-07-26i386/pc: restrict AMD only enforcing of 1Tb hole to new machine typeJoao Martins
The added enforcing is only relevant in the case of AMD where the range right before the 1TB is restricted and cannot be DMA mapped by the kernel consequently leading to IOMMU INVALID_DEVICE_REQUEST or possibly other kinds of IOMMU events in the AMD IOMMU. Although, there's a case where it may make sense to disable the IOVA relocation/validation when migrating from a non-amd-1tb-aware qemu to one that supports it. Relocating RAM regions to after the 1Tb hole has consequences for guest ABI because we are changing the memory mapping, so make sure that only new machine enforce but not older ones. Signed-off-by: Joao Martins <joao.m.martins@oracle.com> Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20220719170014.27028-12-joao.m.martins@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-07-26i386/pc: pass pci_hole64_size to pc_memory_init()Joao Martins
Use the pre-initialized pci-host qdev and fetch the pci-hole64-size into pc_memory_init() newly added argument. Use PCI_HOST_PROP_PCI_HOLE64_SIZE pci-host property for fetching pci-hole64-size. This is in preparation to determine that host-phys-bits are enough and for pci-hole64-size to be considered to relocate ram-above-4g to be at 1T (on AMD platforms). Signed-off-by: Joao Martins <joao.m.martins@oracle.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20220719170014.27028-4-joao.m.martins@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-07-26hw/i386: add 4g boundary start to X86MachineStateJoao Martins
Rather than hardcoding the 4G boundary everywhere, introduce a X86MachineState field @above_4g_mem_start and use it accordingly. This is in preparation for relocating ram-above-4g to be dynamically start at 1T on AMD platforms. Signed-off-by: Joao Martins <joao.m.martins@oracle.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20220719170014.27028-2-joao.m.martins@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-07-22hw/i386: pass RNG seed via setup_data entryJason A. Donenfeld
Tiny machines optimized for fast boot time generally don't use EFI, which means a random seed has to be supplied some other way. For this purpose, Linux (≥5.20) supports passing a seed in the setup_data table with SETUP_RNG_SEED, specially intended for hypervisors, kexec, and specialized bootloaders. The linked commit shows the upstream kernel implementation. At Paolo's request, we don't pass these to versioned machine types ≤7.0. Link: https://git.kernel.org/tip/tip/c/68b8e9713c8 Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Richard Henderson <richard.henderson@linaro.org> Cc: Eduardo Habkost <eduardo@habkost.net> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Philippe Mathieu-Daudé <f4bug@amsat.org> Cc: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Message-Id: <20220721125636.446842-1-Jason@zx2c4.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-06-11hw/i386/pc: Remove orphan declarationsBernhard Beschow
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20220520180109.8224-6-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-06-11hw/i386/pc: Unexport functions used only internallyBernhard Beschow
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20220520180109.8224-5-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-06-11hw/i386/pc: Unexport PC_CPU_MODEL_IDS macroBernhard Beschow
The macro seems to be used only internally, so remove it. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20220520180109.8224-4-shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-06-09hw/cxl: Move the CXLState from MachineState to machine type specific state.Jonathan Cameron
This removes the last of the CXL code from the MachineState where it is visible to all Machines to only those that support CXL (currently i386/pc) As i386/pc always support CXL now, stop allocating the state independently. Note the pxb register hookup code runs even if cxl=off in order to detect pxb_cxl host bridges and fail to start if any are present as they won't have the control registers available. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Message-Id: <20220608145440.26106-8-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-06-09q35: acpi: drop not needed PCMachineClass::do_not_add_smb_acpiIgor Mammedov
by default we do not version ACPI AML as it's considered a part of firmware. Drop do_not_add_smb_acpi that blocked SMBUS AML description on 3.1 and older machine types without providing justification. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Message-Id: <20220608135340.3304695-18-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-05-16hw/i386: Make pic a property of common x86 base machine typeXiaoyao Li
Legacy PIC (8259) cannot be supported for TDX guests since TDX module doesn't allow directly interrupt injection. Using posted interrupts for the PIC is not a viable option as the guest BIOS/kernel will not do EOI for PIC IRQs, i.e. will leave the vIRR bit set. Make PIC the property of common x86 machine type. Hence all x86 machines, including microvm, can disable it. Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Sergio Lopez <slp@redhat.com> Message-Id: <20220310122811.807794-3-xiaoyao.li@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-05-16hw/i386: Make pit a property of common x86 base machine typeXiaoyao Li
Both pc and microvm have pit property individually. Let's just make it the property of common x86 base machine type. Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Sergio Lopez <slp@redhat.com> Message-Id: <20220310122811.807794-2-xiaoyao.li@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-05-16intel_iommu: Support IR-only mode without DMA translationDavid Woodhouse
By setting none of the SAGAW bits we can indicate to a guest that DMA translation isn't supported. Tested by booting Windows 10, as well as Linux guests with the fix at https://git.kernel.org/torvalds/c/c40aaaac10 Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Peter Xu <peterx@redhat.com> Acked-by: Jason Wang <jasowang@redhat.com> Message-Id: <20220314142544.150555-2-dwmw2@infradead.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-05-12hw/xen/xen_pt: Confine igd-passthrough-isa-bridge to XENBernhard Beschow
igd-passthrough-isa-bridge is only requested in xen_pt but was implemented in pc_piix.c. This caused xen_pt to dependend on i386/pc which is hereby resolved. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Acked-by: Anthony PERARD <anthony.perard@citrix.com> Message-Id: <20220326165825.30794-2-shentey@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-04-27i386: factor out x86_firmware_configure()Gerd Hoffmann
move sev firmware setup to separate function so it can be used from other code paths. No functional change. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20220425135051.551037-3-kraxel@redhat.com>
2022-04-20hw: Add compat machines for 7.1Cornelia Huck
Add 7.1 machine types for arm/i440fx/m68k/q35/s390x/spapr. Signed-off-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <20220316145521.1224083-1-cohuck@redhat.com> Reviewed-by: Eric Farman <farman@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Acked-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Yanan Wang <wangyanan55@huawei.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-04-06Replace config-time define HOST_WORDS_BIGENDIANMarc-André Lureau
Replace a config-time define with a compile time condition define (compatible with clang and gcc) that must be declared prior to its usage. This avoids having a global configure time define, but also prevents from bad usage, if the config header wasn't included before. This can help to make some code independent from qemu too. gcc supports __BYTE_ORDER__ from about 4.6 and clang from 3.2. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> [ For the s390x parts I'm involved in ] Acked-by: Halil Pasic <pasic@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220323155743.1585078-7-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-03-06x86: cleanup unused compat_apic_id_modeIgor Mammedov
commit f862ddbb1a4 (hw/i386: Remove the deprecated pc-1.x machine types) removed the last user of broken APIC ID compat knob, but compat_apic_id_mode itself was forgotten. Clean it up and simplify x86_cpu_apic_id_from_index() Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20220228131634.3389805-1-imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-03-06pc: add option to disable PS/2 mouse/keyboardJoelle van Dyne
On some older software like Windows 7 installer, having both a PS/2 mouse and USB mouse results in only one device working property (which might be a different device each boot). While the workaround to not use a USB mouse with such software is valid, it creates an inconsistent experience if the user wishes to always use a USB mouse. This introduces a new machine property to inhibit the creation of the i8042 PS/2 controller. Signed-off-by: Joelle van Dyne <j@getutm.app> Message-Id: <20220227210655.45592-1-j@getutm.app> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-03-06intel_iommu: support snoop controlJason Wang
SC is required for some kernel features like vhost-vDPA. So this patch implements basic SC feature. The idea is pretty simple, for software emulated DMA it would be always coherent. In this case we can simple advertise ECAP_SC bit. For VFIO and vhost, thing will be more much complicated, so this patch simply fail the IOMMU notifier registration. In the future, we may want to have a dedicated notifiers flag or similar mechanism to demonstrate the coherency so VFIO could advertise that if it has VFIO_DMA_CC_IOMMU, for vhost kernel backend we don't need that since it's a software backend. Signed-off-by: Jason Wang <jasowang@redhat.com> Message-Id: <20220214060346.72455-1-jasowang@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-01-27intc: Unexport InterruptStatsProviderClass-related functionsBernhard Beschow
The functions are only used within their respective source files, so no need for exporting. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20220116122327.73048-1-shentey@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-01-07hw/i386: expose a "smbios-entry-point-type" PC machine propertyEduardo Habkost
The i440fx and Q35 machine types are both hardcoded to use the legacy SMBIOS 2.1 (32-bit) entry point. This is a sensible conservative choice because SeaBIOS only supports SMBIOS 2.1 EDK2, however, can also support SMBIOS 3.0 (64-bit) entry points, and QEMU already uses this on the ARM virt machine type. This adds a property to allow the choice of SMBIOS entry point versions For example to opt in to 64-bit SMBIOS entry point: $QEMU -machine q35,smbios-entry-point-type=64 Based on a patch submitted by Daniel Berrangé. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20211026151100.1691925-4-ehabkost@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2022-01-05hw: Add compat machines for 7.0Cornelia Huck
Add 7.0 machine types for arm/i440fx/q35/s390x/spapr. Signed-off-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20211217143948.289995-1-cohuck@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2021-12-16Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingRichard Henderson
* improve compatibility for macOS scripts/entitlement.sh (Evan) * add support for KVM_GUESTDBG_BLOCKIRQ (Maxim) * update linux-headers to Linux 5.16 (myself) * configure cleanups (myself) * lsi53c895a assertion failure fix (Philippe) * fix incorrect description for die-id (Yanan) * support for NUMA in SGX enclave memory (Yang Zhong) # gpg: Signature made Wed 15 Dec 2021 02:49:44 AM PST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [unknown] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: configure: remove dead variables doc: Add the SGX numa description numa: Support SGX numa in the monitor and Libvirt interfaces numa: Enable numa for SGX EPC sections kvm: add support for KVM_GUESTDBG_BLOCKIRQ gdbstub, kvm: let KVM report supported singlestep flags gdbstub: reject unsupported flags in handle_set_qemu_sstep linux-headers: update to 5.16-rc1 virtio-gpu: do not byteswap padding scripts/entitlement.sh: Use backward-compatible cp flags qapi/machine.json: Fix incorrect description for die-id tests/qtest: Add fuzz-lsi53c895a-test hw/scsi/lsi53c895a: Do not abort when DMA requested and no data queued Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-12-15include/hw/i386: Don't include qemu-common.h in .h filesPeter Maydell
The qemu-common.h header is not supposed to be included from any other header files, only from .c files (as documented in a comment at the start of it). include/hw/i386/x86.h and include/hw/i386/microvm.h break this rule. In fact, the include is not required at all, so we can just drop it from both files. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20211129200510.1233037-2-peter.maydell@linaro.org
2021-12-10numa: Enable numa for SGX EPC sectionsYang Zhong
The basic SGX did not enable numa for SGX EPC sections, which result in all EPC sections located in numa node 0. This patch enable SGX numa function in the guest and the EPC section can work with RAM as one numa node. The Guest kernel related log: [ 0.009981] ACPI: SRAT: Node 0 PXM 0 [mem 0x180000000-0x183ffffff] [ 0.009982] ACPI: SRAT: Node 1 PXM 1 [mem 0x184000000-0x185bfffff] The SRAT table can normally show SGX EPC sections menory info in different numa nodes. The SGX EPC numa related command: ...... -m 4G,maxmem=20G \ -smp sockets=2,cores=2 \ -cpu host,+sgx-provisionkey \ -object memory-backend-ram,size=2G,host-nodes=0,policy=bind,id=node0 \ -object memory-backend-epc,id=mem0,size=64M,prealloc=on,host-nodes=0,policy=bind \ -numa node,nodeid=0,cpus=0-1,memdev=node0 \ -object memory-backend-ram,size=2G,host-nodes=1,policy=bind,id=node1 \ -object memory-backend-epc,id=mem1,size=28M,prealloc=on,host-nodes=1,policy=bind \ -numa node,nodeid=1,cpus=2-3,memdev=node1 \ -M sgx-epc.0.memdev=mem0,sgx-epc.0.node=0,sgx-epc.1.memdev=mem1,sgx-epc.1.node=1 \ ...... Signed-off-by: Yang Zhong <yang.zhong@intel.com> Message-Id: <20211101162009.62161-2-yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-11-03Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingRichard Henderson
* Build system fixes and cleanups * DMA support in the multiboot option ROM * Rename default-bus-bypass-iommu * Deprecate -watchdog and cleanup -watchdog-action * HVF fix for <PAGE_SIZE regions * Support TSC scaling for AMD nested virtualization * Fix for ESP fuzzing bug # gpg: Signature made Tue 02 Nov 2021 10:57:37 AM EDT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] * remotes/bonzini/tags/for-upstream: (27 commits) configure: fix --audio-drv-list help message configure: Remove the check for the __thread keyword Move the l2tpv3 test from configure to meson.build meson: remove unnecessary coreaudio test program meson: remove pointless warnings meson.build: Allow to disable OSS again meson: bump submodule to 0.59.3 qtest/am53c974-test: add test for cancelling in-flight requests esp: ensure in-flight SCSI requests are always cancelled KVM: SVM: add migration support for nested TSC scaling hw/i386: fix vmmouse registration watchdog: remove select_watchdog_action vl: deprecate -watchdog watchdog: add information from -watchdog help to -device help hw/i386: Rename default_bus_bypass_iommu hvf: Avoid mapping regions < PAGE_SIZE as ram configure: do not duplicate CPU_CFLAGS into QEMU_LDFLAGS configure: remove useless NPTL probe target/i386: use DMA-enabled multiboot ROM for new-enough QEMU machine types optionrom: add a DMA-enabled multiboot ROM ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-03Merge remote-tracking branch ↵Richard Henderson
'remotes/kraxel/tags/misc-20211102-pull-request' into staging MAINTAINERS: audio updates microvm: device tree support console: chardev fixes misc: deprecate sga usb: fix struct usb_msd_csw # gpg: Signature made Tue 02 Nov 2021 12:26:07 PM EDT # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] * remotes/kraxel/tags/misc-20211102-pull-request: usb-storage: tag usb_msd_csw as packed struct hw/misc: deprecate the 'sga' device ui/console: remove chardev frontend connected test ui/console: replace kbd_timer with chr_accept_input callback ui/console: replace QEMUFIFO with Fifo8 ui/gtk: skip any extra draw of same guest scanout blob res ui/gtk: Update the refresh rate for gl-area too microvm: add device tree support. MAINTAINERS: add myself as partial audio reviewer MAINTAINERS: Add myself as a reviewer for SDL audio Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02microvm: add device tree support.Gerd Hoffmann
Allows edk2 detect virtio-mmio devices and pcie ecam. See comment in hw/i386/microvm-dt.c for more details. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Sergio Lopez <slp@redhat.com> Message-Id: <20211014193617.2475578-1-kraxel@redhat.com>
2021-11-02target/i386: move linuxboot_dma_enabled to X86MachineStatePaolo Bonzini
This removes a parameter from x86_load_linux, and will avoid code duplication between the linux and multiboot cases once multiboot starts to support DMA. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-11-01hw/i386/pc: Move IOMMU singleton into PCMachineStateJean-Philippe Brucker
We're about to support a third vIOMMU for x86, virtio-iommu which doesn't inherit X86IOMMUState. Move the IOMMU singleton into PCMachineState, so it can be shared between all three vIOMMUs. The x86_iommu_get_default() helper is still needed by KVM and IOAPIC to fetch the default IRQ-remapping IOMMU. Since virtio-iommu doesn't support IRQ remapping, this interface doesn't need to change for the moment. We could later replace X86IOMMUState with an "IRQ remapping IOMMU" interface if necessary. Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Message-Id: <20211026182024.2642038-4-jean-philippe@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-11-01hw/i386/pc: Remove x86_iommu_get_type()Jean-Philippe Brucker
To generate the IOMMU ACPI table, acpi-build.c can use base QEMU types instead of a special IommuType value. Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Message-Id: <20211026182024.2642038-3-jean-philippe@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-13hw/i386/sgx: Move qmp_query_sgx() and hmp_info_sgx() to hw/i386/sgx.cPhilippe Mathieu-Daudé
Move qmp_query_sgx() and hmp_info_sgx() from target/i386/monitor.c to hw/i386/sgx.c, removing the sgx_get_info() indirection and the "hw/i386/sgx.h" header. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20211007175612.496366-5-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-10-13hw/i386/sgx: Move qmp_query_sgx_capabilities() to hw/i386/sgx.cPhilippe Mathieu-Daudé
Move qmp_query_sgx_capabilities() from target/i386/monitor.c to hw/i386/sgx.c, removing the sgx_get_capabilities() indirection. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20211007175612.496366-4-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-10-13hw/i386/sgx: Have sgx_epc_get_section() return a booleanPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20211007175612.496366-3-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-10-05acpi: x86: set enabled when composing _MAT entriesIgor Mammedov
Instead of composing disabled _MAT entry and then later on patching it to enabled for hotpluggbale CPUs in DSDT, set it to enabled at the time _MAT entry is built. It will allow to drop usage of packed structures in following patches when build_madt() is switched to use build_append_int_noprefix() API. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210924122802.1455362-24-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-09-30target/i386: Add the query-sgx-capabilities QMP commandYang Zhong
Libvirt can use query-sgx-capabilities to get the host sgx capabilities to decide how to allocate SGX EPC size to VM. Signed-off-by: Yang Zhong <yang.zhong@intel.com> Message-Id: <20210910102258.46648-3-yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-09-30target/i386: Add HMP and QMP interfaces for SGXYang Zhong
The QMP and HMP interfaces can be used by monitor or QMP tools to retrieve the SGX information from VM side when SGX is enabled on Intel platform. Signed-off-by: Yang Zhong <yang.zhong@intel.com> Message-Id: <20210910102258.46648-2-yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
generated by cgit v1.2.3 (git 2.26.2) at 2025-01-17 18:53:59 +0000