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AgeCommit message (Expand)Author
2022-05-13vhost: Fix element in vhost_svq_add failureEugenio Pérez
2022-05-13hw/virtio: Replace g_memdup() by g_memdup2()Philippe Mathieu-Daudé
2022-05-13vdpa: Fix index calculus at vhost_vdpa_svqs_startEugenio Pérez
2022-05-13vdpa: Fix bad index calculus at vhost_vdpa_get_vring_baseEugenio Pérez
2022-05-13vhost: Fix device's used descriptor dequeueEugenio Pérez
2022-05-13vhost: Track descriptor chain in private at SVQEugenio Pérez
2022-05-13i386/pc: Enable CXL fixed memory windowsJonathan Cameron
2022-05-13hw/cxl/component Add a dumb HDM decoder handlerBen Widawsky
2022-05-13cxl/cxl-host: Add memops for CFMWS region.Jonathan Cameron
2022-05-13mem/cxl_type3: Add read and write functions for associated hostmem.Jonathan Cameron
2022-05-13CXL/cxl_component: Add cxl_get_hb_cstate()Jonathan Cameron
2022-05-13pci/pcie_port: Add pci_find_port_by_pn()Jonathan Cameron
2022-05-13hw/pci-host/gpex-acpi: Add support for dsdt construction for pxb-cxlJonathan Cameron
2022-05-13acpi/cxl: Introduce CFMWS structures in CEDTBen Widawsky
2022-05-13hw/cxl/host: Add support for CXL Fixed Memory Windows.Jonathan Cameron
2022-05-13hw/cxl/component: Add utils for interleave parameter encoding/decodingJonathan Cameron
2022-05-13acpi/cxl: Create the CEDT (9.14.1)Ben Widawsky
2022-05-13acpi/cxl: Add _OSC implementation (9.14.2)Ben Widawsky
2022-05-13hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142)Ben Widawsky
2022-05-13hw/cxl/device: Implement get/set Label Storage Area (LSA)Ben Widawsky
2022-05-13hw/cxl/device: Plumb real Label Storage Area (LSA) sizingBen Widawsky
2022-05-13hw/cxl/device: Add some trivial commandsBen Widawsky
2022-05-13hw/cxl/device: Implement MMIO HDM decoding (8.2.5.12)Ben Widawsky
2022-05-13hw/cxl/device: Add a memory device (8.2.8.5)Ben Widawsky
2022-05-13hw/cxl/rp: Add a root portBen Widawsky
2022-05-13hw/pxb: Allow creation of a CXL PXB (host bridge)Ben Widawsky
2022-05-13cxl: Machine level control on whether CXL support is enabledJonathan Cameron
2022-05-13hw/pci/cxl: Create a CXL bus typeBen Widawsky
2022-05-13hw/pxb: Use a type for realizing expandersBen Widawsky
2022-05-13hw/cxl/device: Add log commands (8.2.9.4) + CELBen Widawsky
2022-05-13hw/cxl/device: Timestamp implementation (8.2.9.3)Ben Widawsky
2022-05-13hw/cxl/device: Add cheap EVENTS implementation (8.2.9.1)Ben Widawsky
2022-05-13hw/cxl/device: Add memory device utilitiesBen Widawsky
2022-05-13hw/cxl/device: Implement basic mailbox (8.2.8.4)Ben Widawsky
2022-05-13hw/cxl/device: Implement the CAP array (8.2.8.1-2)Ben Widawsky
2022-05-13hw/cxl/component: Introduce CXL components (8.1.x, 8.2.5)Ben Widawsky
2022-05-13hw/pci/cxl: Add a CXL component type (interface)Ben Widawsky
2022-05-13intel-iommu: correct the value used for error_setg_errno()Jason Wang
2022-05-13virtio: fix feature negotiation for ACCESS_PLATFORMHalil Pasic
2022-05-12Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingRichard Henderson
2022-05-12hw/block/fdc: Prevent end-of-track overrun (CVE-2021-3507)Philippe Mathieu-Daudé
2022-05-12vhost-backend: do not depend on CONFIG_VHOST_VSOCKPaolo Bonzini
2022-05-12machine: move more memory validation to Machine objectPaolo Bonzini
2022-05-12machine: make memory-backend a link propertyPaolo Bonzini
2022-05-12machine: add mem compound propertyPaolo Bonzini
2022-05-12machine: add boot compound propertyPaolo Bonzini
2022-05-12machine: use QAPI struct for boot configurationPaolo Bonzini
2022-05-12coroutine: Rename qemu_coroutine_inc/dec_pool_size()Kevin Wolf
2022-05-12hw/xen/xen_pt: Resolve igd_passthrough_isa_bridge_create() indirectionBernhard Beschow
2022-05-12hw/xen/xen_pt: Confine igd-passthrough-isa-bridge to XENBernhard Beschow