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2024-02-14hw/mem/cxl_type3: Drop handling of failure of g_malloc0() and g_malloc()Jonathan Cameron
As g_malloc0/g_malloc() will just exit QEMU on failure there is no point in checking for it failing. Reviewed-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20240126120132.24248-3-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14cxl/cdat: Handle cdat table build errorsIra Weiny
The callback for building CDAT tables may return negative error codes. This was previously unhandled and will result in potentially huge allocations later on in ct3_build_cdat() Detect the negative error code and defer cdat building. Fixes: f5ee7413d592 ("hw/mem/cxl-type3: Add CXL CDAT Data Object Exchange") Cc: Huai-Cheng Kuo <hchkuo@avery-design.com.tw> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Reviewed-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20240126120132.24248-2-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14smmu: Clear SMMUPciBus pointer cache when system resetZhenzhong Duan
s->smmu_pcibus_by_bus_num is a SMMUPciBus pointer cache indexed by bus number, bus number may not always be a fixed value, i.e., guest reboot to different kernel which set bus number with different algorithm. This could lead to smmu_iommu_mr() providing the wrong iommu MR. Suggested-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Message-Id: <20240125073706.339369-3-zhenzhong.duan@intel.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14virtio_iommu: Clear IOMMUPciBus pointer cache when system resetZhenzhong Duan
s->iommu_pcibus_by_bus_num is a IOMMUPciBus pointer cache indexed by bus number, bus number may not always be a fixed value, i.e., guest reboot to different kernel which set bus number with different algorithm. This could lead to endpoint binding to wrong iommu MR in virtio_iommu_get_endpoint(), then vfio device setup wrong mapping from other device. Remove the memset in virtio_iommu_device_realize() to avoid redundancy with memset in system reset. Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Message-Id: <20240125073706.339369-2-zhenzhong.duan@intel.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14hw/isa/vt82c686: Implement relocation and toggling of SuperI/O functionsBernhard Beschow
The VIA south bridges are able to relocate and toggle (enable or disable) their SuperI/O functions. So far this is hardcoded such that all functions are always enabled and are located at fixed addresses. Some PC BIOSes seem to probe for I/O occupancy before activating such a function and issue an error in case of a conflict. Since the functions are currently enabled on reset, conflicts are always detected. Prevent that by implementing relocation and toggling of the SuperI/O functions. Note that all SuperI/O functions are now deactivated upon reset (except for VT82C686B's serial ports where Fuloong 2e's rescue-yl seems to expect them to be enabled by default). Rely on firmware to configure the functions accordingly. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <20240114123911.4877-12-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14hw/ppc/pegasos2: Let pegasos2 machine configure SuperI/O functionsBernhard Beschow
This is a preparation for implementing relocation and toggling of SuperI/O functions in the VT8231 device model. Upon reset, all SuperI/O functions will be deactivated, so in case if no -bios is given, let the machine configure those functions the same way Pegasos II firmware would do. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <20240114123911.4877-11-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14hw/char/parallel-isa: Implement relocation and enabling/disabling for ↵Bernhard Beschow
TYPE_ISA_PARALLEL The real SuperI/O chips emulated by QEMU allow for relocating and enabling or disabling their SuperI/O functions via software. So far this is not implemented. Prepare for that by adding isa_parallel_set_{enabled,iobase}. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20240114123911.4877-10-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14hw/char/serial-isa: Implement relocation and enabling/disabling for ↵Bernhard Beschow
TYPE_ISA_SERIAL The real SuperI/O chips emulated by QEMU allow for relocating and enabling or disabling their SuperI/O functions via software. So far this is not implemented. Prepare for that by adding isa_serial_set_{enabled,iobase}. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20240114123911.4877-9-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14hw/block/fdc-isa: Implement relocation and enabling/disabling for TYPE_ISA_FDCBernhard Beschow
The real SuperI/O chips emulated by QEMU allow for relocating and enabling or disabling their SuperI/O functions via software. So far this is not implemented. Prepare for that by adding isa_fdc_set_{enabled,iobase}. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20240114123911.4877-8-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14hw/char/parallel: Move portio_list from ParallelState to ISAParallelStateBernhard Beschow
ParallelState::portio_list isn't used inside ParallelState context but only inside ISAParallelState context, so move it there. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <20240114123911.4877-4-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14hw/block/fdc-sysbus: Move iomem from FDCtrl to FDCtrlSysBusBernhard Beschow
FDCtrl::iomem isn't used inside FDCtrl context but only inside FDCtrlSysBus context, so move it there. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <20240114123911.4877-3-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14hw/block/fdc-isa: Move portio_list from FDCtrl to FDCtrlISABusBernhard Beschow
FDCtrl::portio_list isn't used inside FDCtrl context but only inside FDCtrlISABus context, so move it there. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <20240114123911.4877-2-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14hw/i386/x86: Fix PIC interrupt handling if APIC is globally disabledBernhard Beschow
QEMU populates the apic_state attribute of x86 CPUs if supported by real hardware or if SMP is active. When handling interrupts, it just checks whether apic_state is populated to route the interrupt to the PIC or to the APIC. However, chapter 10.4.3 of [1] requires that: When IA32_APIC_BASE[11] is 0, the processor is functionally equivalent to an IA-32 processor without an on-chip APIC. This means that when apic_state is populated, QEMU needs to check for the MSR_IA32_APICBASE_ENABLE flag in addition. Implement this which fixes some real-world BIOSes. [1] Intel 64 and IA-32 Architectures Software Developer's Manual, Vol. 3A: System Programming Guide, Part 1 Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20240106132546.21248-3-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14hw/i386/x86: Reverse if statementBernhard Beschow
The if statement currently uses double negation when executing the else branch. So swap the branches and simplify the condition to make the code more comprehensible. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Message-Id: <20240106132546.21248-2-shentey@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14amd_iommu: report x2APIC support to the operating systemBui Quang Minh
This commit adds XTSup configuration to let user choose to whether enable this feature or not. When XTSup is enabled, additional bytes in IRTE with enabled guest virtual VAPIC are used to support 32-bit destination id. Additionally, this commit exports IVHD type 0x11 besides the old IVHD type 0x10 in ACPI table. IVHD type 0x10 does not report full set of IOMMU features only the legacy ones, so operating system (e.g. Linux) may only detects x2APIC support if IVHD type 0x11 is available. The IVHD type 0x10 is kept so that old operating system that only parses type 0x10 can detect the IOMMU device. Besides, an amd_iommu-stub.c file is created to provide the definition for amdvi_extended_feature_register when CONFIG_AMD_IOMMU=n. This function is used by acpi-build.c to get the extended feature register value for building the ACPI table. When CONFIG_AMD_IOMMU=y, this function is defined in amd_iommu.c. Signed-off-by: Bui Quang Minh <minhquangbui99@gmail.com> Message-Id: <20240111154404.5333-7-minhquangbui99@gmail.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14intel_iommu: allow Extended Interrupt Mode when using userspace APICBui Quang Minh
As userspace APIC now supports x2APIC, intel interrupt remapping hardware can be set to EIM mode when userspace local APIC is used. Suggested-by: Joao Martins <joao.m.martins@oracle.com> Acked-by: Peter Xu <peterx@redhat.com> Signed-off-by: Bui Quang Minh <minhquangbui99@gmail.com> Message-Id: <20240111154404.5333-5-minhquangbui99@gmail.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14apic, i386/tcg: add x2apic transitionsBui Quang Minh
This commit adds support for x2APIC transitions when writing to MSR_IA32_APICBASE register and finally adds CPUID_EXT_X2APIC to TCG_EXT_FEATURES. The set_base in APICCommonClass now returns an integer to indicate error in execution. apic_set_base return -1 on invalid APIC state transition, accelerator can use this to raise appropriate exception. Signed-off-by: Bui Quang Minh <minhquangbui99@gmail.com> Message-Id: <20240111154404.5333-4-minhquangbui99@gmail.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14apic: add support for x2APIC modeBui Quang Minh
This commit extends the APIC ID to 32-bit long and remove the 255 max APIC ID limit in userspace APIC. The array that manages local APICs is now dynamically allocated based on the max APIC ID of created x86 machine. Also, new x2APIC IPI destination determination scheme, self IPI and x2APIC mode register access are supported. Signed-off-by: Bui Quang Minh <minhquangbui99@gmail.com> Message-Id: <20240111154404.5333-3-minhquangbui99@gmail.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14i386/tcg: implement x2APIC registers MSR accessBui Quang Minh
This commit creates apic_register_read/write which are used by both apic_mem_read/write for MMIO access and apic_msr_read/write for MSR access. The apic_msr_read/write returns -1 on error, accelerator can use this to raise the appropriate exception. Signed-off-by: Bui Quang Minh <minhquangbui99@gmail.com> Message-Id: <20240111154404.5333-2-minhquangbui99@gmail.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14hw/virtio: derive vhost-user-input from vhost-user-baseLeo Yan
This patch derives vhost-user-input from vhost-user-base class, so make the input stub as a simpler boilerplate wrapper. With the refactoring, vhost-user-input adds the property 'chardev', this leads to conflict with the vhost-user-input-pci adds the same property. To resolve the error, remove the duplicate property from vhost-user-input-pci. Signed-off-by: Leo Yan <leo.yan@linaro.org> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Message-Id: <20231120043721.50555-5-leo.yan@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240104210945.1223134-12-alex.bennee@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14hw/virtio: Move vhost-user-input into virtio folderLeo Yan
vhost-user-input is in the input folder. On the other hand, the folder 'hw/virtio' maintains other virtio stubs (e.g. I2C, RNG, GPIO, etc). This patch moves vhost-user-input into the virtio folder for better code organization. No functionality change. Signed-off-by: Leo Yan <leo.yan@linaro.org> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Message-Id: <20231120043721.50555-4-leo.yan@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240104210945.1223134-11-alex.bennee@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14hw/virtio: Support set_config() callback in vhost-user-baseLeo Yan
The Virtio input device invokes set_config() callback for retrieving the event configuration info, but the callback is not supported in vhost-user-base. This patch adds support set_config() callback in vhost-user-base. Signed-off-by: Leo Yan <leo.yan@linaro.org> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20231120043721.50555-2-leo.yan@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240104210945.1223134-9-alex.bennee@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14hw/virtio: add vhost-user-snd and vhost-user-snd-pci devicesManos Pitsidianakis
Tested with rust-vmm vhost-user-sound daemon: RUST_LOG=trace cargo run --bin vhost-user-sound -- --socket /tmp/snd.sock --backend null Invocation: qemu-system-x86_64 \ -qmp unix:./qmp-sock,server,wait=off \ -m 4096 \ -numa node,memdev=mem \ -object memory-backend-file,id=mem,size=4G,mem-path=/dev/shm,share=on \ -D qemu.log \ -d guest_errors,trace:\*snd\*,trace:\*sound\*,trace:\*vhost\* \ -chardev socket,id=vsnd,path=/tmp/snd.sock \ -device vhost-user-snd-pci,chardev=vsnd,id=snd \ /path/to/disk [AJB: imported from https://github.com/epilys/qemu-virtio-snd/commit/54ae1cdd15fef2d88e9e387a175f099a38c636f4.patch] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Message-Id: <20240104210945.1223134-7-alex.bennee@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14hw/virtio: derive vhost-user-i2c from vhost-user-baseAlex Bennée
Now we can take advantage of the new base class and make vhost-user-i2c a much simpler boilerplate wrapper. Also as this doesn't require any target specific hacks we only need to build the stubs once. Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240104210945.1223134-6-alex.bennee@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14hw/virtio: derive vhost-user-gpio from vhost-user-baseAlex Bennée
Now the new base class supports config handling we can take advantage and make vhost-user-gpio a much simpler boilerplate wrapper. Also as this doesn't require any target specific hacks we only need to build the stubs once. Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240104210945.1223134-5-alex.bennee@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14hw/virtio: derive vhost-user-rng from vhost-user-baseAlex Bennée
Now we can take advantage of our new base class and make vhost-user-rng a much simpler boilerplate wrapper. Also as this doesn't require any target specific hacks we only need to build the stubs once. Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240104210945.1223134-4-alex.bennee@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14hw/virtio: convert vhost-user-base to async shutdownAlex Bennée
We are about to convert at least one stubs which was using the async teardown so lets use it for all the cases. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240104210945.1223134-3-alex.bennee@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-14virtio: split into vhost-user-base and vhost-user-deviceAlex Bennée
Lets keep a cleaner split between the base class and the derived vhost-user-device which we can use for generic vhost-user stubs. This includes an update to introduce the vq_size property so the number of entries in a virtq can be defined. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20240104210945.1223134-2-alex.bennee@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2024-02-13esp.c: add my copyright to the fileMark Cave-Ayland
This series has involved rewriting and/or updating a considerable part of the ESP emulation so update the copyright in esp.c to reflect this. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-89-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: switch TypeInfo registration to use DEFINE_TYPES() macroMark Cave-Ayland
The use of the DEFINE_TYPES() macro will soon be recommended over the use of calling type_init() directly. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240112125420.514425-88-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: keep track of the DRQ state during DMAMark Cave-Ayland
Currently the DRQ IRQ is updated every time DMA data is sent/received which is both inefficient and causes excessive logging of the DRQ state. Add a new drq_state bool that only updates the DRQ IRQ if its state changes. This commit adds the new drq_state bool to the migration state: since the version number has already been increased earlier in the series, there is no need to repeat it again here. The DRQ IRQ is (currently) only used for PDMA transfers which already have a migration break in this series so there are no problems setting its value post-load. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-87-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: rename irq_data IRQ to drq_irqMark Cave-Ayland
The IRQ represented by irq_data is actually the DRQ (DMA request) line so rename it accordingly. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-86-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: implement DMA Transfer Pad command for DATA phasesMark Cave-Ayland
The Transfer Pad command is used to either drop incoming FIFO data during the DATA IN phase or generate a series of zero bytes in the FIFO during the DATA OUT phase. Implement the DMA Transfer Pad command for the DATA phases which is used by the NeXTCube firmware in the DATA IN phase to ignore part of the incoming SCSI data as it is copied into memory. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-85-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: replace n variable with len in esp_do_nodma()Mark Cave-Ayland
This brings esp_do_nodma() in line with esp_do_dma(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-84-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: consolidate DMA and PDMA logic in STATUS and MESSAGE IN phasesMark Cave-Ayland
This allows the removal of duplicate logic shared between the two implementations. Note that we restrict esp_raise_drq() to PDMA to help reduce the log verbosity for normal DMA. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-83-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: remove redundant n variable in PDMA COMMAND phaseMark Cave-Ayland
This variable can be replaced by the existing len variable. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-82-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: consolidate DMA and PDMA logic in MESSAGE OUT phaseMark Cave-Ayland
This allows the removal of duplicate logic shared between the two implementations. Note that we restrict esp_raise_drq() to PDMA to help reduce the log verbosity for normal DMA. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-81-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: consolidate DMA and PDMA logic in DATA IN phaseMark Cave-Ayland
This allows the removal of duplicate logic shared between the two implementations. Note that we restrict esp_raise_drq() to PDMA to help reduce the log verbosity for normal DMA. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-80-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: consolidate DMA and PDMA logic in DATA OUT phaseMark Cave-Ayland
This allows the removal of duplicate logic shared between the two implementations. Note that we restrict esp_raise_drq() to PDMA to help reduce the log verbosity for normal DMA. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-79-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: only transfer non-DMA MESSAGE OUT phase data for specific commandsMark Cave-Ayland
The contents of the FIFO should only be copied to cmdfifo for ESP commands that are sending data to the SCSI bus, which are the SEL_* commands and the TI command. Otherwise any incoming data should be held in the FIFO as normal. This fixes booting of NetBSD m68k under the Q800 machine once again. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-78-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: only transfer non-DMA COMMAND phase data for specific commandsMark Cave-Ayland
The contents of the FIFO should only be copied to cmdfifo for ESP commands that are sending data to the SCSI bus, which are the SEL_* commands and the TI command. Otherwise any incoming data should be held in the FIFO as normal. This fixes booting of really old 32-bit SPARC Linux kernels such as Aurelien's debian_etch_sparc_small.qcow2 test image. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-77-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: improve ESP_RSEQ logic consolidationMark Cave-Ayland
The ESP_RSEQ logic is scattered in a few places throughout the ESP state machine which is mainly because the ESP_RSEQ register isn't always reset when executing an ESP select command. Once this is done, the ESP_RSEQ register only needs to be updated at the point where the sequencer command completes. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-76-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: handle non-DMA FIFO writes used to terminate DMA commandsMark Cave-Ayland
Certain versions of MacOS send the first 5 bytes of the CDB using DMA and then send the last byte of the CDB by writing to the FIFO. Update the non-DMA state machine to detect the end of the CDB and execute the SCSI command using similar logic as that which already exists for transferring the remainder of the CDB using the ESP TI command. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-75-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: remove restriction on FIFO read access when DMA memory routines definedMark Cave-Ayland
The latest state machines can handle mixing DMA and non-DMA FIFO access for all SCSI phases except DATA IN and DATA OUT. For DATA IN and DATA OUT phases, the transfer is complete when TC == 0 and the updated logic will now handle TC underflow correctly, which makes it just about impossible to manually manipulate the FIFO during a DMA transfer. Remove the restriction on FIFO read access when DMA memory routines are defined which also allows the NeXTCube machine to pass its self-test. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-74-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: handle TC underflow for DMA SCSI requestsMark Cave-Ayland
Detect the case where the guest underflows TC by requesting a DMA transfer which is larger than the available data. If this case is detected, immediately complete the SCSI request and handle any remaining FIFO accesses in the STATUS phase by raising INTR_BS once the FIFO is below the threshold. Note that handling the premature SCSI bus phase change in the case of TC underflow fixes booting EMILE on m68k once again. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-73-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: don't clear the SCSI phase when reading ESP_RINTRMark Cave-Ayland
According to the documentation ESP_RSTAT is cleared (except the STAT_TC bit) when ESP_RINTR is read. This should not include the SCSI bus phase bits which are currently live from the SCSI bus, otherwise the current SCSI phase is lost when clearing an end-of-transfer interrupt. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-72-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: ensure that STAT_INT is cleared when reading ESP_RINTRMark Cave-Ayland
Both esp_raise_irq() and esp_lower_irq() check the STAT_INT bit in ESP_RSTAT to ensure that the IRQ is raised or lowered if its state changes. When reading ESP_RINTR, esp_lower_irq() was being called *after* ESP_RSTAT had been cleared meaning that STAT_INT was already clear, and so if STAT_INT was asserted beforehand then the esp_lower_irq() would have no effect. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-71-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: consolidate end of command sequence after ICCS commandMark Cave-Ayland
The end of command sequences for the ICCS command are currently different between the DMA and non-DMA versions, and also different from the description in the datasheet. Update the sequence so that only INTR_FC is asserted in both cases, and keep all the logic in esp_do_dma() and esp_do_nodma() rather than having some of it within esp_run_cmd(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-70-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: move write_response() non-DMA logic to esp_do_nodma()Mark Cave-Ayland
This moves the remaining non-DMA STATUS and MESSAGE IN phase logic from write_response() to esp_do_nodma(). Note that we can also now drop the extra fifo_reset() which is no longer required. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-69-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2024-02-13esp.c: replace get_cmd() with esp_do_nodma()Mark Cave-Ayland
Now that the esp_do_nodma() state machine correctly handles incoming FIFO data, all remaining users of get_cmd() can be replaced with esp_do_nodma() and the get_cmd() function removed completely. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: Helge Deller <deller@gmx.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240112125420.514425-68-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
generated by cgit v1.2.3 (git 2.26.2) at 2025-03-16 17:32:19 +0000