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AgeCommit message (Expand)Author
2020-12-10i386: do not use ram_size globalPaolo Bonzini
2020-12-10hppa: do not use ram_size globalPaolo Bonzini
2020-12-10cris: do not use ram_size globalPaolo Bonzini
2020-12-10arm: do not use ram_size globalPaolo Bonzini
2020-12-10digic: remove bios_namePaolo Bonzini
2020-12-10sparc: remove bios_namePaolo Bonzini
2020-12-10sh4: remove bios_namePaolo Bonzini
2020-12-10s390: remove bios_namePaolo Bonzini
2020-12-10rx: move BIOS load from MCU to boardPaolo Bonzini
2020-12-10ppc: remove bios_namePaolo Bonzini
2020-12-10moxie: remove bios_namePaolo Bonzini
2020-12-10mips: remove bios_namePaolo Bonzini
2020-12-10m68k: remove bios_namePaolo Bonzini
2020-12-10lm32: remove bios_namePaolo Bonzini
2020-12-10i386: remove bios_namePaolo Bonzini
2020-12-10hppa: remove bios_namePaolo Bonzini
2020-12-10arm: remove bios_namePaolo Bonzini
2020-12-10alpha: remove bios_namePaolo Bonzini
2020-12-10hw/net/xilinx_axienet: Rename StreamSlave as StreamSinkPhilippe Mathieu-Daudé
2020-12-10hw/dma/xilinx_axidma: Rename StreamSlave as StreamSinkPhilippe Mathieu-Daudé
2020-12-10hw/core/stream: Rename StreamSlave as StreamSinkPhilippe Mathieu-Daudé
2020-12-10hw/ssi: Rename SSI 'slave' as 'peripheral'Philippe Mathieu-Daudé
2020-12-10hw/ssi/aspeed_smc: Rename 'max_slaves' variable as 'max_peripherals'Philippe Mathieu-Daudé
2020-12-10WHPX: support for the kernel-irqchip on/offSunil Muthuswamy
2020-12-10target/i386: Support up to 32768 CPUs without IRQ remappingDavid Woodhouse
2020-12-10Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20201210' int...Peter Maydell
2020-12-10Merge remote-tracking branch 'remotes/kraxel/tags/microvm-20201210-pull-reque...Peter Maydell
2020-12-10hw/arm/armv7m: Correct typo in QOM object namePeter Maydell
2020-12-10hw/intc/armv7m_nvic: Implement read/write for RAS register blockPeter Maydell
2020-12-10target/arm: Implement M-profile "minimal RAS implementation"Peter Maydell
2020-12-10hw/intc/armv7m_nvic: Fix "return from inactive handler" checkPeter Maydell
2020-12-10hw/intc/armv7m_nvic: Support v8.1M CCR.TRD bitPeter Maydell
2020-12-10target/arm: Implement v8.1M REVIDR registerPeter Maydell
2020-12-10hw/intc/armv7m_nvic: Update FPDSCR masking for v8.1MPeter Maydell
2020-12-10hw/intc/armv7m_nvic: Make all of system PPB range be RAZWI/BusFaultPeter Maydell
2020-12-10i.MX6ul: Fix bad printf format specifiersAlex Chen
2020-12-10i.MX6: Fix bad printf format specifiersAlex Chen
2020-12-10i.MX31: Fix bad printf format specifiersAlex Chen
2020-12-10i.MX25: Fix bad printf format specifiersAlex Chen
2020-12-10sbsa-ref: allow to use Cortex-A53/57/72 cpusMarcin Juszkiewicz
2020-12-10xlnx-zynqmp: Connect Xilinx ZynqMP CAN controllersVikram Garhwal
2020-12-10hw/net/can: Introduce Xilinx ZynqMP CAN controllerVikram Garhwal
2020-12-10hw/arm/smmuv3: Fix up L1STD_SPAN decodingKunkun Jiang
2020-12-10aspeed: g220a-bmc: Add an FRUJohn Wang
2020-12-10aspeed/smc: Add support for address lane disablementCédric Le Goater
2020-12-10ast2600: SRAM is 89KBJoel Stanley
2020-12-10aspeed: Add support for the g220a-bmc boardJohn Wang
2020-12-10hw/misc: add an EMC141{3,4} device modelJohn Wang
2020-12-10microvm: add second ioapicGerd Hoffmann
2020-12-10microvm: drop microvm_gsi_handler()Gerd Hoffmann
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