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AgeCommit message (Expand)Author
2023-11-07hw/cxl: Add support for device sanitationDavidlohr Bueso
2023-11-07hw/cxl/mbox: Wire up interrupts for background completionDavidlohr Bueso
2023-11-07hw/cxl/mbox: Add support for background operationsDavidlohr Bueso
2023-11-07hw/cxl: Implement Physical Ports status retrievalJonathan Cameron
2023-11-07hw/pci-bridge/cxl_downstream: Set default link width and link speedJonathan Cameron
2023-11-07hw/cxl/mbox: Add Physical Switch Identify command.Jonathan Cameron
2023-11-07hw/cxl/mbox: Add Information and Status / Identify commandJonathan Cameron
2023-11-07hw/cxl: Add a switch mailbox CCI functionJonathan Cameron
2023-11-07hw/pci-bridge/cxl_upstream: Move defintion of device to header.Jonathan Cameron
2023-11-07hw/cxl/mbox: Generalize the CCI command processingJonathan Cameron
2023-11-07hw/cxl/mbox: Pull the CCI definition out of the CXLDeviceStateJonathan Cameron
2023-11-07hw/cxl/mbox: Split mailbox command payload into separate input and outputJonathan Cameron
2023-11-07hw/cxl/mbox: Pull the payload out of struct cxl_cmd and make instances constantJonathan Cameron
2023-11-07hw/cxl: Fix a QEMU_BUILD_BUG_ON() in switch statement scope issue.Jonathan Cameron
2023-11-07hw/cxl: Line length reductionsJonathan Cameron
2023-11-07hw/cxl: CXLDVSECPortExtensions renamed to CXLDVSECPortExtJonathan Cameron
2023-11-07hw/cxl: Use switch statements for read and write of cachemem registersJonathan Cameron
2023-11-07hw/cxl: Use a switch to explicitly check size in caps_reg_read()Jonathan Cameron
2023-11-07virtio-sound: implement audio capture (RX)Manos Pitsidianakis
2023-11-07virtio-sound: implement audio output (TX)Manos Pitsidianakis
2023-11-07virtio-sound: handle VIRTIO_SND_R_PCM_RELEASEManos Pitsidianakis
2023-11-07virtio-sound: handle VIRTIO_SND_R_PCM_PREPAREManos Pitsidianakis
2023-11-07virtio-sound: handle VIRTIO_SND_R_PCM_SET_PARAMSManos Pitsidianakis
2023-11-07virtio-sound: handle VIRTIO_SND_R_PCM_{START,STOP}Manos Pitsidianakis
2023-11-07virtio-sound: handle VIRTIO_SND_R_PCM_INFO requestManos Pitsidianakis
2023-11-07virtio-sound: handle control messages and streamsManos Pitsidianakis
2023-11-07Add virtio-sound-pci deviceManos Pitsidianakis
2023-11-07Add virtio-sound device stubManos Pitsidianakis
2023-11-07vhost-user-fs: Implement internal migrationHanna Czenczek
2023-11-07vhost: Add high-level state save/load functionsHanna Czenczek
2023-11-07vhost-user: Interface for migration state transferHanna Czenczek
2023-11-07Merge tag 'pull-pa-20231106' of https://gitlab.com/rth7680/qemu into stagingStefan Hajnoczi
2023-11-07Merge tag 'pull-riscv-to-apply-20231107' of https://github.com/alistair23/qem...Stefan Hajnoczi
2023-11-06hw/hppa: Allow C3700 with 64-bit and B160L with 32-bit CPU onlyHelge Deller
2023-11-06hw/hppa: Turn on 64-bit CPU for C3700 machineHelge Deller
2023-11-06hw/pci-host/astro: Trigger CPU irq on CPU HPA in high memoryHelge Deller
2023-11-06hw/pci-host/astro: Map Astro chip into 64-bit I/O memory regionHelge Deller
2023-11-06hw/hppa: Translate phys addresses for the cpuRichard Henderson
2023-11-06hw/hppa: Use uint32_t instead of target_uregRichard Henderson
2023-11-06target/hppa: Make HPPA_BTLB_ENTRIES variableRichard Henderson
2023-11-07Merge tag 'pull-target-arm-20231106' of https://git.linaro.org/people/pmaydel...Stefan Hajnoczi
2023-11-07Merge tag 'pull-vfio-20231106' of https://github.com/legoater/qemu into stagingStefan Hajnoczi
2023-11-07Merge tag 'pull-hv-balloon-20231106' of https://github.com/maciejsszmigiero/q...Stefan Hajnoczi
2023-11-07Merge tag 'gpu-pull-request' of https://gitlab.com/marcandre.lureau/qemu into...Stefan Hajnoczi
2023-11-07Merge tag 'pull-xenfv-stable-20231106' of git://git.infradead.org/users/dwmw2...Stefan Hajnoczi
2023-11-07target/riscv: Use existing PMU counter mask in FDT generationRob Bradford
2023-11-07hw/ssi: ibex_spi_host: Clear the interrupt even if disabledAlistair Francis
2023-11-07target/riscv: rename ext_icboz to ext_zicbozDaniel Henrique Barboza
2023-11-07target/riscv: rename ext_icbom to ext_zicbomDaniel Henrique Barboza
2023-11-07target/riscv: rename ext_icsr to ext_zicsrDaniel Henrique Barboza
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