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2023-10-20qapi/s390x/cpu topology: set-cpu-topology qmp commandPierre Morel
The modification of the CPU attributes are done through a monitor command. It allows to move the core inside the topology tree to optimize the cache usage in the case the host's hypervisor previously moved the CPU. The same command allows to modify the CPU attributes modifiers like polarization entitlement and the dedicated attribute to notify the guest if the host admin modified scheduling or dedication of a vCPU. With this knowledge the guest has the possibility to optimize the usage of the vCPUs. The command has a feature unstable for the moment. Signed-off-by: Pierre Morel <pmorel@linux.ibm.com> Reviewed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Co-developed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Acked-by: Markus Armbruster <armbru@redhat.com> Message-ID: <20231016183925.2384704-10-nsg@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-10-20target/s390x/cpu topology: activate CPU topologyPierre Morel
The KVM capability KVM_CAP_S390_CPU_TOPOLOGY is used to activate the S390_FEAT_CONFIGURATION_TOPOLOGY feature and the topology facility in the host CPU model for the guest in the case the topology is available in QEMU and in KVM. The feature is disabled by default and fenced for SE (secure execution). Signed-off-by: Pierre Morel <pmorel@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20231016183925.2384704-9-nsg@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-10-20s390x/cpu topology: interception of PTF instructionPierre Morel
When the host supports the CPU topology facility, the PTF instruction with function code 2 is interpreted by the SIE, provided that the userland hypervisor activates the interpretation by using the KVM_CAP_S390_CPU_TOPOLOGY KVM extension. The PTF instructions with function code 0 and 1 are intercepted and must be emulated by the userland hypervisor. During RESET all CPU of the configuration are placed in horizontal polarity. Signed-off-by: Pierre Morel <pmorel@linux.ibm.com> Reviewed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Co-developed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Message-ID: <20231016183925.2384704-8-nsg@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-10-20s390x/cpu topology: resetting the Topology-Change-ReportPierre Morel
During a subsystem reset the Topology-Change-Report is cleared by the machine. Let's ask KVM to clear the Modified Topology Change Report (MTCR) bit of the SCA in the case of a subsystem reset. Signed-off-by: Pierre Morel <pmorel@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Co-developed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Message-ID: <20231016183925.2384704-7-nsg@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-10-20s390x/sclp: reporting the maximum nested topology entriesPierre Morel
The maximum nested topology entries is used by the guest to know how many nested topology are available on the machine. Let change the MNEST value from 2 to 4 in the SCLP READ INFO structure now that we support books and drawers. Signed-off-by: Pierre Morel <pmorel@linux.ibm.com> Reviewed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-ID: <20231016183925.2384704-6-nsg@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-10-20target/s390x/cpu topology: handle STSI(15) and build the SYSIBPierre Morel
On interception of STSI(15.1.x) the System Information Block (SYSIB) is built from the list of pre-ordered topology entries. Signed-off-by: Pierre Morel <pmorel@linux.ibm.com> Reviewed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Co-developed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Message-ID: <20231016183925.2384704-5-nsg@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-10-20s390x/cpu topology: add topology entries on CPU hotplugPierre Morel
The topology information are attributes of the CPU and are specified during the CPU device creation. On hot plug we: - calculate the default values for the topology for drawers, books and sockets in the case they are not specified. - verify the CPU attributes - check that we have still room on the desired socket The possibility to insert a CPU in a mask is dependent on the number of cores allowed in a socket, a book or a drawer, the checking is done during the hot plug of the CPU to have an immediate answer. If the complete topology is not specified, the core is added in the physical topology based on its core ID and it gets defaults values for the modifier attributes. This way, starting QEMU without specifying the topology can still get some advantage of the CPU topology. Signed-off-by: Pierre Morel <pmorel@linux.ibm.com> Reviewed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Co-developed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Message-ID: <20231016183925.2384704-4-nsg@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-10-20CPU topology: extend with s390 specificsPierre Morel
S390 adds two new SMP levels, drawers and books to the CPU topology. S390 CPUs have specific topology features like dedication and entitlement. These indicate to the guest information on host vCPU scheduling and help the guest make better scheduling decisions. Add the new levels to the relevant QAPI structs. Add all the supported topology levels, dedication and entitlement as properties to S390 CPUs. Create machine-common.json so we can later include it in machine-target.json also. Signed-off-by: Pierre Morel <pmorel@linux.ibm.com> Reviewed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Co-developed-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Message-ID: <20231016183925.2384704-3-nsg@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-10-20hw/hppa: Add new HP C3700 machineHelge Deller
Add code to create an emulated C3700 machine. It includes the following components: - HP Powerbar SP2 Diva BMC card (serial port only) - PCI 4x serial card (for serial ports #1-#4) - USB OHCI controller with USB keyboard and USB mouse Signed-off-by: Helge Deller <deller@gmx.de>
2023-10-20hw/hppa: Split out machine creationHelge Deller
This is a preparation patch to allow the creation of additional hppa machine. It splits out the creation of the machine into a - machine_HP_common_init_cpus(), and a - machine_HP_common_init_tail() function. This will allow to reuse the basic functions which are common to all parisc machines. Signed-off-by: Helge Deller <deller@gmx.de>
2023-10-20hw/hppa: Provide RTC and DebugOutputPort on CPU #0Helge Deller
For SeaBIOS-hppa, the RTC and DebugOutputPort were in the I/O area of the LASI chip of the emulated B160L machine. Since we will add other machines without a LASI chip, move the emulated devices into the I/O area of CPU#0 instead. Signed-off-by: Helge Deller <deller@gmx.de>
2023-10-20hw/hppa: Export machine name, BTLBs, power-button address via fw_cfgHelge Deller
Provide necessary info to SeaBIOS-hppa. Signed-off-by: Helge Deller <deller@gmx.de>
2023-10-20pci-host: Wire up new Astro/Elroy PCI bridgeHelge Deller
Allow the Astro source to be built. Signed-off-by: Helge Deller <deller@gmx.de>
2023-10-20hw/pci-host: Add Astro system bus adapter found on PA-RISC machinesHelge Deller
The 64-bit PA-RISC machines use a Astro system bus adapter (SBA) with Elroy PCI host chips. Later generation Astro chips were named Pluto, Ike and REO. Signed-off-by: Helge Deller <deller@gmx.de>
2023-10-19ui/input: Constify QemuInputHandler structurePhilippe Mathieu-Daudé
Access to QemuInputHandlerState::handler are read-only. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231017131251.43708-1-philmd@linaro.org>
2023-10-19hw/net: Declare link using static DEFINE_PROP_LINK() macroPhilippe Mathieu-Daudé
Declare link statically using DEFINE_PROP_LINK(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231017140150.44995-7-philmd@linaro.org>
2023-10-19hw/dma: Declare link using static DEFINE_PROP_LINK() macroPhilippe Mathieu-Daudé
Declare link statically using DEFINE_PROP_LINK(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231017140150.44995-6-philmd@linaro.org>
2023-10-19hw/scsi/virtio-scsi: Use VIRTIO_SCSI_COMMON() macroPhilippe Mathieu-Daudé
Access QOM parent with the proper QOM VIRTIO_SCSI_COMMON() macro. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231017140150.44995-5-philmd@linaro.org>
2023-10-19hw/display/virtio-gpu: Use VIRTIO_DEVICE() macroPhilippe Mathieu-Daudé
Access QOM parent with the proper QOM VIRTIO_DEVICE() macro. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231017140150.44995-4-philmd@linaro.org>
2023-10-19hw/block/vhost-user-blk: Use DEVICE() / VIRTIO_DEVICE() macrosPhilippe Mathieu-Daudé
Access QOM parent with the proper QOM [VIRTIO_]DEVICE() macros. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231017140150.44995-3-philmd@linaro.org>
2023-10-19hw/virtio/virtio-pmem: Replace impossible check by assertionPhilippe Mathieu-Daudé
The get_memory_region() handler is used when (un)plugging the device, which can only occur *after* it is realized. virtio_pmem_realize() ensure the instance can not be realized without 'memdev'. Remove the superfluous check, replacing it by an assertion. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Message-Id: <20231017140150.44995-2-philmd@linaro.org>
2023-10-19hw/s390x/css-bridge: Realize sysbus device before accessing itPhilippe Mathieu-Daudé
qbus_new() should not be called on unrealized device. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231019071611.98885-10-philmd@linaro.org>
2023-10-19hw/isa: Realize ISA bridge device before accessing itPhilippe Mathieu-Daudé
qbus_new() should not be called on unrealized device. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20231019071611.98885-9-philmd@linaro.org>
2023-10-19hw/arm/virt: Realize ARM_GICV2M sysbus device before accessing itPhilippe Mathieu-Daudé
sysbus_mmio_map() should not be called on unrealized device. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231018141151.87466-8-philmd@linaro.org>
2023-10-19hw/acpi: Realize ACPI_GED sysbus device before accessing itPhilippe Mathieu-Daudé
sysbus_mmio_map() should not be called on unrealized device. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20231018141151.87466-7-philmd@linaro.org>
2023-10-19hw/pci-host/bonito: Do not use SysBus API to map local MMIO regionPhilippe Mathieu-Daudé
There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Transformation done using the following coccinelle script: @@ expression sbdev; expression index; expression addr; expression subregion; @@ - sysbus_init_mmio(sbdev, subregion); ... when != sbdev - sysbus_mmio_map(sbdev, index, addr); + memory_region_add_subregion(get_system_memory(), addr, subregion); and manually adding the local 'host_mem' variable to avoid multiple calls to get_system_memory(). Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231019071611.98885-6-philmd@linaro.org>
2023-10-19hw/misc/allwinner-dramc: Do not use SysBus API to map local MMIO regionPhilippe Mathieu-Daudé
There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Transformation done using the following coccinelle script: @@ expression sbdev; expression index; expression addr; expression subregion; @@ - sysbus_init_mmio(sbdev, subregion); ... when != sbdev - sysbus_mmio_map(sbdev, index, addr); + memory_region_add_subregion(get_system_memory(), + addr, subregion); @@ expression priority; @@ - sysbus_init_mmio(sbdev, subregion); ... when != sbdev - sysbus_mmio_map_overlap(sbdev, index, addr, priority); + memory_region_add_subregion_overlap(get_system_memory(), + addr, + subregion, priority); Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231019071611.98885-5-philmd@linaro.org>
2023-10-19hw/misc/allwinner-dramc: Move sysbus_mmio_map call from init -> realizePhilippe Mathieu-Daudé
In order to make the next commit trivial, move the sysbus_init_mmio() call in allwinner_r40_dramc_init() just before the corresponding sysbus_mmio_map_overlap() call in allwinner_r40_dramc_realize(). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231019071611.98885-4-philmd@linaro.org>
2023-10-19hw/i386/intel_iommu: Do not use SysBus API to map local MMIO regionPhilippe Mathieu-Daudé
There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Transformation done using the following coccinelle script: @@ expression sbdev; expression index; expression addr; expression subregion; @@ - sysbus_init_mmio(sbdev, subregion); ... when != sbdev - sysbus_mmio_map(sbdev, index, addr); + memory_region_add_subregion(get_system_memory(), addr, subregion); Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20231018141151.87466-3-philmd@linaro.org>
2023-10-19hw/i386/amd_iommu: Do not use SysBus API to map local MMIO regionPhilippe Mathieu-Daudé
There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Transformation done using the following coccinelle script: @@ expression sbdev; expression index; expression addr; expression subregion; @@ - sysbus_init_mmio(sbdev, subregion); ... when != sbdev - sysbus_mmio_map(sbdev, index, addr); + memory_region_add_subregion(get_system_memory(), addr, subregion); Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20231018141151.87466-2-philmd@linaro.org>
2023-10-19hw/audio/pcspk: Inline pcspk_init()Philippe Mathieu-Daudé
pcspk_init() is a legacy init function, inline and remove it. Since the device is realized using &error_fatal, use the same error for setting the "pit" link. Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231019073307.99608-1-philmd@linaro.org>
2023-10-19hw/intc/spapr_xive: Do not use SysBus API to map local MMIO regionPhilippe Mathieu-Daudé
There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Transformation done using the following coccinelle script: @@ expression sbdev; expression index; expression addr; expression subregion; @@ - sysbus_init_mmio(sbdev, subregion); ... when != sbdev - sysbus_mmio_map(sbdev, index, addr); + memory_region_add_subregion(get_system_memory(), addr, subregion); Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20231019131647.19690-8-philmd@linaro.org>
2023-10-19hw/intc/spapr_xive: Move sysbus_init_mmio() calls aroundPhilippe Mathieu-Daudé
In order to make the next commit trivial, move sysbus_init_mmio() calls just before the corresponding sysbus_mmio_map() calls. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20231019131647.19690-7-philmd@linaro.org>
2023-10-19hw/ppc/pnv: Do not use SysBus API to map local MMIO regionPhilippe Mathieu-Daudé
There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Transformation done using the following coccinelle script: @@ expression sbdev; expression index; expression addr; expression subregion; @@ - sysbus_init_mmio(sbdev, subregion); ... when != sbdev - sysbus_mmio_map(sbdev, index, addr); + memory_region_add_subregion(get_system_memory(), addr, subregion); Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20231019131647.19690-6-philmd@linaro.org>
2023-10-19hw/ppc/pnv_xscom: Do not use SysBus API to map local MMIO regionPhilippe Mathieu-Daudé
There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Transformation done using the following coccinelle script: @@ expression sbdev; expression index; expression addr; expression subregion; @@ - sysbus_init_mmio(sbdev, subregion); ... when != sbdev - sysbus_mmio_map(sbdev, index, addr); + memory_region_add_subregion(get_system_memory(), addr, subregion); Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20231019131647.19690-5-philmd@linaro.org>
2023-10-19hw/ppc/pnv_xscom: Move sysbus_mmio_map() call within pnv_xscom_init()Philippe Mathieu-Daudé
In order to make the next commit trivial, move sysbus_init_mmio() calls just before the corresponding sysbus_mmio_map() calls. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20231019131647.19690-4-philmd@linaro.org>
2023-10-19hw/ppc/pnv_xscom: Rename pnv_xscom_realize(Error **) -> pnv_xscom_init()Philippe Mathieu-Daudé
pnv_xscom_realize() is not used to *realize* QDev object, rename it as pnv_xscom_init(). The Error** argument is unused: remove it. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20231019131647.19690-3-philmd@linaro.org>
2023-10-19hw/ppc/spapr_vio: Realize SPAPR_VIO_BRIDGE device before accessing itPhilippe Mathieu-Daudé
qbus_new() should not be called on unrealized device. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231019131647.19690-2-philmd@linaro.org>
2023-10-19hw/intc/apic: Use ERRP_GUARD() in apic_common_realize()Philippe Mathieu-Daudé
APICCommonClass::realize() is a DeviceRealize() handler which take an Error** parameter and can fail. Do not proceed further on failure. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Xu <peterx@redhat.com> Message-Id: <20231003082728.83496-2-philmd@linaro.org>
2023-10-19hw/s390x: Clean up global variable shadowing in quiesce_powerdown_req()Philippe Mathieu-Daudé
Fix: hw/s390x/sclpquiesce.c:90:22: error: declaration shadows a variable in the global scope [-Werror,-Wshadow] QuiesceNotifier *qn = container_of(n, QuiesceNotifier, notifier); ^ hw/s390x/sclpquiesce.c:86:3: note: previous declaration is here } qn; ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20231010115048.11856-7-philmd@linaro.org>
2023-10-19hw/pci: Clean up global variable shadowing of address_space_io variablePhilippe Mathieu-Daudé
Fix: hw/pci/pci.c:504:54: error: declaration shadows a variable in the global scope [-Werror,-Wshadow] MemoryRegion *address_space_io, ^ hw/pci/pci.c:533:38: error: declaration shadows a variable in the global scope [-Werror,-Wshadow] MemoryRegion *address_space_io, ^ hw/pci/pci.c:543:40: error: declaration shadows a variable in the global scope [-Werror,-Wshadow] MemoryRegion *address_space_io, ^ hw/pci/pci.c:590:45: error: declaration shadows a variable in the global scope [-Werror,-Wshadow] MemoryRegion *address_space_io, ^ include/exec/address-spaces.h:35:21: note: previous declaration is here extern AddressSpace address_space_io; ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20231010115048.11856-6-philmd@linaro.org>
2023-10-19hw/acpi/pcihp: Clean up global variable shadowing in acpi_pcihp_init()Philippe Mathieu-Daudé
Fix: hw/acpi/pcihp.c:499:36: error: declaration shadows a variable in the global scope [-Werror,-Wshadow] MemoryRegion *address_space_io, ^ include/exec/address-spaces.h:35:21: note: previous declaration is here extern AddressSpace address_space_io; ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Ani Sinha <anisinha@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20231010115048.11856-5-philmd@linaro.org>
2023-10-19hw/sparc64/ebus: Access memory regions via pci_address_space_io()Philippe Mathieu-Daudé
PCI functions are plugged on a PCI bus. They can only access external memory regions via the bus. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20231011185954.10337-5-philmd@linaro.org>
2023-10-19hw/pci-host/sh_pcic: Replace magic value by proper definitionPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> Message-Id: <20231012041237.22281-4-philmd@linaro.org>
2023-10-19hw/pci-host/sh_pcic: Correct PCI host / devfn#0 function namesPhilippe Mathieu-Daudé
Host bridge device and PCI function #0 are inverted. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> Message-Id: <20231012041237.22281-3-philmd@linaro.org>
2023-10-19hw/pci-host/sh_pcic: Declare CPU QOM types using DEFINE_TYPES() macroPhilippe Mathieu-Daudé
When multiple QOM types are registered in the same file, it is simpler to use the the DEFINE_TYPES() macro. In particular because type array declared with such macro are easier to review. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp> Message-Id: <20231012041237.22281-2-philmd@linaro.org>
2023-10-19hw/misc/mips_itu: Make MIPSITUState target agnosticPhilippe Mathieu-Daudé
When prototyping a heterogenous machine including the ITU, we get: include/hw/misc/mips_itu.h:76:5: error: unknown type name 'MIPSCPU' MIPSCPU *cpu0; ^ MIPSCPU is declared in the target specific "cpu.h" header, but we don't want to include it, because "cpu.h" is target specific and its inclusion taints all files including "mips_itu.h", which become target specific too. We can however use the 'ArchCPU *' type in the public header. By keeping the TYPE_MIPS_CPU QOM type check in the link property declaration, QOM core code will still check the property is a correct MIPS CPU. TYPE_MIPS_ITU is still built per-(MIPS)target, but its header can now be included by other targets. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231009171443.12145-4-philmd@linaro.org>
2023-10-19hw/mips: Merge 'hw/mips/cpudevs.h' with 'target/mips/cpu.h'Philippe Mathieu-Daudé
"hw/mips/cpudevs.h" contains declarations which are specific to the MIPS architecture; it doesn't make sense for these to be called from a non-MIPS architecture. Move the declarations to "target/mips/cpu.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231009171443.12145-2-philmd@linaro.org>
2023-10-19hw/mips/malta: Use sdram_type enum from 'hw/i2c/smbus_eeprom.h'Philippe Mathieu-Daudé
Since commit 93198b6cad ("i2c: Split smbus into parts") the SDRAM types are enumerated as sdram_type in "hw/i2c/smbus_eeprom.h". Using the enum removes this global shadow warning: hw/mips/malta.c:209:12: error: declaration shadows a variable in the global scope [-Werror,-Wshadow] enum { SDR = 0x4, DDR2 = 0x8 } type; ^ include/hw/i2c/smbus_eeprom.h:33:19: note: previous declaration is here enum sdram_type { SDR = 0x4, DDR = 0x7, DDR2 = 0x8 }; ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231009092127.49778-1-philmd@linaro.org>
2023-10-19hw/sd/sdhci: Block Size Register bits [14:12] is lostLu Gao
Block Size Register bits [14:12] is SDMA Buffer Boundary, it is missed in register write, but it is needed in SDMA transfer. e.g. it will be used in sdhci_sdma_transfer_multi_blocks to calculate boundary_ variables. Missing this field will cause wrong operation for different SDMA Buffer Boundary settings. Fixes: d7dfca0807 ("hw/sdhci: introduce standard SD host controller") Fixes: dfba99f17f ("hw/sdhci: Fix DMA Transfer Block Size field") Signed-off-by: Lu Gao <lu.gao@verisilicon.com> Signed-off-by: Jianxian Wen <jianxian.wen@verisilicon.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-ID: <20220321055618.4026-1-lu.gao@verisilicon.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
generated by cgit v1.2.3 (git 2.26.2) at 2025-03-16 01:48:18 +0000