aboutsummaryrefslogtreecommitdiff
path: root/hw
AgeCommit message (Collapse)Author
2023-11-10hw/arm/sbsa-ref: Use qdev_prop_set_array()Kevin Wolf
Instead of manually setting "foo-len" and "foo[i]" properties, build a QList and use the new qdev_prop_set_array() helper to set the whole array property with a single call. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-ID: <20231109174240.72376-5-kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-10hw/arm/mps2: Use qdev_prop_set_array()Kevin Wolf
Instead of manually setting "foo-len" and "foo[i]" properties, build a QList and use the new qdev_prop_set_array() helper to set the whole array property with a single call. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-ID: <20231109174240.72376-4-kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-10hw/arm/mps2-tz: Use qdev_prop_set_array()Kevin Wolf
Instead of manually setting "foo-len" and "foo[i]" properties, build a QList and use the new qdev_prop_set_array() helper to set the whole array property with a single call. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-ID: <20231109174240.72376-3-kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-10hw/i386/pc: Use qdev_prop_set_array()Kevin Wolf
Instead of manually setting "foo-len" and "foo[i]" properties, build a QList and use the new qdev_prop_set_array() helper to set the whole array property with a single call. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-ID: <20231109174240.72376-2-kwolf@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-10Merge tag 'xen-virtio-fix-1-tag' of https://gitlab.com/sstabellini/qemu into ↵Stefan Hajnoczi
staging xen-virtio-fix-1 # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCgAdFiEE0E4zq6UfZ7oH0wrqiU+PSHDhrpAFAmVKp0cACgkQiU+PSHDh # rpA0Wg//RUJeBg/Ohjw/ETMjr7+zpsxm0JEjqE5uDYF9+wbX5uAcPOjYLpCbWdKY # Q9nXmJCbnoqPYzjUrPpx0i8iiVnjbKY28sIqKzPDl4b2s8iPuGrjyPBbcZO1qvx9 # j3UOxiFqcIOIV/Ypf6rdo8hiIwZlHSYR3ZzWLFh2sFGmMee9TjDHiCwRXqZiIzE3 # ks39nV6+Ob1xVTLNZpHjSAsafd/SAusQv66OiGWPixM3DEMKCXUNWtFIfXd5tnVW # P/4uyRFHzDH+hBZZx2NMiWalTNpcWb4LYhgv/zFiSlnUuw7g0fUBWM1qHWaLcTfY # BEzm6578BVunFDJe5PEtc5bC1vSZarv6ndRKo7e/t5S/1bzyWzuI8nWCrUKscBSu # ZgFeJyO9bLRae5QDIiDG6id2dafP9x4zIrn07enuMQVYkjQynA6oS49KL1I+RP38 # Cae+dfadqBksxDbFkh0t02tWjVNeR5MzmkcktlWEn8h136VzZ+fPn93TSTewPxsf # 3ii6dhiu8+P7A5tfXuRhqlgS8QgaJt6EXDkttjIsC5tWuBo28jZQKw77cZ4DWq1a # eTy6hn9F0vX+8rNb1dq5Ct6BT6i2svmAloXKBvkaSPLwGLn2lKiUA3ky+9n0ZWEe # GiyTwkvdaZndrjup+B3MbtQWmJhN+niJZveTJgCdG6or4tvGOuI= # =1At5 # -----END PGP SIGNATURE----- # gpg: Signature made Wed 08 Nov 2023 05:08:23 HKT # gpg: using RSA key D04E33ABA51F67BA07D30AEA894F8F4870E1AE90 # gpg: Good signature from "Stefano Stabellini <sstabellini@kernel.org>" [expired] # gpg: aka "Stefano Stabellini <stefano.stabellini@eu.citrix.com>" [expired] # gpg: Note: This key has expired! # Primary key fingerprint: D04E 33AB A51F 67BA 07D3 0AEA 894F 8F48 70E1 AE90 * tag 'xen-virtio-fix-1-tag' of https://gitlab.com/sstabellini/qemu: Xen: Fix xen_set_irq() and xendevicemodel_set_irq_level() Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-09Merge tag 'for-upstream' of https://repo.or.cz/qemu/kevin into stagingStefan Hajnoczi
Block layer patches - Graph locking part 6 (bs->file/backing) - ahci: trigger either error IRQ or regular IRQ, not both # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEE3D3rFZqa+V09dFb+fwmycsiPL9YFAmVLvccRHGt3b2xmQHJl # ZGhhdC5jb20ACgkQfwmycsiPL9ZkFg//awQoPiGnYzHpqcx2tGCM2AqBV+mFkbZr # BKI5vp8FYfJtgMuHjC8jabL24NRMPpT+HbCzoxwjJU+nnnr85qr7R5iGwG6kfgX6 # HJlAXYXdY6e7l+FV44PBJ52vOoGCsh1GHg8HlKsHMaxSdXi9C1axHJ6rCAjnWXE0 # FQ4znCBVs/9HiKsvu4Wdm5muX2ShftFRM/toAwA+fLEOealX8WEXoRFJXI40bYbR # OR7aJXWMDQrljlqdKk2FXvK337/tpofXmXf3NIE1R2pmY4x5Fg8bfChZn4UaaCdN # n+0AhmE4ScI0rXuaXXYOvTO9vdTzXeBROG6tX03t9rrQfB6wPcGVeXRo/uusslAW # sDH8NLz7uHFOooV02Fs8CKDdVrNNw5qjziclSGa0Po7vqOV1TKI8OTiNpsDLmdI5 # +DQvC6N+IU1pSOXImATSHkheGWggsegrsgN6PdrlzHEXJwWoAaRD0T06MRn74/pL # gCegK2ez4RJYsci7C5b0gaqY/QBsMj8EUfEGVHvVyuVSoPRwiq4ehPqSQ+siA3xP # KxYR0e4+QIfRmxqCzaJhiQ3DDGdt8UcO3yF0XcKXEqWwgFAGQKNeUG314jginvmA # iaJzC0dHbiGcagAk7Ey8iyzfxQDWM6ixzJtGv7VLILepzCuu8vaJXy5qeEtTM/ZI # EXoDGceNSvw= # =ikBW # -----END PGP SIGNATURE----- # gpg: Signature made Thu 09 Nov 2023 00:56:39 HKT # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * tag 'for-upstream' of https://repo.or.cz/qemu/kevin: (25 commits) hw/ide/ahci: trigger either error IRQ or regular IRQ, not both block: Protect bs->file with graph_lock block: Take graph lock for most of .bdrv_open vhdx: Take locks for accessing bs->file qcow2: Take locks for accessing bs->file block: Add missing GRAPH_RDLOCK annotations block: Introduce bdrv_co_change_backing_file() blkverify: Add locking for request_fn block: Protect bs->backing with graph_lock block: Mark bdrv_replace_node() GRAPH_WRLOCK block: Mark bdrv_replace_node_common() GRAPH_WRLOCK block: Inline bdrv_set_backing_noperm() block: Mark bdrv_set_backing_hd_drained() GRAPH_WRLOCK block: Mark bdrv_cow_child() and callers GRAPH_RDLOCK block: Mark bdrv_filter_child() and callers GRAPH_RDLOCK block: Mark bdrv_chain_contains() and callers GRAPH_RDLOCK block: Mark bdrv_(un)freeze_backing_chain() and callers GRAPH_RDLOCK block: Mark bdrv_skip_filters() and callers GRAPH_RDLOCK block: Mark bdrv_skip_implicit_filters() and callers GRAPH_RDLOCK block: Mark bdrv_filter_or_cow_bs() and callers GRAPH_RDLOCK ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-08hw/ide/ahci: trigger either error IRQ or regular IRQ, not bothNiklas Cassel
According to AHCI 1.3.1, 5.3.8.1 RegFIS:Entry, if ERR_STAT is set, we jump to state ERR:FatalTaskfile, which will raise a TFES IRQ unconditionally, regardless if the I bit is set in the FIS or not. Thus, we should never raise a normal IRQ after having sent an error IRQ. NOTE: for QEMU platforms that use SeaBIOS, this patch depends on QEMU commit 784155cdcb02 ("seabios: update submodule to git snapshot"), and QEMU commit 14f5a7bae4cb ("seabios: update binaries to git snapshot"), which update SeaBIOS to a version that contains SeaBIOS commit 1281e340 ("ahci: handle TFES irq correctly"). Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com> Message-ID: <20231011131220.1992064-1-nks@flawful.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2023-11-08cpu: Call plugin hooks only when readyAkihiko Odaki
The initialization and exit hooks will not affect the state of vCPU outside TCG context, but they may depend on the state of vCPU. Therefore, it's better to call plugin hooks after the vCPU state is fully initialized and before it gets uninitialized. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231025093128.33116-16-akihiko.odaki@daynix.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20231106185112.2755262-12-alex.bennee@linaro.org>
2023-11-08Merge tag 'pull-ppc-20231107' of https://gitlab.com/danielhb/qemu into stagingStefan Hajnoczi
ppc patch queue for 2023-11-07: This queue, the last one before the 8.2 feature freeze, has miscellanous changes that includes new PowerNV features and the new AmigaONE XE board. # -----BEGIN PGP SIGNATURE----- # # iIwEABYKADQWIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCZUqiORYcZGFuaWVsaGI0 # MTNAZ21haWwuY29tAAoJEDzZypbeAzFkBSUA/2qm8CyrRqY5+tsjtWQqZmPZ3L1F # CgnXFNqtY2tzbTe5AQCi6FeQBEmXbZYVfryZyA+CQ4DUERc+18pe6hV3bBR9Cg== # =cnHS # -----END PGP SIGNATURE----- # gpg: Signature made Wed 08 Nov 2023 04:46:49 HKT # gpg: using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164 # gpg: issuer "danielhb413@gmail.com" # gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 17EB FF99 23D0 1800 AF28 3819 3CD9 CA96 DE03 3164 * tag 'pull-ppc-20231107' of https://gitlab.com/danielhb/qemu: ppc: qtest already exports qtest_rtas_call() hw/pci-host: Update PHB5 XSCOM registers ppc/pnv: Fix number of I2C engines and ports for power9/10 ppc/pnv: Connect PNV I2C controller to powernv10 ppc/pnv: Connect I2C controller model to powernv9 chip ppc/pnv: Add an I2C controller model tests/avocado: Add test for amigaone board hw/ppc: Add emulation of AmigaOne XE board hw/pci-host: Add emulation of Mai Logic Articia S Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-08Merge tag 'misc-cpus-20231107' of https://github.com/philmd/qemu into stagingStefan Hajnoczi
Misc hardware patch queue HW emulation: - PMBus fixes and tests (Titus) - IDE fixes and tests (Fiona) - New ADM1266 sensor (Titus) - Better error propagation in PCI-ISA i82378 (Philippe) - Declare SD model QOM types using DEFINE_TYPES macro (Philippe) Topology: - Fix CPUState::nr_cores calculation (Zhuocheng Ding and Zhao Liu) Monitor: - Synchronize CPU state in 'info lapic' (Dongli Zhang) QOM: - Have 'cpu-qom.h' target-agnostic (Philippe) - Move ArchCPUClass definition to each target's cpu.h (Philippe) - Call object_class_is_abstract once in cpu_class_by_name (Philippe) UI: - Use correct key names in titles on MacOS / SDL2 (Adrian) MIPS: - Fix MSA BZ/BNZ and TX79 LQ/SQ opcodes (Philippe) Nios2: - Create IRQs *after* vCPU is realized (Philippe) PPC: - Restrict KVM objects to system emulation (Philippe) - Move target-specific definitions out of 'cpu-qom.h' (Philippe) S390X: - Make hw/s390x/css.h and hw/s390x/sclp.h headers target agnostic (Philippe) X86: - HVF & KVM cleanups (Philippe) Various targets: - Use env_archcpu() to optimize (Philippe) Misc: - Few global variable shadowing removed (Philippe) - Introduce cpu_exec_reset_hold and factor tcg_cpu_reset_hold out (Philippe) - Remove few more 'softmmu' mentions (Philippe) - Fix and cleanup in vl.c (Akihiko & Marc-André) - Resource leak fix in dump (Zongmin Zhou) - MAINTAINERS updates (Thomas, Daniel) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmVKKmEACgkQ4+MsLN6t # wN4xHQ//X/enH4C7K3VP/tSinDiwmXN2o61L9rjqSDQkBaCtktZx4c8qKSDL7V4S # vwzmvvBn3biMXQwZNVJo9d0oz2qoaF9tI6Ao0XDHAan9ziagfG9YMqWhkCfj077Q # jLdCqkUuMJBvQgXGB1a6UgCme8PQx7h0oqjbCNfB0ZBls24b5DiEjO87LE4OTbTi # zKRhYEpZpGwIVcy+1dAsbaBpGFP06sr1doB9Wz4c06eSx7t0kFSPk6U4CyOPrGXh # ynyCxPwngxIXmarY8gqPs3SBs7oXsH8Q/ZOHr1LbuXhwSuw/0zBQU9aF7Ir8RPan # DB79JjPrtxTAhICKredWT79v9M18D2/1MpONgg4vtx5K2FzGYoAJULCHyfkHMRSM # L6/H0ZQPHvf7w72k9EcSQIhd0wPlMqRmfy37/8xcLiw1h4l/USx48QeKaeFWeSEu # DgwSk+R61HbrKvQz/U0tF98zUEyBaQXNrKmyzht0YE4peAtpbPNBeRHkd0GMae/Z # HOmkt8QlFQ0T14qSK7mSHaSJTUzRvFGD01cbuCDxVsyCWWsesEikXBACZLG5RCRY # Rn1WeX1H9eE3kKi9iueLnhzcF9yM5XqFE3f6RnDzY8nkg91lsTMSQgFcIpv6uGyp # 3WOTNSC9SoFyI3x8pCWiKOGytPUb8xk+PnOA85wYvVmT+7j6wus= # =OVdQ # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 Nov 2023 20:15:29 HKT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'misc-cpus-20231107' of https://github.com/philmd/qemu: (75 commits) dump: Add close fd on error return to avoid resource leak ui/sdl2: use correct key names in win title on mac MAINTAINERS: Add more guest-agent related files to the corresponding section MAINTAINERS: Add include/hw/xtensa/mx_pic.h to the XTFPGA machine section MAINTAINERS: update libvirt devel mailing list address MAINTAINERS: Add the CAN documentation file to the CAN section MAINTAINERS: Add include/hw/timer/tmu012.h to the SH4 R2D section hw/sd: Declare QOM types using DEFINE_TYPES() macro hw/i2c: pmbus: reset page register for out of range reads hw/i2c: pmbus: immediately clear faults on request tests/qtest: add tests for ADM1266 hw/sensor: add ADM1266 device model hw/i2c: pmbus: add VCAP register hw/i2c: pmbus: add fan support hw/i2c: pmbus: add vout mode bitfields hw/i2c: pmbus add support for block receive tests/qtest: ahci-test: add test exposing reset issue with pending callback hw/ide: reset: cancel async DMA operation before resetting state hw/cpu: Update the comments of nr_cores and nr_dies system/cpus: Fix CPUState.nr_cores' calculation ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-07Xen: Fix xen_set_irq() and xendevicemodel_set_irq_level()Vikram Garhwal
Remove '=' from 'if CONFIG_XEN_CTRL_INTERFACE_VERSION <= 41500'. Because xendevicemodel_set_irq_level() was introduced in 4.15 version. Also, update xendevicemodel_set_irq_level() to return -1 for older versions. Signed-off-by: Vikram Garhwal <vikram.garhwal@amd.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2023-11-07ppc: qtest already exports qtest_rtas_call()Juan Quintela
Having two functions with the same name is a bad idea. As spapr only uses the function locally, made it static. When you compile with clang, you get this compilation error: /usr/bin/ld: tests/qtest/libqos/libqos.fa.p/.._libqtest.c.o: in function `qtest_rtas_call': /scratch/qemu/clang/full/all/../../../../../mnt/code/qemu/full/tests/qtest/libqtest.c:1195: multiple definition of `qtest_rtas_call'; libqemu-ppc64-softmmu.fa.p/hw_ppc_spapr_rtas.c.o:/scratch/qemu/clang/full/all/../../../../../mnt/code/qemu/full/hw/ppc/spapr_rtas.c:536: first defined here clang-16: error: linker command failed with exit code 1 (use -v to see invocation) ninja: build stopped: subcommand failed. make: *** [Makefile:162: run-ninja] Error 1 Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-ID: <20231030163834.4638-1-quintela@redhat.com> [dhb: remove 'spapr_rtas.h' include from spapr_rtas.c] Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-11-07hw/pci-host: Update PHB5 XSCOM registersSaif Abrar
Add new XSCOM registers introduced in PHB5. Apply bit-masks within xscom-write methods. Bit-masks specified using PPC_BITMASK macro. Signed-off-by: Saif Abrar <saif.abrar@linux.vnet.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Message-ID: <20231016175948.10869-1-saif.abrar@linux.vnet.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-11-07ppc/pnv: Fix number of I2C engines and ports for power9/10Glenn Miles
Power9 is supposed to have 4 PIB-connected I2C engines with the following number of ports on each engine: 0: 2 1: 13 2: 2 3: 2 Power10 also has 4 engines but has the following number of ports on each engine: 0: 14 1: 14 2: 2 3: 16 Current code assumes that they all have the same (maximum) number. This can be a problem if software expects to see a certain number of ports present (Power Hypervisor seems to care). Fixed this by adding separate tables for power9 and power10 that map the I2C controller number to the number of I2C buses that should be attached for that engine. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Message-ID: <20231025152714.956664-1-milesg@linux.vnet.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-11-07ppc/pnv: Connect PNV I2C controller to powernv10Glenn Miles
Wires up four I2C controller instances to the powernv10 chip XSCOM address space. Each controller instance is wired up to two I2C buses of its own. No other I2C devices are connected to the buses at this time. Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-ID: <20231017221434.810363-1-milesg@linux.vnet.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-11-07ppc/pnv: Connect I2C controller model to powernv9 chipCédric Le Goater
Wires up three I2C controller instances to the powernv9 chip XSCOM address space. Each controller instance is wired up to a single I2C bus of its own. No other I2C devices are connected to the buses at this time. Signed-off-by: Cédric Le Goater <clg@kaod.org> [milesg: Split wiring from addition of model itself] [milesg: Added new commit message] [milesg: Moved hardcoded attributes into PnvChipClass] [milesg: Removed TODO comment for I2C] Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-ID: <20231016222013.3739530-3-milesg@linux.vnet.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-11-07ppc/pnv: Add an I2C controller modelCédric Le Goater
The more recent IBM power processors have an embedded I2C controller that is accessible by software via the XSCOM address space. Each instance of the I2C controller is capable of controlling multiple I2C buses (one at a time). Prior to beginning a transaction on an I2C bus, the bus must be selected by writing the port number associated with the bus into the PORT_NUM field of the MODE register. Once an I2C bus is selected, the status of the bus can be determined by reading the Status and Extended Status registers. I2C bus transactions can be started by writing a command to the Command register and reading/writing data from/to the FIFO register. Not supported : . 10 bit I2C addresses . Multimaster . Slave Signed-off-by: Cédric Le Goater <clg@kaod.org> [milesg: Split wiring to powernv9 into its own commit] [milesg: Added more detail to commit message] [milesg: Added SPDX Licensed Identifier to new files] [milesg: updated copyright dates] [milesg: Added use of g_autofree] [milesg: Added NULL check after pnv_i2c_get_bus] Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-ID: <20231016222013.3739530-2-milesg@linux.vnet.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-11-07hw/ppc: Add emulation of AmigaOne XE boardBALATON Zoltan
The AmigaOne is a rebranded MAI Teron board that uses U-Boot firmware with patches to support AmigaOS and is very similar to pegasos2 so can be easily emulated sharing most code with pegasos2. The reason to emulate it is that AmigaOS comes in different versions for AmigaOne and PegasosII which only have drivers for one machine and firmware so these only run on the specific machine. Adding this board allows another AmigaOS version to be used reusing already existing peagasos2 emulation. (The AmigaOne was the first of these boards so likely most widespread which then inspired Pegasos that was later replaced with PegasosII due to problems with Articia S, so these have a lot of similarity. Pegasos mainly ran MorphOS while the PegasosII version of AmigaOS was added later and therefore less common than the AmigaOne version.) Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Tested-by: Rene Engel <ReneEngel80@emailn.de> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-ID: <804935e7a5921548d630576159ae2c758fe6e275.1699382232.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-11-07hw/pci-host: Add emulation of Mai Logic Articia SBALATON Zoltan
The Articia S is a generic chipset supporting several different CPUs that were among others used on some PPC boards. This is a minimal emulation of the parts needed for emulating the AmigaOne board. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Tested-by: Rene Engel <ReneEngel80@emailn.de> Acked-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-ID: <83822787431701cf4d460298d3e3845f362e5da1.1698406922.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2023-11-07hw/sd: Declare QOM types using DEFINE_TYPES() macroPhilippe Mathieu-Daudé
When multiple QOM types are registered in the same file, it is simpler to use the the DEFINE_TYPES() macro. In particular because type array declared with such macro are easier to review. Mechanical transformation using the following comby script: [pattern-x1] match=''' static const TypeInfo :[i1~.*_info] = { :[body] }; static void :[rt1~.*_register_type.](void) { type_register_static(&:[i2~.*_info]); } type_init(:[rt2~.*_register_type.]) ''' rewrite=''' static const TypeInfo :[i1][] = { { :[body] }, }; DEFINE_TYPES(:[i1]) ''' rule='where :[i1] == :[i2], :[rt1] == :[rt2]' [pattern-x2] match=''' static const TypeInfo :[i1a~.*_info] = { :[body1] }; ... static const TypeInfo :[i2a~.*_info] = { :[body2] }; static void :[rt1~.*_register_type.](void) { type_register_static(&:[i1b~.*_info]); type_register_static(&:[i2b~.*_info]); } type_init(:[rt2~.*_register_type.]) ''' rewrite=''' static const TypeInfo :[i1a][] = { { :[body1] }, { :[body2] }, }; DEFINE_TYPES(:[i1a]) ''' rule=''' where :[i1a] == :[i1b], :[i2a] == :[i2b], :[rt1] == :[rt2] ''' and re-indented manually. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20231031080603.86889-2-philmd@linaro.org>
2023-11-07hw/i2c: pmbus: reset page register for out of range readsTitus Rwantare
The linux pmbus driver scans all possible pages and does not reset the current page after the scan, making all future page reads fail as out of range on devices with a single page. This change resets out of range pages immediately on write. Also added a qtest for simultaneous writes to all pages. Reviewed-by: Hao Wu <wuhaotsh@google.com> Signed-off-by: Titus Rwantare <titusr@google.com> Message-ID: <20231023-staging-pmbus-v3-v4-8-07a8cb7cd20a@google.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-07hw/i2c: pmbus: immediately clear faults on requestTitus Rwantare
The probing process of the generic pmbus driver generates faults to determine if functions are available. These faults were not always cleared resulting in probe failures. Reviewed-by: Patrick Venture <venture@google.com> Signed-off-by: Titus Rwantare <titusr@google.com> Message-ID: <20231023-staging-pmbus-v3-v4-7-07a8cb7cd20a@google.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-07hw/sensor: add ADM1266 device modelTitus Rwantare
The ADM1266 is a cascadable super sequencer with margin control and fault recording. This commit adds basic support for its PMBus commands and models the identification registers that can be modified in a firmware update. Reviewed-by: Hao Wu <wuhaotsh@google.com> Acked-by: Corey Minyard <cminyard@mvista.com> Signed-off-by: Titus Rwantare <titusr@google.com> [PMD: Cover file in MAINTAINERS] Message-ID: <20231023-staging-pmbus-v3-v4-5-07a8cb7cd20a@google.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-07hw/i2c: pmbus: add VCAP registerTitus Rwantare
VCAP is a register for devices with energy storage capacitors. Reviewed-by: Benjamin Streb <bstreb@google.com> Acked-by: Corey Minyard <cminyard@mvista.com> Signed-off-by: Titus Rwantare <titusr@google.com> Message-ID: <20231023-staging-pmbus-v3-v4-4-07a8cb7cd20a@google.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-07hw/i2c: pmbus: add fan supportTitus Rwantare
PMBus devices may integrate fans whose operation is configurable over PMBus. This commit allows the driver to read and write the fan control registers but does not model the operation of fans. Reviewed-by: Stephen Longfield <slongfield@google.com> Acked-by: Corey Minyard <cminyard@mvista.com> Signed-off-by: Titus Rwantare <titusr@google.com> Message-ID: <20231023-staging-pmbus-v3-v4-3-07a8cb7cd20a@google.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-07hw/i2c: pmbus add support for block receiveTitus Rwantare
PMBus devices can send and receive variable length data using the block read and write format, with the first byte in the payload denoting the length. This is mostly used for strings and on-device logs. Devices can respond to a block read with an empty string. Reviewed-by: Hao Wu <wuhaotsh@google.com> Acked-by: Corey Minyard <cminyard@mvista.com> Signed-off-by: Titus Rwantare <titusr@google.com> Message-ID: <20231023-staging-pmbus-v3-v4-1-07a8cb7cd20a@google.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-07hw/ide: reset: cancel async DMA operation before resetting stateFiona Ebner
If there is a pending DMA operation during ide_bus_reset(), the fact that the IDEState is already reset before the operation is canceled can be problematic. In particular, ide_dma_cb() might be called and then use the reset IDEState which contains the signature after the reset. When used to construct the IO operation this leads to ide_get_sector() returning 0 and nsector being 1. This is particularly bad, because a write command will thus destroy the first sector which often contains a partition table or similar. Traces showing the unsolicited write happening with IDEState 0x5595af6949d0 being used after reset: > ahci_port_write ahci(0x5595af6923f0)[0]: port write [reg:PxSCTL] @ 0x2c: 0x00000300 > ahci_reset_port ahci(0x5595af6923f0)[0]: reset port > ide_reset IDEstate 0x5595af6949d0 > ide_reset IDEstate 0x5595af694da8 > ide_bus_reset_aio aio_cancel > dma_aio_cancel dbs=0x7f64600089a0 > dma_blk_cb dbs=0x7f64600089a0 ret=0 > dma_complete dbs=0x7f64600089a0 ret=0 cb=0x5595acd40b30 > ahci_populate_sglist ahci(0x5595af6923f0)[0] > ahci_dma_prepare_buf ahci(0x5595af6923f0)[0]: prepare buf limit=512 prepared=512 > ide_dma_cb IDEState 0x5595af6949d0; sector_num=0 n=1 cmd=DMA WRITE > dma_blk_io dbs=0x7f6420802010 bs=0x5595ae2c6c30 offset=0 to_dev=1 > dma_blk_cb dbs=0x7f6420802010 ret=0 > (gdb) p *qiov > $11 = {iov = 0x7f647c76d840, niov = 1, {{nalloc = 1, local_iov = {iov_base = 0x0, > iov_len = 512}}, {__pad = "\001\000\000\000\000\000\000\000\000\000\000", > size = 512}}} > (gdb) bt > #0 blk_aio_pwritev (blk=0x5595ae2c6c30, offset=0, qiov=0x7f6420802070, flags=0, > cb=0x5595ace6f0b0 <dma_blk_cb>, opaque=0x7f6420802010) > at ../block/block-backend.c:1682 > #1 0x00005595ace6f185 in dma_blk_cb (opaque=0x7f6420802010, ret=<optimized out>) > at ../softmmu/dma-helpers.c:179 > #2 0x00005595ace6f778 in dma_blk_io (ctx=0x5595ae0609f0, > sg=sg@entry=0x5595af694d00, offset=offset@entry=0, align=align@entry=512, > io_func=io_func@entry=0x5595ace6ee30 <dma_blk_write_io_func>, > io_func_opaque=io_func_opaque@entry=0x5595ae2c6c30, > cb=0x5595acd40b30 <ide_dma_cb>, opaque=0x5595af6949d0, > dir=DMA_DIRECTION_TO_DEVICE) at ../softmmu/dma-helpers.c:244 > #3 0x00005595ace6f90a in dma_blk_write (blk=0x5595ae2c6c30, > sg=sg@entry=0x5595af694d00, offset=offset@entry=0, align=align@entry=512, > cb=cb@entry=0x5595acd40b30 <ide_dma_cb>, opaque=opaque@entry=0x5595af6949d0) > at ../softmmu/dma-helpers.c:280 > #4 0x00005595acd40e18 in ide_dma_cb (opaque=0x5595af6949d0, ret=<optimized out>) > at ../hw/ide/core.c:953 > #5 0x00005595ace6f319 in dma_complete (ret=0, dbs=0x7f64600089a0) > at ../softmmu/dma-helpers.c:107 > #6 dma_blk_cb (opaque=0x7f64600089a0, ret=0) at ../softmmu/dma-helpers.c:127 > #7 0x00005595ad12227d in blk_aio_complete (acb=0x7f6460005b10) > at ../block/block-backend.c:1527 > #8 blk_aio_complete (acb=0x7f6460005b10) at ../block/block-backend.c:1524 > #9 blk_aio_write_entry (opaque=0x7f6460005b10) at ../block/block-backend.c:1594 > #10 0x00005595ad258cfb in coroutine_trampoline (i0=<optimized out>, > i1=<optimized out>) at ../util/coroutine-ucontext.c:177 Signed-off-by: Fiona Ebner <f.ebner@proxmox.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: simon.rowe@nutanix.com Message-ID: <20230906130922.142845-1-f.ebner@proxmox.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-07hw/isa/i82378: Propagate error if PC_SPEAKER device creation failedPhilippe Mathieu-Daudé
In commit 40f8214fcd ("hw/audio/pcspk: Inline pcspk_init()") we neglected to give a change to the caller to handle failed device creation cleanly. Respect the caller API contract and propagate the error if creating the PC_SPEAKER device ever failed. This avoid yet another bad API use to be taken as example and copy / pasted all over the code base. Reported-by: Bernhard Beschow <shentey@gmail.com> Suggested-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Bernhard Beschow <shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231020171509.87839-5-philmd@linaro.org>
2023-11-07hw/loader: Clean up global variable shadowing in rom_add_file()Philippe Mathieu-Daudé
Fix: hw/core/loader.c:1073:27: error: declaration shadows a variable in the global scope [-Werror,-Wshadow] bool option_rom, MemoryRegion *mr, ^ include/sysemu/sysemu.h:57:22: note: previous declaration is here extern QEMUOptionRom option_rom[MAX_OPTION_ROMS]; ^ Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Ani Sinha <anisinha@redhat.com> Message-Id: <20231010115048.11856-3-philmd@linaro.org>
2023-11-07hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name()Philippe Mathieu-Daudé
Let CPUClass::class_by_name() handlers to return abstract classes, and filter them once in the public cpu_class_by_name() method. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230908112235.75914-3-philmd@linaro.org>
2023-11-07hw/s390x/sclp: Have sclp_service_call[_protected]() take S390CPU*Philippe Mathieu-Daudé
"hw/s390x/sclp.h" is a header used by target-agnostic objects (such hw/char/sclpconsole[-lm].c), thus can not use target-specific types, such CPUS390XState. Have sclp_service_call[_protected]() take a S390CPU pointer, which is target-agnostic. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231106114500.5269-3-philmd@linaro.org>
2023-11-07hw/s390x/css: Have css_do_sic() take S390CPU instead of CPUS390XStatePhilippe Mathieu-Daudé
"hw/s390x/css.h" is a header used by target-agnostic objects (such hw/s390x/virtio-ccw-gpu.c), thus can not use target-specific types, such CPUS390XState. Have css_do_sic() take S390CPU a pointer, which is target-agnostic. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20231106114500.5269-2-philmd@linaro.org>
2023-11-07hw/ppc/e500: Restrict ppce500_init_mpic_kvm() to KVMPhilippe Mathieu-Daudé
Inline and guard the single call to kvm_openpic_connect_vcpu() allows to remove kvm-stub.c. Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20231003070427.69621-3-philmd@linaro.org>
2023-11-07accel/tcg: Factor tcg_cpu_reset_hold() outPhilippe Mathieu-Daudé
Factor the TCG specific code from cpu_common_reset_hold() to tcg_cpu_reset_hold() within tcg-accel-ops.c. Since this file is sysemu specific, we can inline tcg_flush_softmmu_tlb(), removing its declaration in "exec/cpu-common.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230918104153.24433-4-philmd@linaro.org>
2023-11-07accel: Introduce cpu_exec_reset_hold()Philippe Mathieu-Daudé
Introduce cpu_exec_reset_hold() which call an accelerator specific AccelOpsClass::cpu_reset_hold() handler. Define a stub on TCG user emulation, because CPU reset is irrelevant there. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230918104153.24433-3-philmd@linaro.org>
2023-11-07accel/tcg: Declare tcg_flush_jmp_cache() in 'exec/tb-flush.h'Philippe Mathieu-Daudé
"exec/cpu-common.h" is meant to contain the declarations related to CPU usable with any accelerator / target combination. tcg_flush_jmp_cache() is specific to TCG, so restrict its declaration by moving it to "exec/tb-flush.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230918104153.24433-2-philmd@linaro.org>
2023-11-07Merge tag 'pixman-pull-request' of https://gitlab.com/marcandre.lureau/qemu ↵Stefan Hajnoczi
into staging Make Pixman an optional dependency # -----BEGIN PGP SIGNATURE----- # # iQJQBAABCAA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmVKDhkcHG1hcmNhbmRy # ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5f8CD/0YX5sXR3IwUfTp8B51 # iIwgOlVunzcT9oDYegIekaHdvggv3B39+gjC/khcehQ30qV6MDowj3ZagIeLavU2 # ZpHJMUkg1YRDHMiJ8aJmDhOyZHINCETWV2YoJX1ACllKOOMSXHC3mWKZd/eIqAPJ # EBMlSWBP1rRtwfaX+p1Y65XappJewzzb9SqFn8s5deowEAM3aK7xafHQOBWSVx9z # 5adhIWn3HMVnbYolVXlcHsPurfI86sqCl7QAqkFdwAvGIKghhqMT6pFfvu3BalHN # nz8GqpSvjlj/WNFABi00piXKx4kkqBJSsYMP8owZQZIeepT5RXuKAB15BA1Cc5N7 # wTkuLe7zXLUST32yAHLa2UZY8Gv/a6C+dH1EFRd7vMMczBPrzwuqzWChRTZPQaX6 # e4uhXnhuu8Io11TnkmwWeWtrLOf+6EmVOjxNwhUUXOqPXPxd7LGMh/ZIc1SuXh0a # k7khpXez4MoBWGftjCEUNlLZ13rcrqnkUWAZeOwjjaqxnYK+Lz32OGS3BtjRYvov # WgogC2c2vVHrSHxRxuytCHiM+7NY0Tf2B6PxZJKOQUtfFxvHjWkHghnJWwHH2OP/ # lMnJUU+XAaAxsiEiDN4BSd0DSA6jn6/vg8SgXXEDyIDExq5jELVMgw2q1cbQJK1s # mOgr8FZZfnxvwYIFvH7PFiDm3A== # =bLPz # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 Nov 2023 18:14:49 HKT # gpg: using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5 # gpg: issuer "marcandre.lureau@redhat.com" # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full] # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full] # Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5 * tag 'pixman-pull-request' of https://gitlab.com/marcandre.lureau/qemu: (25 commits) build-sys: make pixman actually optional hw/display/ati: allow compiling without PIXMAN hw/mips: FULOONG depends on VT82C686 hw/sm501: allow compiling without PIXMAN hw/arm: XLNX_VERSAL depends on XLNX_CSU_DMA arm/kconfig: XLNX_ZYNQMP_ARM depends on PIXMAN ui/dbus: do not require PIXMAN ui/gtk: -display gtk requires PIXMAN ui/spice: SPICE/QXL requires PIXMAN ui/vnc: VNC requires PIXMAN ui/gl: opengl doesn't require PIXMAN vhost-user-gpu: skip VHOST_USER_GPU_UPDATE when !PIXMAN ui/console: when PIXMAN is unavailable, don't draw placeholder msg virtio-gpu: replace PIXMAN for region/rect test qmp/hmp: disable screendump if PIXMAN is missing ui/vc: console-vc requires PIXMAN ui/console: allow to override the default VC vl: move display early init before default devices vl: simplify display_remote logic qemu-options: define -vnc only #ifdef CONFIG_VNC ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-07Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu ↵Stefan Hajnoczi
into staging virtio,pc,pci: features, fixes virtio sound card support vhost-user: back-end state migration cxl: line length reduction enabling fabric management vhost-vdpa: shadow virtqueue hash calculation Support shadow virtqueue RSS Support tests: CPU topology related smbios test cases Fixes, cleanups all over the place Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmVKDDoPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpF08H/0Zts8uvkHbgiOEJw4JMHU6/VaCipfIYsp01 # GSfwYOyEsXJ7GIxKWaCiMnWXEm7tebNCPKf3DoUtcAojQj3vuF9XbWBKw/bfRn83 # nGO/iiwbYViSKxkwqUI+Up5YiN9o0M8gBFrY0kScPezbnYmo5u2bcADdEEq6gH68 # D0Ea8i+WmszL891ypvgCDBL2ObDk3qX3vA5Q6J2I+HKX2ofJM59BwaKwS5ghw+IG # BmbKXUZJNjUQfN9dQ7vJuiuqdknJ2xUzwW2Vn612ffarbOZB1DZ6ruWlrHty5TjX # 0w4IXEJPBgZYbX9oc6zvTQnbLDBJbDU89mnme0TcmNMKWmQKTtc= # =vEv+ # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 Nov 2023 18:06:50 HKT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (63 commits) acpi/tests/avocado/bits: enable console logging from bits VM acpi/tests/avocado/bits: enforce 32-bit SMBIOS entry point hw/cxl: Add tunneled command support to mailbox for switch cci. hw/cxl: Add dummy security state get hw/cxl/type3: Cleanup multiple CXL_TYPE3() calls in read/write functions hw/cxl/mbox: Add Get Background Operation Status Command hw/cxl: Add support for device sanitation hw/cxl/mbox: Wire up interrupts for background completion hw/cxl/mbox: Add support for background operations hw/cxl: Implement Physical Ports status retrieval hw/pci-bridge/cxl_downstream: Set default link width and link speed hw/cxl/mbox: Add Physical Switch Identify command. hw/cxl/mbox: Add Information and Status / Identify command hw/cxl: Add a switch mailbox CCI function hw/pci-bridge/cxl_upstream: Move defintion of device to header. hw/cxl/mbox: Generalize the CCI command processing hw/cxl/mbox: Pull the CCI definition out of the CXLDeviceState hw/cxl/mbox: Split mailbox command payload into separate input and output hw/cxl/mbox: Pull the payload out of struct cxl_cmd and make instances constant hw/cxl: Fix a QEMU_BUILD_BUG_ON() in switch statement scope issue. ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-07Merge tag 'pull-xenfv.for-upstream-20231107' of ↵Stefan Hajnoczi
git://git.infradead.org/users/dwmw2/qemu into staging Xen PV guest support for 8.2 Add Xen PV console and network support, the former of which enables the Xen "PV shim" to be used to support PV guests. Also clean up the block support and make it work when the user passes just 'drive file=IMAGE,if=xen' on the command line. Update the documentation to reflect all of these, taking the opportunity to simplify what it says about q35 by making unplug work for AHCI. Ignore the VCPU_SSHOTTMR_future timer flag, and advertise the 'fixed' per-vCPU upcall vector support, as newer upstream Xen do. # -----BEGIN PGP SIGNATURE----- # # iQJIBAABCAAyFiEEvgfZ/VSAmrLEsP9fY3Ys2mfi81kFAmVJ/7EUHGR3bXcyQGlu # ZnJhZGVhZC5vcmcACgkQY3Ys2mfi81k+/xAAswivVR4+nwz3wTSN7EboGogS3hy+ # ZsTpvbJnfprGQJAK8vv8OP4eunaCJkO/dy3M/33Dh270msmV6I/1ki0E1RIPG45D # n5wKM1Zxk0ABvjIgdp3xiLwITTdruJ+k9aqV8U9quhjgNFdOa7yjBOG8MD32GEPZ # KHbavJ++huOu7+DZHJRNRq4gI/fREIULoPGHVg7WuEiRDYokOOmMROXqmTHTaUkV # yFhkofzWxlpYhh7qRQx6/A80CSf7xwCof8krjdMCOYj3XGzYVZND0z5ZfHQYEwqt # fowhargA8gH4V3d21S/MWCaZ+QrswFXZhcnl5wuGgWakV4ChvFETKs+fz2mODWUx # 2T13trqeFJ5ElTrSpH1iWCoSEy6KCeLecvx7c/6HPSkDYQ3w5q8dXPpqgEtXY24S # Wcmw4PkQ+HrLX7wbSU7QLyTZjvCQLFZ3Sb0uTf2zwsJZyeCCiT2lqAaogoMm6Kg0 # m/jG1JzE+9AC3j0Upp1lS3EK1qdxIuLdBuIcaEBEjy7Am+Y14PlZYoU2c751KbRF # kqnIOYMoijX0PJDomPqCQtYNE0mrtogo0AbcFFIu+4k25vGbkl7xS5p2du9qw2Rd # ++IdqQYzdzrUcIwmxocFQqFBJQ2dcbOGB1d7+VJ+A1Uj3yY2/DnFG5WqSaqS0KJi # ZhBdFs3OTlPnRoM= # =Dg79 # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 Nov 2023 17:13:21 HKT # gpg: using RSA key BE07D9FD54809AB2C4B0FF5F63762CDA67E2F359 # gpg: issuer "dwmw2@infradead.org" # gpg: Good signature from "David Woodhouse <dwmw2@infradead.org>" [unknown] # gpg: aka "David Woodhouse <dwmw2@exim.org>" [unknown] # gpg: aka "David Woodhouse <david@woodhou.se>" [unknown] # gpg: aka "David Woodhouse <dwmw2@kernel.org>" [unknown] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: BE07 D9FD 5480 9AB2 C4B0 FF5F 6376 2CDA 67E2 F359 * tag 'pull-xenfv.for-upstream-20231107' of git://git.infradead.org/users/dwmw2/qemu: docs: update Xen-on-KVM documentation xen-platform: unplug AHCI disks hw/i386/pc: support '-nic' for xen-net-device hw/xen: update Xen PV NIC to XenDevice model hw/xen: only remove peers of PCI NICs on unplug hw/xen: add support for Xen primary console in emulated mode hw/xen: update Xen console to XenDevice model hw/xen: do not repeatedly try to create a failing backend device hw/xen: add get_frontend_path() method to XenDeviceClass hw/xen: automatically assign device index to block devices hw/xen: populate store frontend nodes with XenStore PFN/port i386/xen: advertise XEN_HVM_CPUID_UPCALL_VECTOR in CPUID include: update Xen public headers to Xen 4.17.2 release hw/xen: Clean up event channel 'type_val' handling to use union i386/xen: Ignore VCPU_SSHOTTMR_future flag in set_singleshot_timer() Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-07hw/display/ati: allow compiling without PIXMANMarc-André Lureau
Change the "x-pixman" property default value and use the fallback path when PIXMAN support is disabled. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: BALATON Zoltan <balaton@eik.bme.hu>
2023-11-07hw/mips: FULOONG depends on VT82C686Marc-André Lureau
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-07hw/sm501: allow compiling without PIXMANMarc-André Lureau
Change the "x-pixman" property default value and use the fallback path when PIXMAN support is disabled. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
2023-11-07hw/arm: XLNX_VERSAL depends on XLNX_CSU_DMAMarc-André Lureau
Fixes: 868d968004 ("hw/arm/xlnx-versal: Connect OSPI flash controller") Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-07arm/kconfig: XLNX_ZYNQMP_ARM depends on PIXMANMarc-André Lureau
The Display Port has some strong PIXMAN dependency. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-11-07ui/spice: SPICE/QXL requires PIXMANMarc-André Lureau
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
2023-11-07vhost-user-gpu: skip VHOST_USER_GPU_UPDATE when !PIXMANMarc-André Lureau
This simply means that 2d drawing updates won't be handled, but 3d should work. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com>
2023-11-07virtio-gpu: replace PIXMAN for region/rect testMarc-André Lureau
Use a simpler implementation for rectangle geometry & intersect, drop the need for (more complex) PIXMAN functions. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com>
2023-11-07xen-platform: unplug AHCI disksDavid Woodhouse
To support Xen guests using the Q35 chipset, the unplug protocol needs to also remove AHCI disks. Make pci_xen_ide_unplug() more generic, iterating over the children of the PCI device and destroying the "ide-hd" devices. That works the same for both AHCI and IDE, as does the detection of the primary disk as unit 0 on the bus named "ide.0". Then pci_xen_ide_unplug() can be used for both AHCI and IDE devices. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Paul Durrant <paul@xen.org>
2023-11-07hw/i386/pc: support '-nic' for xen-net-deviceDavid Woodhouse
The default NIC creation seems a bit hackish to me. I don't understand why each platform has to call pci_nic_init_nofail() from a point in the code where it actually has a pointer to the PCI bus, and then we have the special cases for things like ne2k_isa. If qmp_device_add() can *find* the appropriate bus and instantiate the device on it, why can't we just do that from generic code for creating the default NICs too? But that isn't a yak I want to shave today. Add a xenbus field to the PCMachineState so that it can make its way from pc_basic_device_init() to pc_nic_init() and be handled as a special case like ne2k_isa is. Now we can launch emulated Xen guests with '-nic user'. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Paul Durrant <paul@xen.org>
2023-11-07hw/xen: update Xen PV NIC to XenDevice modelDavid Woodhouse
This allows us to use Xen PV networking with emulated Xen guests, and to add them on the command line or hotplug. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Paul Durrant <paul@xen.org>