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2023-04-20arm/mcimx7d-sabre: Set fec2-phy-connected property to falseGuenter Roeck
On mcimx7d-sabre, the MDIO bus is connected to the first Ethernet interface. Set fec2-phy-connected to false to reflect this. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-6-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20fsl-imx7: Add fec[12]-phy-connected propertiesGuenter Roeck
Add fec[12]-phy-connected properties and use it to set phy-connected and phy-consumer properties for imx_fec. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-5-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20arm/mcimx6ul-evk: Set fec1-phy-connected property to falseGuenter Roeck
On mcimx6ul-evk, the MDIO bus is connected to the second Ethernet interface. Set fec1-phy-connected to false to reflect this. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-4-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20fsl-imx6ul: Add fec[12]-phy-connected propertiesGuenter Roeck
Add fec[12]-phy-connected properties and use it to set phy-connected and phy-consumer properties for imx_fec. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-3-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20hw/net/imx_fec: Support two Ethernet interfaces connected to single MDIO busGuenter Roeck
The SOC on i.MX6UL and i.MX7 has 2 Ethernet interfaces. The PHY on each may be connected to separate MDIO busses, or both may be connected on the same MDIO bus using different PHY addresses. Commit 461c51ad4275 ("Add a phy-num property to the i.MX FEC emulator") added support for specifying PHY addresses, but it did not provide support for linking the second PHY on a given MDIO bus to the other Ethernet interface. To be able to support two PHY instances on a single MDIO bus, two properties are needed: First, there needs to be a flag indicating if the MDIO bus on a given Ethernet interface is connected. If not, attempts to read from this bus must always return 0xffff. Implement this property as phy-connected. Second, if the MDIO bus on an interface is active, it needs a link to the consumer interface to be able to provide PHY access for it. Implement this property as phy-consumer. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20230315145248.1639364-2-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20hw/core: Move numa.c into the target independent source setThomas Huth
There is nothing that depends on target specific macros in this file, so we can move it to the common source set to avoid that we have to compile this file multiple times (one time for each target). Message-Id: <20230413182636.139356-1-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-04-20hw/display: Compile vga.c as target-independent codeThomas Huth
The target checks here are only during the initialization, so they are not performance critical. We can switch these to runtime checks to avoid that we have to compile this file multiple times during the build, and make the code ready for an universal build one day. Message-Id: <20230412163501.36770-1-thuth@redhat.com> Reviewed-by: Fabiano Rosas <farosas@suse.de> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-04-20softmmu/qtest: Move the target-specific pseries RTAS code out of qtest.cThomas Huth
Ideally, qtest.c should be independent from target specific code, so we only have to compile it once for all targets. Thus start improving the situation by moving the pseries related code to hw/ppc/spapr_rtas.c instead and allow target code to register a callback handler for such target specific commands. Message-Id: <20230411183418.1640500-2-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-04-20hw/char: Move two more files from specific_ss to softmmu_ssThomas Huth
The code for these two devices seems to be independent from any target specific macros. "riscv_htif.c" is used for both, riscv32 and riscv64, so by moving this to the common code source set, we can avoid to compile it twice every time. "goldfish_tty.c" is only used for one target at the moment, but since it is a paravirtualized device, it could get useful for other targets one day, so let's move it now, too. Message-Id: <20230411173206.1511621-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-04-20hw/arm/virt: Restrict Cortex-A7 check to TCGPhilippe Mathieu-Daudé
The Cortex-A7 core is only available when TCG is enabled (see commit 80485d88f9 "target/arm: Restrict v7A TCG cpus to TCG accel"). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230405100848.76145-3-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20hw/timer/imx_epit: fix limit checkAxel Heider
Fix the limit check. If the limit is less than the compare value, the timer can never reach this value, thus it will never fire. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1491 Signed-off-by: Axel Heider <axel.heider@hensoldt.net> Message-id: 168070611775.20412.2883242077302841473-2@git.sr.ht Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20hw/timer/imx_epit: don't shadow variableAxel Heider
Fix issue reported by Coverity. Signed-off-by: Axel Heider <axel.heider@hensoldt.net> Message-id: 168070611775.20412.2883242077302841473-1@git.sr.ht Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20hw/arm: Add WDT to Allwinner-H3 and Orangepi-PCStrahinja Jankovic
This patch adds WDT to Allwinner-H3 and Orangepi-PC. WDT is added as an overlay to the Timer module memory area. Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20230326202256.22980-4-strahinja.p.jankovic@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20hw/arm: Add WDT to Allwinner-A10 and CubieboardStrahinja Jankovic
This patch adds WDT to Allwinner-A10 and Cubieboard. WDT is added as an overlay to the Timer module memory map. Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20230326202256.22980-3-strahinja.p.jankovic@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20hw/watchdog: Allwinner WDT emulation for system resetStrahinja Jankovic
This patch adds basic support for Allwinner WDT. Both sun4i and sun6i variants are supported. However, interrupt generation is not supported, so WDT can be used only to trigger system reset. Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Tested-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20230326202256.22980-2-strahinja.p.jankovic@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20exynos: Fix out-of-bounds access in exynos4210_gcomp_find debug printfFeng Jiang
One of the debug printfs in exynos4210_gcomp_find() will access outside the 's->g_timer.reg.comp[]' array if there was no active comparator and 'res' is -1. Add a conditional to avoid this. This doesn't happen in normal use because the debug printfs are by default not compiled in. Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn> Message-id: 20230404074506.112615-1-jiangfeng@kylinos.cn Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: Adjusted commit message to clarify that the overrun only happens if you've enabled debug printfs] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20hw/arm: Fix some typos in comments (most found by codespell)Stefan Weil
Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230409200526.1156456-1-sw@weilnetz.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-20lasi: fix RTC migrationPaolo Bonzini
Migrate rtc_ref (which only needs to be 32-bit because it is summed to a 32-bit register), which requires bumping the migration version. The HPPA machine does not have versioned machine types so it is okay to block migration to old versions of QEMU. While at it, drop the write-only field rtc from LasiState. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-04-20nvme: remove constant argument to tracepointPaolo Bonzini
The last argument to -pci_nvme_err_startfail_virt_state is always "OFFLINE" due to the enclosing "if" condition requiring !sctrl->scs. Reported by Coverity. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-04-20hw: Add compat machines for 8.1Cornelia Huck
Add 8.1 machine types for arm/i440fx/m68k/q35/s390x/spapr. Signed-off-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <20230314173009.152667-1-cohuck@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: Gavin Shan <gshan@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2023-04-13Merge tag 'migration-20230412-pull-request' of ↵Peter Maydell
https://gitlab.com/juan.quintela/qemu into staging Migration Pull request for 8.0 Last patches found: - peter xu preempt channel fixes. needed for backward compatibility with old machine types. - lukas fix to get compress working again. - fix ram on s390x. Get back to the old code, even when it shouldn't be needed, but as it fails on s390x, just revert. Later, Juan. # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEGJn/jt6/WMzuA0uC9IfvGFhy1yMFAmQ3HgQACgkQ9IfvGFhy # 1yPXGQ/+Pf6HepNUlIr7naYOcpRriXPQF+q1zqo74F9fy2vrGcwJOI6qmRTjsX4E # 9KgXipOz7+b5wSemF7PDKcnBiwyt6UHCH+XXe0h4TpyuORbtABKRgtOhA1/sa84D # HnKp0TwImpAO26tzPa7u49aau/EEVBKAzFVcyn4w56S9qiDWicOpd5kG0CJBIsMJ # Mnvy5fXaqQRewnKiwFoJGWfyhzEToDO6Z/SkT5xYON94P+eiM2xMwXOC5WcGfmY7 # wFGDB+SuyEP8TTn7mV0mmnlFjYe4G07hVARHSDFX3ho4b6q5F+WzfW095G6QKiu9 # n3Pzr7IBGX3sgetPtYwOwGsE9JrfHMFzBRxQZZwq5GSmjk7+agkbXmV7RyV82EYs # KYOhuNF91ca0qvCrGA/eGbbJqVrd7SR5FhS4SQ7oKd5n2au/ZHoKwAgm5lBdcvES # 2TB0MBN1s0JPh6KMV8tPB2miZyqPRa++oA8qIX7Asoe1X4xVT1FwiDaFL8TO8i2A # 7uBis3KLZqOHC6dAiXlCDtaADAWgQxjcdoS1l8jTF6MgBSe+zQhXG+pcIDuSiV9N # WfDiUPY97iqPTvpzdz3Is+LbBax2uY5ZR05KSdmCBpIgfvSWMqXtwRydclt6G5h7 # ZiOcTwrgMpXdbhdsFZTqVWAJG2sTkj4TA+IezVpXzPeQNLZ+T8k= # =kW3P # -----END PGP SIGNATURE----- # gpg: Signature made Wed 12 Apr 2023 22:09:24 BST # gpg: using RSA key 1899FF8EDEBF58CCEE034B82F487EF185872D723 # gpg: Good signature from "Juan Quintela <quintela@redhat.com>" [full] # gpg: aka "Juan Quintela <quintela@trasno.org>" [full] # Primary key fingerprint: 1899 FF8E DEBF 58CC EE03 4B82 F487 EF18 5872 D723 * tag 'migration-20230412-pull-request' of https://gitlab.com/juan.quintela/qemu: migration: fix ram_state_pending_exact() migration/ram.c: Fix migration with compress enabled migration: Recover behavior of preempt channel creation for pre-7.2 migration: Fix potential race on postcopy_qemufile_src io: tls: Inherit QIO_CHANNEL_FEATURE_SHUTDOWN on server side Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-13hw/xen: Fix double-free in xen_console store_con_info()David Woodhouse
Coverity spotted a double-free (CID 1508254); we g_string_free(path) and then for some reason immediately call free(path) too. We should just use g_autoptr() for it anyway, which simplifies the code a bit. Fixes: 7a8a749da7d3 ("hw/xen: Move xenstore_store_pv_console_info to xen_console.c") Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-12migration: Fix potential race on postcopy_qemufile_srcPeter Xu
postcopy_qemufile_src object should be owned by one thread, either the main thread (e.g. when at the beginning, or at the end of migration), or by the return path thread (when during a preempt enabled postcopy migration). If that's not the case the access to the object might be racy. postcopy_preempt_shutdown_file() can be potentially racy, because it's called at the end phase of migration on the main thread, however during which the return path thread hasn't yet been recycled; the recycle happens in await_return_path_close_on_source() which is after this point. It means, logically it's posslbe the main thread and the return path thread are both operating on the same qemufile. While I don't think qemufile is thread safe at all. postcopy_preempt_shutdown_file() used to be needed because that's where we send EOS to dest so that dest can safely shutdown the preempt thread. To avoid the possible race, remove this only place that a race can happen. Instead we figure out another way to safely close the preempt thread on dest. The core idea during postcopy on deciding "when to stop" is that dest will send a postcopy SHUT message to src, telling src that all data is there. Hence to shut the dest preempt thread maybe better to do it directly on dest node. This patch proposed such a way that we change postcopy_prio_thread_created into PreemptThreadStatus, so that we kick the preempt thread on dest qemu by a sequence of: mis->preempt_thread_status = PREEMPT_THREAD_QUIT; qemu_file_shutdown(mis->postcopy_qemufile_dst); While here shutdown() is probably so far the easiest way to kick preempt thread from a blocked qemu_get_be64(). Then it reads preempt_thread_status to make sure it's not a network failure but a willingness to quit the thread. We could have avoided that extra status but just rely on migration status. The problem is postcopy_ram_incoming_cleanup() is just called early enough so we're still during POSTCOPY_ACTIVE no matter what.. So just make it simple to have the status introduced. One flag x-preempt-pre-7-2 is added to keep old pre-7.2 behaviors of postcopy preempt. Fixes: 9358982744 ("migration: Send requested page directly in rp-return thread") Signed-off-by: Peter Xu <peterx@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com>
2023-04-12hw/nvme: fix memory leak in nvme_dsmKlaus Jensen
The iocb (and the allocated memory to hold LBA ranges) leaks if reading the LBA ranges fails. Fix this by adding a free and an unref of the iocb. Reported-by: Coverity (CID 1508281) Fixes: d7d1474fd85d ("hw/nvme: reimplement dsm to allow cancellation") Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2023-04-12hw/nvme: fix memory leak in fdp ruhid parsingKlaus Jensen
Coverity reports a memory leak of memory when parsing ruhids at namespace initialization. Since this is just working memory, not needed beyond the scope of the functions, fix this by adding a g_autofree annotation. Reported-by: Coverity (CID 1507979) Fixes: 73064edfb864 ("hw/nvme: flexible data placement emulation") Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2023-04-11hw/i2c/allwinner-i2c: Fix subclassing of TYPE_AW_I2C_SUN6IPeter Maydell
In commit 8461bfdca9c we added the TYPE_AW_I2C_SUN6I, which is a minor variant of the TYPE_AW_I2C device. However, we didn't quite get the class hierarchy right. We made the new TYPE_AW_I2C_SUN6I a subclass of TYPE_SYS_BUS_DEVICE, which means that you can't validly use a pointer to this object via the AW_I2C() cast macro, which insists on having something that is an instance of TYPE_AW_I2C or some subclass of that type. This only causes a problem if QOM cast macro debugging is enabled; that is supposed to be on by default, but a mistake in the meson conversion in commit c55cf6ab03f4c meant that it ended up disabled by default, and we didn't catch this bug. Fix the problem by arranging the classes in the same way we do for TYPE_PL011 and TYPE_PL011_LUMINARY in hw/char/pl011.c -- make the variant class be a subclass of the "normal" version of the device. This was reported in https://gitlab.com/qemu-project/qemu/-/issues/1586 but this fix alone isn't sufficient, as there is a separate cast-related issue in the CXL code in pci_expander_bridge.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com>
2023-04-05Revert "memory: Optimize replay of guest mapping"Peter Maydell
This reverts commit 6da24341866fa940fd7d575788a2319514941c77 ("memory: Optimize replay of guest mapping"). This change breaks the mps3-an547 board under TCG (and probably other TCG boards using an IOMMU), which now assert: $ ./build/x86/qemu-system-arm --machine mps3-an547 -serial stdio -kernel /tmp/an547-mwe/build/test.elf qemu-system-arm: ../../softmmu/memory.c:1903: memory_region_register_iommu_notifier: Assertion `n->end <= memory_region_size(mr)' failed. This is because tcg_register_iommu_notifier() registers an IOMMU notifier which covers the entire address space, so the assertion added in this commit is not correct. For the 8.0 release, just revert this commit as it is only an optimization. Fixes: 6da24341866f ("memory: Optimize replay of guest mapping") Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 917c1c552b2d1b732f9a86c6a90684c3a5e4cada.1680640587.git.mst@redhat.com
2023-04-04Merge tag 'pull-loongarch-20230404' of https://gitlab.com/gaosong/qemu into ↵Peter Maydell
staging pull-loongarch-20230404 # -----BEGIN PGP SIGNATURE----- # # iLMEAAEIAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZCwLXQAKCRBAov/yOSY+ # 3zwUA/9d2ddHxGEBTMyF45bzc9JxRF6HoILAwMLsmPWqspPgKdGuviMVewJLt5m8 # V75/BC6Sn9rhdkXALvZMRV6WQ2A16pByUaQtMYAXVsIoV8Mrpvm4GwJD1E0/cy5Q # TwDTzpDfys9WsTVj0QlCPjp0JW+KA7Y6ArMUUCdCz41L2r7mPA== # =ovw7 # -----END PGP SIGNATURE----- # gpg: Signature made Tue 04 Apr 2023 12:34:53 BST # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF * tag 'pull-loongarch-20230404' of https://gitlab.com/gaosong/qemu: target/loongarch: Enables plugins to get instruction codes hw/loongarch/virt: Fix virt_to_phys_addr function Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-04hw/loongarch/virt: Fix virt_to_phys_addr functionTianrui Zhao
The virt addr should mask TARGET_PHYS_ADDR_SPACE_BITS to get the phys addr, and this is used by loading kernel elf. Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230327112313.3042829-1-zhaotianrui@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2023-04-03hw/ssi: Fix Linux driver init issue with xilinx_spiChris Rauer
The problem is that the Linux driver expects the master transaction inhibit bit(R_SPICR_MTI) to be set during driver initialization so that it can detect the fifo size but QEMU defaults it to zero out of reset. The datasheet indicates this bit is active on reset. See page 25, SPI Control Register section: https://www.xilinx.com/content/dam/xilinx/support/documents/ip_documentation/axi_quad_spi/v3_2/pg153-axi-quad-spi.pdf Signed-off-by: Chris Rauer <crauer@google.com> Message-id: 20230323182811.2641044-1-crauer@google.com Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-03hw/arm: do not free machine->fdt in arm_load_dtb()Markus Armbruster
At this moment, arm_load_dtb() can free machine->fdt when binfo->dtb_filename is NULL. If there's no 'dtb_filename', 'fdt' will be retrieved by binfo->get_dtb(). If get_dtb() returns machine->fdt, as is the case of machvirt_dtb() from hw/arm/virt.c, fdt now has a pointer to machine->fdt. And, in that case, the existing g_free(fdt) at the end of arm_load_dtb() will make machine->fdt point to an invalid memory region. Since monitor command 'dumpdtb' was introduced a couple of releases ago, running it with any ARM machine that uses arm_load_dtb() will crash QEMU. Let's enable all arm_load_dtb() callers to use dumpdtb properly. Instead of freeing 'fdt', assign it back to ms->fdt. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: qemu-arm@nongnu.org Fixes: bf353ad55590f ("qmp/hmp, device_tree.c: introduce dumpdtb") Reported-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-id: 20230328165935.1512846-1-armbru@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-03-30hw/i2c: pmbus: block uninitialised string readsTitus Rwantare
Devices models calling pmbus_send_string can't be relied upon to send a non-zero pointer. This logs an error and doesn't segfault. Reviewed-by: Patrick Venture <venture@google.com> Signed-off-by: Titus Rwantare <titusr@google.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230322175513.1550412-5-titusr@google.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-03-30hw/mips/gt64xxx_pci: Don't endian-swap GT_PCI0_CFGADDRJiaxun Yang
145e2198d749 ("hw/mips/gt64xxx_pci: Endian-swap using PCI_HOST_BRIDGE MemoryRegionOps") converted CFGADDR/CFGDATA registers to use PCI_HOST_BRIDGE's accessor facility and enabled byte swap for both CFGADDR/CFGDATA register. However CFGADDR as a ISD internal register is not controlled by MByteSwap bit, it follows endian of all other ISD register, which means it ties to little endian. Move mapping of CFGADDR out of gt64120_update_pci_cfgdata_mapping to disable endian-swapping. Fixes: 145e2198d749 ("hw/mips/gt64xxx_pci: Endian-swap using PCI_HOST_BRIDGE MemoryRegionOps") Reported-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Nathan Chancellor <nathan@kernel.org> Message-Id: <20230223161958.48696-1-jiaxun.yang@flygoat.com> [PMD: !!! Note this only fixes little-endian hosts !!! ] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-03-28Merge tag 'net-pull-request' of https://github.com/jasowang/qemu into stagingPeter Maydell
# -----BEGIN PGP SIGNATURE----- # Version: GnuPG v1 # # iQEcBAABAgAGBQJkIncaAAoJEO8Ells5jWIR6bgH/icQAN1a0PBHh2lujmob8KvE # IZ0KYuJMDcA8HFdhnzxPPKj7/77AM1DgmrmVwqLKTr6j64CZYr2Uc0yeyPa0f/0Y # TtePW70bjoUkRm/dDdFe32xViO4O33pGQia6olR6QwmfdDbBBJjAucmlep8NClrh # EooQ2WfXPBqrC6ckKZ7vEvgKV2sDl2XxYIr3kU3MiB4j4b1lrGHE+XSv7cXOC+at # G2vYqbimipZstHZCJYeB5tRz+FXbAI3ZNCGtYpxeVyabrlHS+n+X+gttaswcvVIF # ln6yidVGg/Ot3bi0qiV1WihpqNCWO0ghhf7wIEubAIIJlnE5hXULF4uFVfz+rRE= # =HjJv # -----END PGP SIGNATURE----- # gpg: Signature made Tue 28 Mar 2023 06:11:54 BST # gpg: using RSA key EF04965B398D6211 # gpg: Good signature from "Jason Wang (Jason Wang on RedHat) <jasowang@redhat.com>" [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 215D 46F4 8246 689E C77F 3562 EF04 965B 398D 6211 * tag 'net-pull-request' of https://github.com/jasowang/qemu: igb: respect VMVIR and VMOLR for VLAN igb: implement VF Tx and Rx stats igb: respect E1000_VMOLR_RSSE igb: check oversized packets for VMDq igb: implement VFRE and VFTE registers igb: add ICR_RXDW igb: handle PF/VF reset properly MAINTAINERS: Add Sriram Yagnaraman as a igb reviewer hw/net/net_tx_pkt: Align l3_hdr hw/net/net_tx_pkt: Ignore ECN bit igb: Fix DMA requester specification for Tx packet igb: Save more Tx states Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-03-28igb: respect VMVIR and VMOLR for VLANSriram Yagnaraman
Add support for stripping/inserting VLAN for VFs. Had to move CSUM calculation back into the for loop, since packet data is pulled inside the loop based on strip VLAN decision for every VF. net_rx_pkt_fix_l4_csum should be extended to accept a buffer instead for igb. Work for a future patch. Signed-off-by: Sriram Yagnaraman <sriram.yagnaraman@est.tech> Signed-off-by: Jason Wang <jasowang@redhat.com>
2023-03-28igb: implement VF Tx and Rx statsSriram Yagnaraman
Please note that loopback counters for VM to VM traffic is not implemented yet: VFGOTLBC, VFGPTLBC, VFGORLBC and VFGPRLBC. Signed-off-by: Sriram Yagnaraman <sriram.yagnaraman@est.tech> Signed-off-by: Jason Wang <jasowang@redhat.com>
2023-03-28igb: respect E1000_VMOLR_RSSESriram Yagnaraman
RSS for VFs is only enabled if VMOLR[n].RSSE is set. Signed-off-by: Sriram Yagnaraman <sriram.yagnaraman@est.tech> Signed-off-by: Jason Wang <jasowang@redhat.com>
2023-03-28igb: check oversized packets for VMDqSriram Yagnaraman
Signed-off-by: Sriram Yagnaraman <sriram.yagnaraman@est.tech> Signed-off-by: Jason Wang <jasowang@redhat.com>
2023-03-28igb: implement VFRE and VFTE registersSriram Yagnaraman
Also introduce: - Checks for RXDCTL/TXDCTL queue enable bits - IGB_NUM_VM_POOLS enum (Sec 1.5: Table 1-7) Signed-off-by: Sriram Yagnaraman <sriram.yagnaraman@est.tech> Signed-off-by: Jason Wang <jasowang@redhat.com>
2023-03-28igb: add ICR_RXDWSriram Yagnaraman
IGB uses RXDW ICR bit to indicate that rx descriptor has been written back. This is the same as RXT0 bit in older HW. Signed-off-by: Sriram Yagnaraman <sriram.yagnaraman@est.tech> Signed-off-by: Jason Wang <jasowang@redhat.com>
2023-03-28igb: handle PF/VF reset properlySriram Yagnaraman
Use PFRSTD to reset RSTI bit for VFs, and raise VFLRE interrupt when VF is reset. Signed-off-by: Sriram Yagnaraman <sriram.yagnaraman@est.tech> Signed-off-by: Jason Wang <jasowang@redhat.com>
2023-03-28hw/net/net_tx_pkt: Align l3_hdrAkihiko Odaki
Align the l3_hdr member of NetTxPkt by defining it as a union of ip_header, ip6_header, and an array of octets. Fixes: e263cd49c7 ("Packet abstraction for VMWARE network devices") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1544 Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2023-03-28hw/net/net_tx_pkt: Ignore ECN bitAkihiko Odaki
No segmentation should be performed if gso type is VIRTIO_NET_HDR_GSO_NONE even if ECN bit is set. Fixes: e263cd49c7 ("Packet abstraction for VMWARE network devices") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1544 Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2023-03-28igb: Fix DMA requester specification for Tx packetAkihiko Odaki
igb used to specify the PF as DMA requester when reading Tx packets. This made Tx requests from VFs to be performed on the address space of the PF, defeating the purpose of SR-IOV. Add some logic to change the requester depending on the queue, which can be assigned to a VF. Fixes: 3a977deebe ("Intrdocue igb device emulation") Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2023-03-28igb: Save more Tx statesAkihiko Odaki
The current implementation of igb uses only part of a advanced Tx context descriptor and first data descriptor because it misses some features and sniffs the trait of the packet instead of respecting the packet type specified in the descriptor. However, we will certainly need the entire Tx context descriptor when we update igb to respect these ignored fields. Save the entire context descriptor and first data descriptor except the buffer address to prepare for such a change. This also introduces the distinction of contexts with different indexes, which was not present in e1000e but in igb. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Reviewed-by: Sriram Yagnaraman <sriram.yagnaraman@est.tech> Signed-off-by: Jason Wang <jasowang@redhat.com>
2023-03-27hw/nvme: fix missing DNR on compare failureKlaus Jensen
Even if the host is somehow using compare to do compare-and-write, the host should be notified immediately about the compare failure and not have to wait for the driver to potentially retry the command. Fixes: 0a384f923f51 ("hw/block/nvme: add compare command") Reported-by: Jim Harris <james.r.harris@intel.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2023-03-27hw/nvme: Change alignment in dma functions for nvme_blk_*Mateusz Kozlowski
Since the nvme_blk_read/write are used by both the data and metadata portions of the IO, it can't have the 512B alignment requirement. Without this change any metadata transfer, which length isn't a multiple of 512B and which is bigger than 512B, will result in only a partial transfer. Signed-off-by: Mateusz Kozlowski <kozlowski.mateuszpl@gmail.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2023-03-24Merge tag 'pull-request-2023-03-24' of https://gitlab.com/thuth/qemu into ↵Peter Maydell
staging * Remove TABs in hw/ide and hw/block * Two fixes for GCC 13 * MSYS2 CI job improvements # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmQdwwkRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbXnWg//TcpLes6b30dTFJ3NwTYaL+ElGvcfQiXx # DNUdmCuxH+2YJGORvVutbVslxFAXgYn8z6lmjgTSx+HziwmY3WhtWSQNOAxRrpoj # Rq1r59q7FPKY/qoLjTMeQDe3O+jrGte7dX14TbKRpPDSZxxJjpswACDgCsGWqE8x # 0SGSLRlqqqnrQE0H1RfmP++0yAtHmGSN3TK0/bFmY4B+mMpj8beAq020h2iCCdbP # 7qWMI0o96lAl/D/wA55BNKuWsdXdIeQjPPoxxGEtiXN27Xk7oyQS47JkZdz6C1Lq # V8/lF2Pa/eC6uPjnxpQDGp1IkaBE7/rn4450h9EMESrjL50As2yPUkw3BecqimHA # fYMbSXrGe9urIflkZcY7Nx2PaBB5v1ZR3iiemjd8qahjgiT8DJYWtjFYKbuFsqJ+ # Ra13Ey9PEX13dROXBAFeX+rdaMiRQEkyQv8GSwPlnNW7OzFJc/qr8EIQOuu1flmm # 7KLYp6h45Os/fN90Lnn5N9LhjUET+2XDqEljAyyziTjsIuc1i3mPjR45j0KSq7tv # eBp6SXpHkXrpKDrXSsJMa4SzSfK6VOHrtseE4b2XCKQLr4oSpr8d6eembKGyvNzs # zh4TtsC+WfTu4HY5Dcbat34QAtAfGUr7ERX4/s+bnvQd944/7skOAqM7Ia9tOMKH # ABuxJ8A7PIY= # =myGG # -----END PGP SIGNATURE----- # gpg: Signature made Fri 24 Mar 2023 15:34:33 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2023-03-24' of https://gitlab.com/thuth/qemu: Revert "docs/about/deprecated: Deprecate 32-bit arm hosts for system emulation" cirrus-ci: Remove MSYS2 jobs duplicated with gitlab-ci gitlab-ci: Cover SPICE in the MSYS2 job ui/spice: fix compilation on win32 target/ppc: Fix helper_pminsn() prototype target/s390x: Fix float_comp_to_cc() prototype hw/block: replace TABs with space hw/ide: replace TABs with space Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-03-24hw/xenpv: Initialize Xen backend operationsDavid Woodhouse
As the Xen backend operations were abstracted out into a function table to allow for internally emulated Xen support, we missed the xen_init_pv() code path which also needs to install the operations for the true Xen libraries. Add the missing call to setup_xen_backend_ops(). Fixes: b6cacfea0b38 ("hw/xen: Add evtchn operations to allow redirection to internal emulation") Reported-by: Anthony PERARD <anthony.perard@citrix.com> Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Paul Durrant <paul@xen.org> Tested-by: Anthony PERARD <anthony.perard@citrix.com> Message-Id: <5dfb65342d4502c1ce2f890c97cff20bf25b3860.camel@infradead.org> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
2023-03-24hw/block: replace TABs with spaceYeqi Fu
Bring the block files in line with the QEMU coding style, with spaces for indentation. This patch partially resolves the issue 371. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/371 Signed-off-by: Yeqi Fu <fufuyqqqqqq@gmail.com> Message-Id: <20230314095001.13801-1-fufuyqqqqqq@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>