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2017-09-27Merge remote-tracking branch ↵Peter Maydell
'remotes/dgilbert/tags/pull-migration-20170927a' into staging Migration pull 2017-09-27 # gpg: Signature made Wed 27 Sep 2017 14:56:23 BST # gpg: using RSA key 0x0516331EBC5BFDE7 # gpg: Good signature from "Dr. David Alan Gilbert (RH2) <dgilbert@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 45F5 C71B 4A0C B7FB 977A 9FA9 0516 331E BC5B FDE7 * remotes/dgilbert/tags/pull-migration-20170927a: migration: Route more error paths migration: Route errors up through vmstate_save migration: wire vmstate_save_state errors up to vmstate_subsection_save migration: Check field save returns migration: check pre_save return in vmstate_save_state migration: pre_save return int migration: disable auto-converge during bulk block migration Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-27migration: Route more error pathsDr. David Alan Gilbert
vmstate_save_state is called in lots of places. Route error returns from the easier cases back up; there are lots of more complex cases where their own error paths need fixing. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20170925112917.21340-7-dgilbert@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Commit message fix up as Peter's review
2017-09-27migration: pre_save return intDr. David Alan Gilbert
Modify the pre_save method on VMStateDescription to return an int rather than void so that it potentially can fail. Changed zillions of devices to make them return 0; the only case I've made it return non-0 is hw/intc/s390_flic_kvm.c that already had an error_report/return case. Note: If you add an error exit in your pre_save you must emit an error_report to say why. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20170925112917.21340-2-dgilbert@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
2017-09-27macio: use object link between MACIO_IDE and MAC_DBDMA objectMark Cave-Ayland
Using a standard QOM object link we can pass a reference to the MAC_DBDMA controller to the MACIO_IDE object which removes the last external parameter to macio_ide_register_dma(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-27macio: pass channel into MACIOIDEState via qdev propertyMark Cave-Ayland
One of the reasons macio_ide_register_dma() needs to exist is because the channel id isn't passed into the MACIO_IDE object. Pass in the channel id using a qdev property to remove this requirement. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-27mac_dbdma: remove DBDMA_init() functionMark Cave-Ayland
Instead we can now instantiate the MAC_DBDMA object directly within the macio device. We also add the DBDMA device as a child property so that it is possible to retrieve later. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-27mac_dbdma: QOMifyMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-27mac_dbdma: remove unused IO fields from DBDMAStateMark Cave-Ayland
These fields were used to manually handle IO requests that weren't aligned to a sector boundary before this feature was supported by the block API. Once the block API changed to support byte-aligned IO requests, the macio controller was switched over to use it in commit be1e343 but these fields were accidentally left behind. Remove them, including the initialisation in DBDMA_init(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-27spapr: fix the value of SDR1 in kvmppc_put_books_sregs()Greg Kurz
When running with KVM PR, if a new HPT is allocated we need to inform KVM about the HPT address and size. This is currently done by hacking the value of SDR1 and pushing it to KVM in several places. Also, migration breaks the guest since it is very unlikely the HPT has the same address in source and destination, but we push the incoming value of SDR1 to KVM anyway. This patch introduces a new virtual hypervisor hook so that the spapr code can provide the correct value of SDR1 to be pushed to KVM each time kvmppc_put_books_sregs() is called. It allows to get rid of all the hacking in the spapr/kvmppc code and it fixes migration of nested KVM PR. Suggested-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-27ppc/pnv: check for OPAL firmware file presenceCédric Le Goater
and exit before uselessly trying to load it if the file does not exists. Issue discovered by Coverity Scan. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-27spapr_pci: make index property mandatoryGreg Kurz
PHBs can be created with an index property, in which case the machine code automatically sets all the MMIO windows at addresses derived from the index. Alternatively, they can be manually created without index, but the user has to provide addresses for all MMIO windows. The non-index way happens to be more trouble than it's worth: it's difficult to use, keeps requiring (potentially incompatible) changes when some new parameter needs adding, and is awkward to check for collisions. It currently even has a bug that prevents to use two non-index PHBs because their child DRCs are all derived from the same index == -1 value, and, thus, collide. This patch hence makes the index property mandatory. As a consequence, the PHB's memory regions and BUID are now always configured according to the index, and it is no longer possible to set them from the command line. This DOES BREAK backwards compat, but we don't think the non-index PHB feature was used in practice (at least libvirt doesn't) and the simplification is worth it. Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-27macio: convert pmac_ide_ops from old_mmioMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-27spapr: introduce helpers to migrate HPT chunks and the end markerGreg Kurz
This consolidates some duplicated code in a dedicated helpers. Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-27ppc/kvm: generalize the use of kvmppc_get_htab_fd()Greg Kurz
The use of KVM_PPC_GET_HTAB_FD is open-coded in kvmppc_read_hptes() and kvmppc_write_hpte(). This patch modifies kvmppc_get_htab_fd() so that it can be used everywhere we need to access the in-kernel htab: - add an index argument => only kvmppc_read_hptes() passes an actual index, all other users pass 0 - add an errp argument to propagate error messages to the caller. => spapr migration code prints the error => hpte helpers pass &error_abort to keep the current behavior of hw_error() While here, this also fixes a bug in kvmppc_write_hpte() so that it opens the htab fd for writing instead of reading as it currently does. This never broke anything because we currently never call this code, as explained in the changelog of commit c1385933804bb: "This support updating htab managed by the hypervisor. Currently we don't have any user for this feature. This actually bring the store_hpte interface in-line with the load_hpte one. We may want to use this when we want to emulate henter hcall in qemu for HV kvm." The above is still true today. Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-27ppc/kvm: change kvmppc_get_htab_fd() to return -errno on errorGreg Kurz
When kvmppc_get_htab_fd() fails, its return value is propagated up to qemu_savevm_state_iterate() or to qemu_savevm_state_complete_precopy(). All savevm handlers expect to receive a negative errno on error. Let's patch kvmppc_get_htab_fd() accordingly. While here, let's change htab_load() in the spapr code to also propagate the error, since it doesn't make sense to abort() if we couldn't get the htab fd from KVM. Signed-off-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-27ppc: Fix OpenPIC modelBenjamin Herrenschmidt
Apple uses an IBM MPIC2A without timers, it has 64 sources. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-27ppc/ide/macio: Add missing registersBenjamin Herrenschmidt
The timing register exists on all variants of MacIO IDE, we just store and return its value. The interrupts register only exists on KeyLargo but it doesn't hurt to have it. The lack of this register causes MacOS X to hangs under some circumstances. Both are 32-bit only. The HW might support smaller access sizes but no known OS uses them. Because the core IDE subsystem doesn't provide us with a way to query the main (level) interrupt state, nor do we have a way to know that DBDMA issued a (edge) interrupt, we reflect both through a private pair of qirq's in order to maintain the register state. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-27ppc/mac: More rework of the DBDMA emulationBenjamin Herrenschmidt
This completely reworks the handling of the control register according to my understanding of the HW and the spec. It should (hopefully ... still testing) fix a number of issues most notably cases of MacOS hanging. Also update dbdma_unassigned_rw() and dbdma_unassigned_flush() to have the expected behaviour now that flush is handled slightly differently. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-27ppc/mac: Advertise a high clock frequency for NewWorld MacsBenjamin Herrenschmidt
We use 900Mhz, otherwise MacOS X 10.5 refuses to install. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-27ppc: QOMify g3beige machineMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-27ppc4xx: Add more PLB registersBALATON Zoltan
These registers are present in 440 SoCs (and maybe in others too) and U-Boot accesses them when printing register info. We don't emulate these but add them to avoid crashing when they are read or written. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-27ehci: Add ppc4xx-ehci for the USB 2.0 controller in embedded PPC SoCsBALATON Zoltan
Some PPC SoCs have an EHCI with OHCI companion USB controller. Add a new type for this similar to types used for other embedded SoCs. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-27ohci: Allow sysbus version to be used as a companionBALATON Zoltan
Some PPC SoCs have an EHCI with OHCI companion USB controller. To emulate this allow the sysbus version of OHCI to be used as a companion. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-09-26hw/isa/pc87312: Mark the device with user_creatable = falseThomas Huth
QEMU currently aborts if you try to use the device at the command line: $ ppc64-softmmu/qemu-system-ppc64 -S -machine prep -device pc87312 Unexpected error in qemu_chr_fe_init() at chardev/char-fe.c:222: qemu-system-ppc64: -device pc87312: Device 'parallel0' is in use Aborted (core dumped) It uses parallel_hds in its realize function, so I can not be instantiated by the user again. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2017-09-26hw/display/virtio-gpu: Put the virtio-gpu-device into the display categoryThomas Huth
The virtio-gpu-pci device is already in the display category, so the virtio-gpu-device should be there, too. Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2017-09-26hw/display/xenfb.c: Add trace_xenfb_key_eventLiang Yan
It may be better to add a trace event to monitor the last moment of a key event from QEMU to guest VM Signed-off-by: Liang Yan <lyan@suse.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2017-09-26aux-to-i2c-bridge: don't allow user to create oneKONRAD Frederic
This device is private and is created once per aux-bus. So don't allow the user to create one from command-line. Reported-by: Thomas Huth <thuth@redhat.com> Signed-off-by: KONRAD Frederic <frederic.konrad@adacore.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2017-09-26Replace round_page() with TARGET_PAGE_ALIGN()Kamil Rytarowski
This change fixes conflict with the DragonFly BSD headers. Signed-off-by: Kamil Rytarowski <n54@gmx.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2017-09-23Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell
* Speed up AddressSpaceDispatch creation (Alexey) * Fix kvm.c assert (David) * Memory fixes and further speedup (me) * Persistent reservation manager infrastructure (me) * virtio-serial: add enable_backend callback (Pavel) * chardev GMainContext fixes (Peter) # gpg: Signature made Fri 22 Sep 2017 20:07:33 BST # gpg: using RSA key 0xBFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (32 commits) chardev: remove context in chr_update_read_handler chardev: use per-dev context for io_add_watch_poll chardev: add Chardev.gcontext field chardev: new qemu_chr_be_update_read_handlers() scsi: add persistent reservation manager using qemu-pr-helper scsi: add multipath support to qemu-pr-helper scsi: build qemu-pr-helper scsi, file-posix: add support for persistent reservation management memory: Share special empty FlatView memory: seek FlatView sharing candidates among children subregions memory: trace FlatView creation and destruction memory: Create FlatView directly memory: Get rid of address_space_init_shareable memory: Rework "info mtree" to print flat views and dispatch trees memory: Do not allocate FlatView in address_space_init memory: Share FlatView's and dispatch trees between address spaces memory: Move address_space_update_ioeventfds memory: Alloc dispatch tree where topology is generared memory: Store physical root MR in FlatView memory: Rename mem_begin/mem_commit/mem_add helpers ... # Conflicts: # configure
2017-09-22ide: fix enum comparison for gcc 4.7John Snow
Apparently GCC gets bent over comparing enum values against zero. Replace the conditional with something less readable. Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 20170921013821.1673-1-jsnow@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-22buildsys: Move usb redir cflags/libs to per objectFam Zheng
Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170907082918.7299-10-famz@redhat.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Fam Zheng <famz@redhat.com>
2017-09-22buildsys: Move libusb cflags/libs to per objectFam Zheng
Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170907082918.7299-9-famz@redhat.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Fam Zheng <famz@redhat.com>
2017-09-22buildsys: Move libcacard cflags/libs to per objectFam Zheng
Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170907082918.7299-8-famz@redhat.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Fam Zheng <famz@redhat.com>
2017-09-22memory: Get rid of address_space_init_shareableAlexey Kardashevskiy
Since FlatViews are shared now and ASes not, this gets rid of address_space_init_shareable(). This should cause no behavioural change. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Message-Id: <20170921085110.25598-17-aik@ozlabs.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-09-21memory: Switch memory from using AddressSpace to FlatViewAlexey Kardashevskiy
FlatView's will be shared between AddressSpace's and subpage_t and MemoryRegionSection cannot store AS anymore, hence this change. In particular, for: typedef struct subpage_t { MemoryRegion iomem; - AddressSpace *as; + FlatView *fv; hwaddr base; uint16_t sub_section[]; } subpage_t; struct MemoryRegionSection { MemoryRegion *mr; - AddressSpace *address_space; + FlatView *fv; hwaddr offset_within_region; Int128 size; hwaddr offset_within_address_space; bool readonly; }; This should cause no behavioural change. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Message-Id: <20170921085110.25598-7-aik@ozlabs.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-09-21msf2: Add Emcraft's Smartfusion2 SOM kitSubbaraya Sundeep
Emulated Emcraft's Smartfusion2 System On Module starter kit. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-6-f4bug@amsat.org [PMD: drop cpu_model to directly use cpu type] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-21msf2: Add Smartfusion2 SoCSubbaraya Sundeep
Smartfusion2 SoC has hardened Microcontroller subsystem and flash based FPGA fabric. This patch adds support for Microcontroller subsystem in the SoC. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-5-f4bug@amsat.org [PMD: drop cpu_model to directly use cpu type, check m3clk non null] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-21msf2: Add Smartfusion2 SPI controllerSubbaraya Sundeep
Modelled Microsemi's Smartfusion2 SPI controller. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-4-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-21msf2: Microsemi Smartfusion2 System Register blockSubbaraya Sundeep
Added Sytem register block of Smartfusion2. This block has PLL registers which are accessed by guest. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-3-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-21msf2: Add Smartfusion2 System timerSubbaraya Sundeep
Modelled System Timer in Microsemi's Smartfusion2 Soc. Timer has two 32bit down counters and two interrupts. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-2-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-21hw/arm/omap2.c: Don't use old_mmioPeter Maydell
Don't use old_mmio in the memory region ops struct. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505580378-9044-7-git-send-email-peter.maydell@linaro.org
2017-09-21hw/i2c/omap_i2c.c: Don't use old_mmioPeter Maydell
Don't use old_mmio in the memory region ops struct. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505580378-9044-6-git-send-email-peter.maydell@linaro.org
2017-09-21hw/timer/omap_gptimer: Don't use old_mmioPeter Maydell
Don't use the old_mmio struct in memory region ops. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505580378-9044-5-git-send-email-peter.maydell@linaro.org
2017-09-21hw/timer/omap_synctimer.c: Don't use old_mmioPeter Maydell
Don't use the old_mmio in the memory region ops struct. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505580378-9044-4-git-send-email-peter.maydell@linaro.org
2017-09-21hw/gpio/omap_gpio.c: Don't use old_mmioPeter Maydell
Drop the use of old_mmio in the omap2_gpio memory ops. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505580378-9044-3-git-send-email-peter.maydell@linaro.org
2017-09-21hw/arm/palm.c: Don't use old_mmio for static_opsPeter Maydell
Update the static_ops functions to use new-style mmio rather than the legacy old_mmio functions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505580378-9044-2-git-send-email-peter.maydell@linaro.org
2017-09-21nvic: Support banked exceptions in acknowledge and completePeter Maydell
Update armv7m_nvic_acknowledge_irq() and armv7m_nvic_complete_irq() to handle banked exceptions: * acknowledge needs to use the correct vector, which may be in sec_vectors[] * acknowledge needs to return to its caller whether the exception should be taken to secure or non-secure state * complete needs its caller to tell it whether the exception being completed is a secure one or not Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-20-git-send-email-peter.maydell@linaro.org
2017-09-21nvic: Make SHCSR banked for v8MPeter Maydell
Handle banking of SHCSR: some register bits are banked between Secure and Non-Secure, and some are only accessible to Secure. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-19-git-send-email-peter.maydell@linaro.org
2017-09-21nvic: Make ICSR banked for v8MPeter Maydell
The ICSR NVIC register is banked for v8M. This doesn't require any new state, but it does mean that some bits are controlled by BFHNFNMINS and some bits must work with the correct banked exception. There is also a new in v8M PENDNMICLR bit. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-18-git-send-email-peter.maydell@linaro.org
2017-09-21target/arm: Handle banking in negative-execution-priority check in ↵Peter Maydell
cpu_mmu_index() Now that we have a banked FAULTMASK register and banked exceptions, we can implement the correct check in cpu_mmu_index() for whether the MPU_CTRL.HFNMIENA bit's effect should apply. This bit causes handlers which have requested a negative execution priority to run with the MPU disabled. In v8M the test has to check this for the current security state and so takes account of banking. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-17-git-send-email-peter.maydell@linaro.org
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