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2020-09-09hw/riscv: Move sifive_plic model to hw/intcBin Meng
2020-09-09hw/riscv: Move sifive_clint model to hw/intcBin Meng
2020-09-09hw/riscv: Move sifive_gpio model to hw/gpioBin Meng
2020-09-09hw/riscv: Move sifive_u_otp model to hw/miscBin Meng
2020-09-09hw/riscv: Move sifive_u_prci model to hw/miscBin Meng
2020-09-09hw/riscv: Move sifive_e_prci model to hw/miscBin Meng
2020-09-09hw/riscv: sifive_u: Connect a DMA controllerBin Meng
2020-09-09hw/riscv: clint: Avoid using hard-coded timebase frequencyBin Meng
2020-09-09hw/riscv: microchip_pfsoc: Hook GPIO controllersBin Meng
2020-09-09hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMsBin Meng
2020-09-09hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23Bin Meng
2020-09-09hw/net: cadence_gem: Add a new 'phy-addr' propertyBin Meng
2020-09-09hw/riscv: microchip_pfsoc: Connect a DMA controllerBin Meng
2020-09-09hw/dma: Add SiFive platform DMA controller emulationBin Meng
2020-09-09hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD cardBin Meng
2020-09-09hw/sd: Add Cadence SDHCI emulationBin Meng
2020-09-09hw/riscv: microchip_pfsoc: Connect 5 MMUARTsBin Meng
2020-09-09hw/char: Add Microchip PolarFire SoC MMUART emulationBin Meng
2020-09-09hw/riscv: Initial support for Microchip PolarFire SoC Icicle Kit boardBin Meng
2020-09-09target/riscv: cpu: Set reset vector based on the configured property valueBin Meng
2020-09-09hw/riscv: hart: Add a new 'resetvec' propertyBin Meng
2020-09-09riscv: sifive_test: Allow 16-bit writes to memory regionNathan Chancellor
2020-09-08Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-5.2-20200908' into...Peter Maydell
2020-09-08Merge remote-tracking branch 'remotes/rth/tags/pull-mb-20200907-2' into stagingPeter Maydell
2020-09-08Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...Peter Maydell
2020-09-08configure: do not include dependency flags in QEMU_CFLAGS and LIBSPaolo Bonzini
2020-09-08spapr_numa: use spapr_numa_get_vcpu_assoc() in home_node hcallDaniel Henrique Barboza
2020-09-08spapr_numa: create a vcpu associativity helperDaniel Henrique Barboza
2020-09-08spapr: move h_home_node_associativity to spapr_numa.cDaniel Henrique Barboza
2020-09-08spapr_numa: move NVLink2 associativity handling to spapr_numa.cDaniel Henrique Barboza
2020-09-08spapr, spapr_numa: move lookup-arrays handling to spapr_numa.cDaniel Henrique Barboza
2020-09-08spapr, spapr_numa: handle vcpu ibm,associativityDaniel Henrique Barboza
2020-09-08spapr: introduce SpaprMachineState::numa_assoc_arrayDaniel Henrique Barboza
2020-09-08ppc/spapr_nvdimm: turn spapr_dt_nvdimm() staticDaniel Henrique Barboza
2020-09-08ppc: introducing spapr_numa.c NUMA code helperDaniel Henrique Barboza
2020-09-08hw/ppc/ppc4xx_pci: Replace pointless warning by assert()Philippe Mathieu-Daudé
2020-09-08hw/ppc/ppc4xx_pci: Use ARRAY_SIZE() instead of magic valuePhilippe Mathieu-Daudé
2020-09-08sparc/sun4m: Use start-powered-off CPUState propertyThiago Jung Bauermann
2020-09-08sparc/sun4m: Don't set cs->halted = 0 in main_cpu_reset()Thiago Jung Bauermann
2020-09-08mips/cps: Use start-powered-off CPUState propertyThiago Jung Bauermann
2020-09-08ppc/e500: Use start-powered-off CPUState propertyThiago Jung Bauermann
2020-09-08ppc/spapr: Use start-powered-off CPUState propertyThiago Jung Bauermann
2020-09-08target/arm: Move setting of CPU halted state to generic codeThiago Jung Bauermann
2020-09-08ppc/spapr_nvdimm: do not enable support with 'nvdimm=off'Daniel Henrique Barboza
2020-09-08spapr, spapr_nvdimm: fold NVDIMM validation in the same placeDaniel Henrique Barboza
2020-09-08ppc/spapr_nvdimm: use g_autofree in spapr_nvdimm_validate_opts()Daniel Henrique Barboza
2020-09-08spapr/xive: Allocate vCPU IPIs from the vCPU contextsCédric Le Goater
2020-09-08spapr/xive: Allocate IPIs independently from the other sourcesCédric Le Goater
2020-09-08spapr/xive: Use kvmppc_xive_source_reset() in post_loadCédric Le Goater
2020-09-08spapr/xive: Modify kvm_cpu_is_enabled() interfaceCédric Le Goater
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