aboutsummaryrefslogtreecommitdiff
path: root/hw
AgeCommit message (Collapse)Author
2022-06-26pl050: switch over from update_irq() function to PS2 device gpioMark Cave-Ayland
Add a new pl050_init() function which initialises a qdev input gpio for handling incoming PS2 IRQs, and then wire up the PS2 device to use it. At the same time set update_irq() and update_arg to NULL in ps2_kbd_init() and ps2_mouse_init() to ensure that any accidental attempt to use the legacy update_irq() function will cause a NULL pointer dereference. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-37-mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2022-06-26pckbd: replace irq_kbd and irq_mouse with qemu_irq array in KBDStateMark Cave-Ayland
This allows both IRQs to be declared as a single qdev gpio array. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-36-mark.cave-ayland@ilande.co.uk>
2022-06-26ps2: add gpio for output IRQ and optionally use it in ps2_raise_irq() and ↵Mark Cave-Ayland
ps2_lower_irq() Define the gpio for the PS2 output IRQ in ps2_init() and add logic to optionally use it in ps2_raise_irq() and ps2_lower_irq() if the gpio is connected. If the gpio is not connected then call the legacy update_irq() function as before. This allows the incremental conversion of devices from the legacy update_irq() function to use gpios instead. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-35-mark.cave-ayland@ilande.co.uk>
2022-06-26ps2: introduce ps2_lower_irq() instead of calling update_irq() directlyMark Cave-Ayland
This consolidates the logic of lowering the PS2 IRQ into one single function. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-34-mark.cave-ayland@ilande.co.uk>
2022-06-26ps2: use ps2_raise_irq() instead of calling update_irq() directlyMark Cave-Ayland
This consolidates the logic of raising the PS2 IRQ into one single function. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-33-mark.cave-ayland@ilande.co.uk>
2022-06-26ps2: make ps2_raise_irq() function staticMark Cave-Ayland
This function is no longer used outside of ps2.c and so can be declared static. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-32-mark.cave-ayland@ilande.co.uk>
2022-06-26pckbd: move ps2_kbd_init() and ps2_mouse_init() to i8042_mmio_realize()Mark Cave-Ayland
Move ps2_kbd_init() and ps2_mouse_init() from i8042_mm_init() to i8042_mmio_realize() to further reduce the initialisation logic done in i8042_mm_init(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-31-mark.cave-ayland@ilande.co.uk>
2022-06-26pckbd: more vmstate_register() from i8042_mm_init() to i8042_mmio_realize()Mark Cave-Ayland
Note in this case it is not possible to register a (new) VMStateDescription in the DeviceClass without breaking migration compatibility for the MIPS magnum machine. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-30-mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2022-06-26pckbd: move mapping of I8042_MMIO registers to MIPS magnum machineMark Cave-Ayland
Now that the register memory region is exposed as a SysBus memory region, move the mapping of the I8042_MMIO registers from i8042_mm_init() to the MIPS magnum machine (which is its only user). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-29-mark.cave-ayland@ilande.co.uk>
2022-06-26pckbd: alter i8042_mm_init() to return a I8042_MMIO deviceMark Cave-Ayland
This exposes the I8042_MMIO device to the caller to allow the register memory region to be mapped outside of i8042_mm_init(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-28-mark.cave-ayland@ilande.co.uk>
2022-06-26pckbd: implement i8042_mmio_init() functionMark Cave-Ayland
This enables use to set the required value of extended_state directly during device init rather than in i8042_mm_init(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-27-mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2022-06-26pckbd: implement i8042_mmio_realize() functionMark Cave-Ayland
Move the initialisation of the register memory region to the I8042_MMIO device realize function and expose it using sysbus_init_mmio(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-26-mark.cave-ayland@ilande.co.uk>
2022-06-26pckbd: add size qdev property to I8042_MMIO deviceMark Cave-Ayland
This will soon be used to set the size of the register memory region using a qdev property. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-25-mark.cave-ayland@ilande.co.uk>
2022-06-26pckbd: add mask qdev property to I8042_MMIO deviceMark Cave-Ayland
This allows the KBDState mask value to be set using a qdev property rather than directly in i8042_mm_init(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-24-mark.cave-ayland@ilande.co.uk>
2022-06-26pckbd: implement i8042_mmio_reset() for I8042_MMIO deviceMark Cave-Ayland
This allows the I8042_MMIO reset function to be registered directly within the DeviceClass rather than using qemu_register_reset() directly. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-23-mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2022-06-26pckbd: introduce new I8042_MMIO QOM typeMark Cave-Ayland
Currently i8042_mm_init() creates a new KBDState directly which is used by the MIPS magnum machine. Introduce a new I8042_MMIO QOM type that will soon be used to allow the MIPS magnum machine to be wired up using standard qdev GPIOs. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220624134109.881989-22-mark.cave-ayland@ilande.co.uk>
2022-06-26pckbd: move ISAKBDState from pckbd.c to i8042.hMark Cave-Ayland
This allows the QOM types in pckbd.c to be used elsewhere by simply including i8042.h. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-21-mark.cave-ayland@ilande.co.uk>
2022-06-26pckbd: move KBDState from pckbd.c to i8042.hMark Cave-Ayland
This allows the QOM types in pckbd.c to be used elsewhere by simply including i8042.h. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-20-mark.cave-ayland@ilande.co.uk>
2022-06-26pckbd: checkpatch fixesMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-19-mark.cave-ayland@ilande.co.uk>
2022-06-26lasips2: rename ps2dev_update_irq() to lasips2_port_set_irq()Mark Cave-Ayland
This better reflects that the IRQ input opaque is a LASIPS2Port structure and not a PS2_DEVICE. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-18-mark.cave-ayland@ilande.co.uk>
2022-06-26lasips2: spacing fixesMark Cave-Ayland
This helps improve the readability of lasips2.c. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-17-mark.cave-ayland@ilande.co.uk>
2022-06-26pl050: split pl050_update_irq() into separate pl050_set_irq() and ↵Mark Cave-Ayland
pl050_update_irq() functions This will soon allow pl050_set_irq() to be used as a GPIO input function. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-16-mark.cave-ayland@ilande.co.uk>
2022-06-26pl050: checkpatch fixesMark Cave-Ayland
This patch also includes a couple of minor spacing updates. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-15-mark.cave-ayland@ilande.co.uk>
2022-06-26ps2: don't use vmstate_register() in ps2_mouse_init()Mark Cave-Ayland
Since PS2_MOUSE_DEVICE is a qdev device then vmstate_ps2_mouse can be registered using the DeviceClass vmsd field instead. There is no need to use qdev_set_legacy_instance_id() to ensure migration compatibility since the first 2 parameters to vmstate_register() are NULL and 0 respectively. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-14-mark.cave-ayland@ilande.co.uk>
2022-06-26ps2: don't use vmstate_register() in ps2_kbd_init()Mark Cave-Ayland
Since PS2_KBD_DEVICE is a qdev device then vmstate_ps2_keyboard can be registered using the DeviceClass vmsd field instead. There is no need to use qdev_set_legacy_instance_id() to ensure migration compatibility since the first 2 parameters to vmstate_register() are NULL and 0 respectively. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-13-mark.cave-ayland@ilande.co.uk>
2022-06-26ps2: implement ps2_mouse_realize() and use it to register ps2_mouse_handlerMark Cave-Ayland
Move the registration of ps2_mouse_handler from ps2_mouse_init() to a new ps2_mouse_realize() function. Since the abstract PS2_DEVICE parent class doesn't have a realize() function then it is not necessary to store the reference to it in PS2DeviceClass and use device_class_set_parent_realize(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-12-mark.cave-ayland@ilande.co.uk>
2022-06-26ps2: implement ps2_kbd_realize() and use it to register ps2_keyboard_handlerMark Cave-Ayland
Move the registration of ps2_keyboard_handler from ps2_kbd_init() to a new ps2_kbd_realize() function. Since the abstract PS2_DEVICE parent class doesn't have a realize() function then it is not necessary to store the reference to it in PS2DeviceClass and use device_class_set_parent_realize(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-11-mark.cave-ayland@ilande.co.uk>
2022-06-26ps2: remove duplicate setting of scancode_set in ps2_kbd_init()Mark Cave-Ayland
The default value for scancode_set is already set in ps2_kbd_reset() so there is no need to duplicate this in ps2_kbd_init(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-10-mark.cave-ayland@ilande.co.uk>
2022-06-26ps2: implement ps2_reset() for the PS2_DEVICE QOM type based upon ↵Mark Cave-Ayland
ps2_common_reset() The functionality of ps2_common_reset() can be moved into a new ps2_reset() function for the PS2_DEVICE QOM type. Update PS2DeviceClass to hold a reference to the parent reset function and update the PS2_KBD_DEVICE and PS2_MOUSE_DEVICE types to use device_class_set_parent_reset() accordingly. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-9-mark.cave-ayland@ilande.co.uk>
2022-06-26ps2: introduce PS2DeviceClassMark Cave-Ayland
This is in preparation for allowing the new PS2_KBD_DEVICE and PS2_MOUSE_DEVICE QOM types to reference the parent PS2_DEVICE device reset() function. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-8-mark.cave-ayland@ilande.co.uk>
2022-06-26ps2: improve function prototypes in ps2.c and ps2.hMark Cave-Ayland
With the latest changes it is now possible to improve some of the function prototypes in ps2.c and ps.h to use the appropriate PS2KbdState or PS2MouseState type instead of being a void opaque. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-7-mark.cave-ayland@ilande.co.uk>
2022-06-26ps2: move QOM type definitions from ps2.c to ps2.hMark Cave-Ayland
Move the QOM type definitions into the ps2.h header file to allow the new QOM types to be used by other devices. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-6-mark.cave-ayland@ilande.co.uk>
2022-06-26ps2: QOMify PS2MouseStateMark Cave-Ayland
Make PS2MouseState into a new PS2_MOUSE_DEVICE QOM type which inherits from the abstract PS2_DEVICE type. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-5-mark.cave-ayland@ilande.co.uk>
2022-06-26ps2: QOMify PS2KbdStateMark Cave-Ayland
Make PS2KbdState into a new PS2_KBD_DEVICE QOM type which inherits from the abstract PS2_DEVICE type. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-4-mark.cave-ayland@ilande.co.uk>
2022-06-26ps2: QOMify PS2StateMark Cave-Ayland
Make PS2State a new abstract PS2_DEVICE QOM type to represent the common functionality shared between PS2 keyboard and mouse devices. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-3-mark.cave-ayland@ilande.co.uk>
2022-06-26ps2: checkpatch fixesMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Helge Deller <deller@gmx.de> Message-Id: <20220624134109.881989-2-mark.cave-ayland@ilande.co.uk>
2022-06-24block: get rid of blk->guest_block_sizeStefan Hajnoczi
Commit 1b7fd729559c ("block: rename buffer_alignment to guest_block_size") noted: At this point, the field is set by the device emulation, but completely ignored by the block layer. The last time the value of buffer_alignment/guest_block_size was actually used was before commit 339064d50639 ("block: Don't use guest sector size for qemu_blockalign()"). This value has not been used since 2013. Get rid of it. Cc: Xie Yongji <xieyongji@bytedance.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20220518130945.2657905-1-stefanha@redhat.com> Reviewed-by: Paul Durrant <paul@xen.org> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Alberto Faria <afaria@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-06-23hw/nvme: clear aen mask on resetKlaus Jensen
The internally maintained AEN mask is not cleared on reset. Fix this. Reviewed-by: Keith Busch <kbusch@kernel.org> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2022-06-23Revert "hw/block/nvme: add support for sgl bit bucket descriptor"Klaus Jensen
This reverts commit d97eee64fef35655bd06f5c44a07fdb83a6274ae. The emulated controller correctly accounts for not including bit buckets in the controller-to-host data transfer, however it doesn't correctly account for the holes for the on-disk data offsets. Reported-by: Keith Busch <kbusch@kernel.org> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2022-06-23hw/nvme: clean up CC register write logicKlaus Jensen
The SRIOV series exposed an issued with how CC register writes are handled and how CSTS is set in response to that. Specifically, after applying the SRIOV series, the controller could end up in a state with CC.EN set to '1' but with CSTS.RDY cleared to '0', causing drivers to expect CSTS.RDY to transition to '1' but timing out. Clean this up. Reviewed-by: Łukasz Gieryk <lukasz.gieryk@linux.intel.com> Reviewed-by: Lukasz Maniak <lukasz.maniak@linux.intel.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2022-06-23hw/acpi: Make the PCI hot-plug aware of SR-IOVŁukasz Gieryk
PCI device capable of SR-IOV support is a new, still-experimental feature with only a single working example of the Nvme device. This patch in an attempt to fix a double-free problem when a SR-IOV-capable Nvme device is hot-unplugged in the following scenario: Qemu CLI: --------- -device pcie-root-port,slot=0,id=rp0 -device nvme-subsys,id=subsys0 -device nvme,id=nvme0,bus=rp0,serial=deadbeef,subsys=subsys0,sriov_max_vfs=1,sriov_vq_flexible=2,sriov_vi_flexible=1 Guest OS: --------- sudo nvme virt-mgmt /dev/nvme0 -c 0 -r 1 -a 1 -n 0 sudo nvme virt-mgmt /dev/nvme0 -c 0 -r 0 -a 1 -n 0 echo 1 > /sys/bus/pci/devices/0000:01:00.0/reset sleep 1 echo 1 > /sys/bus/pci/devices/0000:01:00.0/sriov_numvfs nvme virt-mgmt /dev/nvme0 -c 1 -r 1 -a 8 -n 1 nvme virt-mgmt /dev/nvme0 -c 1 -r 0 -a 8 -n 2 nvme virt-mgmt /dev/nvme0 -c 1 -r 0 -a 9 -n 0 sleep 2 echo 01:00.1 > /sys/bus/pci/drivers/nvme/bind Qemu monitor: ------------- device_del nvme0 Explanation of the problem and the proposed solution: 1) The current SR-IOV implementation assumes it’s the PhysicalFunction that creates and deletes VirtualFunctions. 2) It’s a design decision (the Nvme device at least) for the VFs to be of the same class as PF. Effectively, they share the dc->hotpluggable value. 3) When a VF is created, it’s added as a child node to PF’s PCI bus slot. 4) Monitor/device_del triggers the ACPI mechanism. The implementation is not aware of SR/IOV and ejects PF’s PCI slot, directly unrealizing all hot-pluggable (!acpi_pcihp_pc_no_hotplug) children nodes. 5) VFs are unrealized directly, and it doesn’t work well with (1). SR/IOV structures are not updated, so when it’s PF’s turn to be unrealized, it works on stale pointers to already-deleted VFs. The proposed fix is to make the PCI ACPI code aware of SR/IOV. Signed-off-by: Łukasz Gieryk <lukasz.gieryk@linux.intel.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2022-06-23hw/nvme: Update the initalization place for the AER queueŁukasz Gieryk
This patch updates the initialization place for the AER queue, so it’s initialized once, at controller initialization, and not every time controller is enabled. While the original version works for a non-SR-IOV device, as it’s hard to interact with the controller if it’s not enabled, the multiple reinitialization is not necessarily correct. With the SR/IOV feature enabled a segfault can happen: a VF can have its controller disabled, while a namespace can still be attached to the controller through the parent PF. An event generated in such case ends up on an uninitialized queue. While it’s an interesting question whether a VF should support AER in the first place, I don’t think it must be answered today. Signed-off-by: Łukasz Gieryk <lukasz.gieryk@linux.intel.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2022-06-23hw/nvme: Add support for the Virtualization Management commandŁukasz Gieryk
With the new command one can: - assign flexible resources (queues, interrupts) to primary and secondary controllers, - toggle the online/offline state of given controller. Signed-off-by: Łukasz Gieryk <lukasz.gieryk@linux.intel.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2022-06-23hw/nvme: Initialize capability structures for primary/secondary controllersŁukasz Gieryk
With four new properties: - sriov_v{i,q}_flexible, - sriov_max_v{i,q}_per_vf, one can configure the number of available flexible resources, as well as the limits. The primary and secondary controller capability structures are initialized accordingly. Since the number of available queues (interrupts) now varies between VF/PF, BAR size calculation is also adjusted. Signed-off-by: Łukasz Gieryk <lukasz.gieryk@linux.intel.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2022-06-23hw/nvme: Calculate BAR attributes in a functionŁukasz Gieryk
An NVMe device with SR-IOV capability calculates the BAR size differently for PF and VF, so it makes sense to extract the common code to a separate function. Signed-off-by: Łukasz Gieryk <lukasz.gieryk@linux.intel.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2022-06-23hw/nvme: Remove reg_size variable and update BAR0 size calculationŁukasz Gieryk
The n->reg_size parameter unnecessarily splits the BAR0 size calculation in two phases; removed to simplify the code. With all the calculations done in one place, it seems the pow2ceil, applied originally to reg_size, is unnecessary. The rounding should happen as the last step, when BAR size includes Nvme registers, queue registers, and MSIX-related space. Finally, the size of the mmio memory region is extended to cover the 1st 4KiB padding (see the map below). Access to this range is handled as interaction with a non-existing queue and generates an error trace, so actually nothing changes, while the reg_size variable is no longer needed. -------------------- | BAR0 | -------------------- [Nvme Registers ] [Queues ] [power-of-2 padding] - removed in this patch [4KiB padding (1) ] [MSIX TABLE ] [4KiB padding (2) ] [MSIX PBA ] [power-of-2 padding] Signed-off-by: Łukasz Gieryk <lukasz.gieryk@linux.intel.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2022-06-23hw/nvme: Make max_ioqpairs and msix_qsize configurable in runtimeŁukasz Gieryk
The NVMe device defines two properties: max_ioqpairs, msix_qsize. Having them as constants is problematic for SR-IOV support. SR-IOV introduces virtual resources (queues, interrupts) that can be assigned to PF and its dependent VFs. Each device, following a reset, should work with the configured number of queues. A single constant is no longer sufficient to hold the whole state. This patch tries to solve the problem by introducing additional variables in NvmeCtrl’s state. The variables for, e.g., managing queues are therefore organized as: - n->params.max_ioqpairs – no changes, constant set by the user - n->(mutable_state) – (not a part of this patch) user-configurable, specifies number of queues available _after_ reset - n->conf_ioqpairs - (new) used in all the places instead of the ‘old’ n->params.max_ioqpairs; initialized in realize() and updated during reset() to reflect user’s changes to the mutable state Since the number of available i/o queues and interrupts can change in runtime, buffers for sq/cqs and the MSIX-related structures are allocated big enough to handle the limits, to completely avoid the complicated reallocation. A helper function (nvme_update_msixcap_ts) updates the corresponding capability register, to signal configuration changes. Signed-off-by: Łukasz Gieryk <lukasz.gieryk@linux.intel.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2022-06-23hw/nvme: Implement the Function Level ResetŁukasz Gieryk
This patch implements the Function Level Reset, a feature currently not implemented for the Nvme device, while listed as a mandatory ("shall") in the 1.4 spec. The implementation reuses FLR-related building blocks defined for the pci-bridge module, and follows the same logic: - FLR capability is advertised in the PCIE config, - custom pci_write_config callback detects a write to the trigger register and performs the PCI reset, - which, eventually, calls the custom dc->reset handler. Depending on reset type, parts of the state should (or should not) be cleared. To distinguish the type of reset, an additional parameter is passed to the reset function. This patch also enables advertisement of the Power Management PCI capability. The main reason behind it is to announce the no_soft_reset=1 bit, to signal SR-IOV support where each VF can be reset individually. The implementation purposedly ignores writes to the PMCS.PS register, as even such naïve behavior is enough to correctly handle the D3->D0 transition. It’s worth to note, that the power state transition back to to D3, with all the corresponding side effects, wasn't and stil isn't handled properly. Signed-off-by: Łukasz Gieryk <lukasz.gieryk@linux.intel.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2022-06-23hw/nvme: Add support for Secondary Controller ListLukasz Maniak
Introduce handling for Secondary Controller List (Identify command with CNS value of 15h). Secondary controller ids are unique in the subsystem, hence they are reserved by it upon initialization of the primary controller to the number of sriov_max_vfs. ID reservation requires the addition of an intermediate controller slot state, so the reserved controller has the address 0xFFFF. A secondary controller is in the reserved state when it has no virtual function assigned, but its primary controller is realized. Secondary controller reservations are released to NULL when its primary controller is unregistered. Signed-off-by: Lukasz Maniak <lukasz.maniak@linux.intel.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2022-06-23hw/nvme: Add support for Primary Controller CapabilitiesLukasz Maniak
Implementation of Primary Controller Capabilities data structure (Identify command with CNS value of 14h). Currently, the command returns only ID of a primary controller. Handling of remaining fields are added in subsequent patches implementing virtualization enhancements. Signed-off-by: Lukasz Maniak <lukasz.maniak@linux.intel.com> Reviewed-by: Klaus Jensen <k.jensen@samsung.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
generated by cgit v1.2.3 (git 2.26.2) at 2025-03-17 11:43:10 +0000