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2022-07-14aspeed: Add AST2600 (BMC) to fby35Peter Delevoryas
You can test booting the BMC with both '-device loader' and '-drive file'. This is necessary because of how the fb-openbmc boot sequence works (jump to 0x20000000 after U-Boot SPL). wget https://github.com/facebook/openbmc/releases/download/openbmc-e2294ff5d31d/fby35.mtd qemu-system-arm -machine fby35 -nographic \ -device loader,file=fby35.mtd,addr=0,cpu-num=0 -drive file=fby35.mtd,format=raw,if=mtd Signed-off-by: Peter Delevoryas <peter@pjd.dev> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220705191400.41632-7-peter@pjd.dev> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-07-14aspeed: Add fby35 skeletonPeter Delevoryas
Signed-off-by: Peter Delevoryas <peter@pjd.dev> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220705191400.41632-6-peter@pjd.dev> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-07-14aspeed: Make aspeed_board_init_flashes publicPeter Delevoryas
Signed-off-by: Peter Delevoryas <peter@pjd.dev> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220705191400.41632-5-peter@pjd.dev> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-07-14aspeed: Refactor UART init for multi-SoC machinesPeter Delevoryas
This change moves the code that connects the SoC UART's to serial_hd's to the machine. It makes each UART a proper child member of the SoC, and then allows the machine to selectively initialize the chardev for each UART with a serial_hd. This should preserve backwards compatibility, but also allow multi-SoC boards to completely change the wiring of serial devices from the command line to specific SoC UART's. This also removes the uart-default property from the SoC, since the SoC doesn't need to know what UART is the "default" on the machine anymore. I tested this using the images and commands from the previous refactoring, and another test image for the ast1030: wget https://github.com/facebook/openbmc/releases/download/v2021.49.0/fuji.mtd wget https://github.com/facebook/openbmc/releases/download/v2021.49.0/wedge100.mtd wget https://github.com/peterdelevoryas/OpenBIC/releases/download/oby35-cl-2022.13.01/Y35BCL.elf Fuji uses UART1: qemu-system-arm -machine fuji-bmc \ -drive file=fuji.mtd,format=raw,if=mtd \ -nographic ast2600-evb uses uart-default=UART5: qemu-system-arm -machine ast2600-evb \ -drive file=fuji.mtd,format=raw,if=mtd \ -serial null -serial mon:stdio -display none Wedge100 uses UART3: qemu-system-arm -machine palmetto-bmc \ -drive file=wedge100.mtd,format=raw,if=mtd \ -serial null -serial null -serial null \ -serial mon:stdio -display none AST1030 EVB uses UART5: qemu-system-arm -machine ast1030-evb \ -kernel Y35BCL.elf -nographic Fixes: 6827ff20b2975 ("hw: aspeed: Init all UART's with serial devices") Signed-off-by: Peter Delevoryas <peter@pjd.dev> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220705191400.41632-4-peter@pjd.dev> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-07-14aspeed: Create SRAM name from first CPU indexPeter Delevoryas
To support multiple SoC's running simultaneously, we need a unique name for each RAM region. DRAM is created by the machine, but SRAM is created by the SoC, since in hardware it is part of the SoC's internals. We need a way to uniquely identify each SRAM region though, for VM migration. Since each of the SoC's CPU's has an index which identifies it uniquely from other CPU's in the machine, we can use the index of any of the CPU's in the SoC to uniquely identify differentiate the SRAM name from other SoC SRAM's. In this change, I just elected to use the index of the first CPU in each SoC. Signed-off-by: Peter Delevoryas <peter@pjd.dev> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220705191400.41632-3-peter@pjd.dev> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-07-14hw/sensor: Add Renesas ISL69259 device modelPeter Delevoryas
This adds the ISL69259, using all the same functionality as the existing ISL69260 but overriding the IC_DEVICE_ID. Signed-off-by: Peter Delevoryas <pdel@fb.com> Reviewed-by: Titus Rwantare <titusr@google.com> Message-Id: <20220701000626.77395-4-me@pjd.dev> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-07-14hw/sensor: Add IC_DEVICE_ID to ISL voltage regulatorsPeter Delevoryas
This commit adds a passthrough for PMBUS_IC_DEVICE_ID to allow Renesas voltage regulators to return the integrated circuit device ID if they would like to. The behavior is very device specific, so it hasn't been added to the general PMBUS model. Additionally, if the device ID hasn't been set, then the voltage regulator will respond with the error byte value. The guest error message will change slightly for IC_DEVICE_ID with this commit. Signed-off-by: Peter Delevoryas <pdel@fb.com> Reviewed-by: Titus Rwantare <titusr@google.com> Message-Id: <20220701000626.77395-3-me@pjd.dev> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-07-14hw/i2c/pmbus: Add idle state to return 0xff'sPeter Delevoryas
Signed-off-by: Peter Delevoryas <pdel@fb.com> Reviewed-by: Titus Rwantare <titusr@google.com> Message-Id: <20220701000626.77395-2-me@pjd.dev> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-07-14aspeed: sbc: Allow per-machine settingsJoel Stanley
In order to correctly report secure boot running firmware the values of certain registers must be set. We don't yet have documentation from ASPEED on what they mean. The meaning is inferred from u-boot's use of them. Introduce properties so the settings can be configured per-machine. Reviewed-by: Peter Delevoryas <pdel@fb.com> Tested-by: Peter Delevoryas <pdel@fb.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Message-Id: <20220628154740.1117349-4-clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-07-13q800: add default vendor and product information for scsi-cd devicesMark Cave-Ayland
The MacOS CDROM driver uses a SCSI INQUIRY command to check that any SCSI CDROMs detected match a whitelist of vendors and products before adding them to the list of available devices. Add known-good default vendor and product information using the existing compat_prop mechanism so the user doesn't have to use long command lines to set the qdev properties manually. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220622105314.802852-15-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-07-13q800: add default vendor and product information for scsi-hd devicesMark Cave-Ayland
The Apple HD SC Setup program uses a SCSI INQUIRY command to check that any SCSI hard disks detected match a whitelist of vendors and products before allowing the "Initialise" button to prepare an empty disk. Add known-good default vendor and product information using the existing compat_prop mechanism so the user doesn't have to use long command lines to set the qdev properties manually. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220622105314.802852-14-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-07-13scsi-disk: allow MODE SELECT block descriptor to set the block sizeMark Cave-Ayland
The MODE SELECT command can contain an optional block descriptor that can be used to set the device block size. If the block descriptor is present then update the block size on the SCSI device accordingly. This allows CDROMs to be used with A/UX which requires a CDROM drive which is capable of switching from a 2048 byte sector size to a 512 byte sector size. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20220622105314.802852-13-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-07-13scsi-disk: allow the MODE_PAGE_R_W_ERROR AWRE bit to be changeable for CDROM ↵Mark Cave-Ayland
drives A/UX sends a MODE_PAGE_R_W_ERROR command with the AWRE bit set to 0 when enumerating CDROM drives. Since the bit is currently hardcoded to 1 then indicate that the AWRE bit can be changed (even though we don't care about the value) so that the MODE_PAGE_R_W_ERROR page can be set successfully. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20220622105314.802852-12-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-07-13q800: implement compat_props to enable quirk_mode_page_truncated for scsi-cd ↵Mark Cave-Ayland
devices By default quirk_mode_page_truncated should be enabled for all scsi-cd devices connected to the q800 machine to allow A/UX to enumerate SCSI CDROM devices without hanging. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20220622105314.802852-11-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-07-13scsi-disk: add SCSI_DISK_QUIRK_MODE_PAGE_TRUNCATED quirk for MacintoshMark Cave-Ayland
When A/UX configures the CDROM device it sends a truncated MODE SELECT request for page 1 (MODE_PAGE_R_W_ERROR) which is only 6 bytes in length rather than 10. This seems to be due to bug in Apple's code which calculates the CDB message length incorrectly. The work at [1] suggests that this truncated request is accepted on real hardware whereas in QEMU it generates an INVALID_PARAM_LEN sense code which causes A/UX to get stuck in a loop retrying the command in an attempt to succeed. Alter the mode page request length check so that truncated requests are allowed if the SCSI_DISK_QUIRK_MODE_PAGE_TRUNCATED quirk is enabled, whilst also adding a trace event to enable the condition to be detected. [1] https://68kmla.org/bb/index.php?threads/scsi2sd-project-anyone-interested.29040/page-7#post-316444 Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20220622105314.802852-10-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-07-13scsi-disk: add FORMAT UNIT commandMark Cave-Ayland
When initialising a drive ready to install MacOS, Apple HD SC Setup first attempts to format the drive. Add a simple FORMAT UNIT command which simply returns success to allow the format to succeed. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220622105314.802852-9-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-07-13q800: implement compat_props to enable quirk_mode_page_vendor_specific_apple ↵Mark Cave-Ayland
for scsi devices By default quirk_mode_page_vendor_specific_apple should be enabled for both scsi-hd and scsi-cd devices to allow MacOS to format SCSI disk devices, and A/UX to enumerate SCSI CDROM devices succesfully without getting stuck in a loop. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20220622105314.802852-8-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-07-13scsi-disk: add SCSI_DISK_QUIRK_MODE_PAGE_VENDOR_SPECIFIC_APPLE quirk for ↵Mark Cave-Ayland
Macintosh Both MacOS and A/UX make use of vendor-specific MODE SELECT commands with PF=0 to identify SCSI devices: - MacOS sends a MODE SELECT command with PF=0 for the MODE_PAGE_VENDOR_SPECIFIC (0x0) mode page containing 2 bytes before initialising a disk - A/UX (installed on disk) sends a MODE SELECT command with PF=0 during SCSI bus enumeration, and gets stuck in an infinite loop if it fails Add a new SCSI_DISK_QUIRK_MODE_PAGE_VENDOR_SPECIFIC_APPLE quirk to allow both PF=0 MODE SELECT commands and implement a MODE_PAGE_VENDOR_SPECIFIC (0x0) mode page which is compatible with MacOS. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20220622105314.802852-7-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-07-13q800: implement compat_props to enable quirk_mode_sense_rom_use_dbd for ↵Mark Cave-Ayland
scsi-cd devices By default quirk_mode_sense_rom_use_dbd should be enabled for all scsi-cd devices connected to the q800 machine to correctly report the CDROM block descriptor back to A/UX. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220622105314.802852-6-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-07-13scsi-disk: add SCSI_DISK_QUIRK_MODE_SENSE_ROM_USE_DBD quirk for MacintoshMark Cave-Ayland
During SCSI bus enumeration A/UX sends a MODE SENSE command to the CDROM with the DBD bit unset and expects the response to include a block descriptor. As per the latest SCSI documentation, QEMU currently force-disables the block descriptor for CDROM devices but the A/UX driver expects the requested block descriptor to be returned. If the block descriptor is not returned in the response then A/UX becomes confused, since the block descriptor returned in the MODE SENSE response is used to generate a subsequent MODE SELECT command which is then invalid. Add a new SCSI_DISK_QUIRK_MODE_SENSE_ROM_USE_DBD quirk to allow this behaviour to be enabled as required. Note that an additional workaround is required for the previous SCSI_DISK_QUIRK_MODE_PAGE_APPLE_VENDOR quirk which must never return a block descriptor even though the DBD bit is left unset. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20220622105314.802852-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-07-13q800: implement compat_props to enable quirk_mode_page_apple_vendor for ↵Mark Cave-Ayland
scsi-cd devices By default quirk_mode_page_apple_vendor should be enabled for all scsi-cd devices connected to the q800 machine to enable MacOS to detect and use them. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20220622105314.802852-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-07-13scsi-disk: add MODE_PAGE_APPLE_VENDOR quirk for MacintoshMark Cave-Ayland
One of the mechanisms MacOS uses to identify CDROM drives compatible with MacOS is to send a custom MODE SELECT command for page 0x30 to the drive. The response to this is a hard-coded manufacturer string which must match in order for the CDROM to be usable within MacOS. Add an implementation of the MODE SELECT page 0x30 response guarded by a newly defined SCSI_DISK_QUIRK_MODE_PAGE_APPLE_VENDOR quirk bit so that CDROM drives attached to non-Apple machines function exactly as before. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220622105314.802852-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-07-13scsi-disk: add new quirks bitmap to SCSIDiskStateMark Cave-Ayland
Since the MacOS SCSI implementation is quite old (and Apple added some firmware customisations to their drives for m68k Macs) there is need to add a mechanism to correctly handle Apple-specific quirks. Add a new quirks bitmap to SCSIDiskState that can be used to enable these features as required. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220622105314.802852-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-07-13scsi/lsi53c895a: really fix use-after-free in lsi_do_msgout (CVE-2022-0216)Mauro Matteo Cascella
Set current_req to NULL, not current_req->req, to prevent reusing a free'd buffer in case of repeated SCSI cancel requests. Also apply the fix to CLEAR QUEUE and BUS DEVICE RESET messages as well, since they also cancel the request. Thanks to Alexander Bulekov for providing a reproducer. Fixes: CVE-2022-0216 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/972 Signed-off-by: Mauro Matteo Cascella <mcascell@redhat.com> Tested-by: Alexander Bulekov <alxndr@bu.edu> Message-Id: <20220711123316.421279-1-mcascell@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-07-12Merge tag 'pull-block-2022-07-12' of https://gitlab.com/hreitz/qemu into stagingPeter Maydell
Block patches: - Refactoring for non-coroutine variants of bdrv/blk_co_* functions: Auto-generate more of them with the block coroutine wrapper generator script - iotest fixes - Both for the storage daemon and the system emulator: Fix PID file handling when daemonizing (store the absolute path and delete that on exit, which is necessary because daemonizing will change the working directory to /) # gpg: Signature made Tue 12 Jul 2022 19:04:14 BST # gpg: using RSA key CB62D7A0EE3829E45F004D34A1FA40D098019CDF # gpg: issuer "hreitz@redhat.com" # gpg: Good signature from "Hanna Reitz <hreitz@redhat.com>" [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: CB62 D7A0 EE38 29E4 5F00 4D34 A1FA 40D0 9801 9CDF * tag 'pull-block-2022-07-12' of https://gitlab.com/hreitz/qemu: (35 commits) vl: Unlink absolute PID file path vl: Conditionally register PID file unlink notifier qsd: Unlink absolute PID file path iotests/297: Have mypy ignore unused ignores qsd: Do not use error_report() before monitor_init block: Remove remaining unused symbols in coroutines.h block: Reorganize some declarations in block-backend-io.h block: Add blk_co_truncate() block: Add blk_co_ioctl() block: Implement blk_flush() using generated_co_wrapper block: Implement blk_pdiscard() using generated_co_wrapper block: Implement blk_pwrite_zeroes() using generated_co_wrapper block: Add blk_co_pwrite_compressed() block: Change blk_pwrite_compressed() param order block: Export blk_pwritev_part() in block-backend-io.h block: Add blk_[co_]preadv_part() block: Add blk_{preadv,pwritev}() block: Implement blk_{pread,pwrite}() using generated_co_wrapper block: Make blk_co_pwrite() take a const buffer block: Make 'bytes' param of blk_{pread,pwrite}() an int64_t ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-07-12Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingPeter Maydell
* fuzzing fixes (Alexander) * fix cross compilation CFLAGS and compiler choice * do not specify -bios option for tests/vm * miscellaneous fixes * preparation for pre-install tree in the build directory (Akihiko) # gpg: Signature made Tue 12 Jul 2022 13:47:19 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: meson: place default firmware path under .../share qga: Relocate a path emitted in the help text build: Do not depend on pc-bios for config-host.mak accel: kvm: Fix memory leak in find_stats_descriptors audio/dbus: fix building fuzz: only use generic-fuzz targets on oss-fuzz build: improve -fsanitize-coverage-allowlist check build: try both native and cross compilers configure: pass whole target name to probe_target_compiler tests/tcg: compile system emulation tests as freestanding configure: write EXTRA_CFLAGS for all sub-Makefiles configure: allow more host/target combos to use the host compiler configure, pc-bios/vof: pass cross CFLAGS correctly configure, pc-bios/s390-ccw: pass cross CFLAGS correctly configure, pc-bios/optionrom: pass cross CFLAGS correctly pc-bios/optionrom: use -m16 unconditionally scsi/lsi53c895a: fix use-after-free in lsi_do_msgout (CVE-2022-0216) tests/vm: do not specify -bios option Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # pc-bios/s390-ccw/netboot.mak
2022-07-12block: Change blk_{pread,pwrite}() param orderAlberto Faria
Swap 'buf' and 'bytes' around for consistency with blk_co_{pread,pwrite}(), and in preparation to implement these functions using generated_co_wrapper. Callers were updated using this Coccinelle script: @@ expression blk, offset, buf, bytes, flags; @@ - blk_pread(blk, offset, buf, bytes, flags) + blk_pread(blk, offset, bytes, buf, flags) @@ expression blk, offset, buf, bytes, flags; @@ - blk_pwrite(blk, offset, buf, bytes, flags) + blk_pwrite(blk, offset, bytes, buf, flags) It had no effect on hw/block/nand.c, presumably due to the #if, so that file was updated manually. Overly-long lines were then fixed by hand. Signed-off-by: Alberto Faria <afaria@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Hanna Reitz <hreitz@redhat.com> Message-Id: <20220705161527.1054072-4-afaria@redhat.com> Signed-off-by: Hanna Reitz <hreitz@redhat.com>
2022-07-12block: Add a 'flags' param to blk_pread()Alberto Faria
For consistency with other I/O functions, and in preparation to implement it using generated_co_wrapper. Callers were updated using this Coccinelle script: @@ expression blk, offset, buf, bytes; @@ - blk_pread(blk, offset, buf, bytes) + blk_pread(blk, offset, buf, bytes, 0) It had no effect on hw/block/nand.c, presumably due to the #if, so that file was updated manually. Overly-long lines were then fixed by hand. Signed-off-by: Alberto Faria <afaria@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Hanna Reitz <hreitz@redhat.com> Message-Id: <20220705161527.1054072-3-afaria@redhat.com> Signed-off-by: Hanna Reitz <hreitz@redhat.com>
2022-07-12block: Make blk_{pread,pwrite}() return 0 on successAlberto Faria
They currently return the value of their 'bytes' parameter on success. Make them return 0 instead, for consistency with other I/O functions and in preparation to implement them using generated_co_wrapper. This also makes it clear that short reads/writes are not possible. Signed-off-by: Alberto Faria <afaria@redhat.com> Message-Id: <20220705161527.1054072-2-afaria@redhat.com> Reviewed-by: Hanna Reitz <hreitz@redhat.com> Signed-off-by: Hanna Reitz <hreitz@redhat.com>
2022-07-07hw/arm/virt: dt: add rng-seed propertyJason A. Donenfeld
In 60592cfed2 ("hw/arm/virt: dt: add kaslr-seed property"), the kaslr-seed property was added, but the equally as important rng-seed property was forgotten about, which has identical semantics for a similar purpose. This commit implements it in exactly the same way as kaslr-seed. It then changes the name of the disabling option to reflect that this has more to do with randomness vs determinism, rather than something particular about kaslr. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> [PMM: added deprecated.rst section for the deprecation] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-07-07Merge tag 'pull-ppc-20220706' of https://gitlab.com/danielhb/qemu into stagingRichard Henderson
ppc patch queue for 2022-07-06: This queue consists of improvements and bug fixes in TCG, powernv and pSeries, with some fixes in other areas as well. - tcg and target/ppc: BCDA and mffscdrn implementations, Remove CONFIG_INT128 conditional code - fix '-cpu max' alias - remove '-cpu default' alias - spapr: fixes in DDW handling, H_WATCHDOG support - powernv: cleanups in the pnv-phb3/4 models - fix core type of MPC8555 and MPC8560 models # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCYsXrpgAKCRA82cqW3gMx # ZBe9AP4oqMTFw7r9EQPJU4QFMUeAVABl4o0xNb2wLyYov9CtKAD+LoVERSmtLTJ1 # kFpgBrRTWKVylaLEdZQoTdFlJeBwzQg= # =GPG1 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 07 Jul 2022 01:38:06 AM +0530 # gpg: using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164 # gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 17EB FF99 23D0 1800 AF28 3819 3CD9 CA96 DE03 3164 * tag 'pull-ppc-20220706' of https://gitlab.com/danielhb/qemu: (34 commits) target/ppc: Fix MPC8555 and MPC8560 core type to e500v1 target/ppc/cpu-models: Remove the "default" CPU alias target/ppc: Return default CPU for max CPU target/ppc: implement cdtbcd target/ppc: implement cbcdtd target/ppc: implement addg6s target/ppc: Add flag for ISA v2.06 BCDA instructions tests/tcg/ppc64: Add mffsce test target/ppc: Implement mffscdrn[i] instructions target/ppc: Move mffs[.] to decodetree target/ppc: Move mffsl to decodetree target/ppc: Move mffsce to decodetree target/ppc: Move mffscrn[i] to decodetree target/ppc: Fix insn32.decode style issues ppc/spapr: Implement H_WATCHDOG ppc: Define SETFIELD for the ppc target target/ppc: use int128.h methods in vsubcuq target/ppc: use int128.h methods in vsubecuq and vsubeuqm target/ppc: use int128.h methods in vsubuqm target/ppc: use int128.h methods in vaddcuq ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-07-06ppc/spapr: Implement H_WATCHDOGAlexey Kardashevskiy
The new PAPR 2.12 defines a watchdog facility managed via the new H_WATCHDOG hypercall. This adds H_WATCHDOG support which a proposed driver for pseries uses: https://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=303120 This was tested by running QEMU with a debug kernel and command line: -append \ "pseries-wdt.timeout=60 pseries-wdt.nowayout=1 pseries-wdt.action=2" and running "echo V > /dev/watchdog0" inside the VM. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220622051008.1067464-1-aik@ozlabs.ru> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-07-06ppc: Define SETFIELD for the ppc targetAlexey Kardashevskiy
It keeps repeating, move it to the header. This uses __builtin_ffsll() to allow using the macros in #define. This is not using the QEMU's FIELD macros as this would require changing all such macros found in skiboot (the PPC PowerNV firmware). Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220628080544.1509428-1-aik@ozlabs.ru> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-07-06spapr/ddw: Implement 64bit query extensionAlexey Kardashevskiy
PAPR 2.8 (2018) defines an extension to return 64bit value for the largest TCE block in "ibm,query-pe-dma-window". Recent Linux kernels support this already. This adds the extension and supports the older format. This advertises a bigger window for the new format as the biggest window with 2M pages below the start of the 64bit window as it is the maximum we will see in practice. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220623073136.1380214-1-aik@ozlabs.ru> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-07-06spapr/ddw: Reset DMA when the last non-default window is removedAlexey Kardashevskiy
PAPR+/LoPAPR says: === The platform must restore the default DMA window for the PE on a call to the ibm,remove-pe-dma-window RTAS call when all of the following are true: a. The call removes the last DMA window remaining for the PE. b. The DMA window being removed is not the default window === This resets DMA as PAPR mandates. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220622052955.1069903-1-aik@ozlabs.ru> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-07-06ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb4 root busDaniel Henrique Barboza
It's unneeded. No other PCIE_BUS implements this interface. Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Fixes: 4f9924c4d4cf ("ppc/pnv: Add models for POWER9 PHB4 PCIe Host bridge") Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220621173436.165912-9-danielhb413@gmail.com>
2022-07-06ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb3 root busDaniel Henrique Barboza
It's unneeded. No other PCIE_BUS implements this interface. Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Fixes: 9ae1329ee2fe ("ppc/pnv: Add models for POWER8 PHB3 PCIe Host bridge") Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220621173436.165912-8-danielhb413@gmail.com>
2022-07-06ppc/pnv: make pnv_chip_power8_pic_print_info() use chip8->phbs[]Daniel Henrique Barboza
It's inneficient to scroll all child objects when we have all PHBs available in chip8->phbs[]. pnv_chip_power8_pic_print_info_child() ended up folded into pic_print_info() for simplicity. Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220621173436.165912-7-danielhb413@gmail.com>
2022-07-06ppc/pnv: make pnv_ics_resend() use chip8->phbs[]Daniel Henrique Barboza
pnv_ics_resend() is scrolling through all the child objects of the chip to search for the PHBs. It's faster and simpler to just use the phbs[] array. pnv_ics_resend_child() was folded into pnv_ics_resend() since it's too simple to justify its own function. Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220621173436.165912-6-danielhb413@gmail.com>
2022-07-06ppc/pnv: make pnv_ics_get() use the chip8->phbs[] arrayDaniel Henrique Barboza
The function is working today by getting all the child objects of the chip, interacting with each of them to check whether the child is a PHB, and then doing what needs to be done. We have all the chip PHBs in the phbs[] array so interacting with all child objects is unneeded. Open code pnv_ics_get_phb_ics() into pnv_ics_get() and remove both pnv_ics_get_phb_ics() and the ForeachPhb3Args struct. Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220621173436.165912-5-danielhb413@gmail.com>
2022-07-06ppc/pnv: assign pnv-phb-root-port chassis/slot earlierDaniel Henrique Barboza
It is not advisable to execute an object_dynamic_cast() to poke into bus->qbus.parent and follow it up with a C cast into the PnvPHB type we think we got. In fact this is not needed. There is nothing sophisticated being done with the PHB object retrieved during root_port_realize() for both PHB3 and PHB4. We're retrieving a PHB reference just to access phb->chip_id and phb->phb_id and use them to define the chassis/slot of the root port. phb->phb_id is already being passed to pnv_phb_attach_root_port() via the 'index' parameter. Let's also add a 'chip_id' parameter to this function and assign chassis and slot right there. This will spare us from the hassle of accessing the PHB object inside realize(). Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Message-Id: <20220621173436.165912-4-danielhb413@gmail.com>
2022-07-06ppc/pnv: attach phb3/phb4 root ports in QOM treeDaniel Henrique Barboza
At this moment we leave the pnv-phb3(4)-root-port unattached in QOM: /unattached (container) (...) /device[2] (pnv-phb3-root-port) /bus master container[0] (memory-region) /bus master[0] (memory-region) /pci_bridge_io[0] (memory-region) /pci_bridge_io[1] (memory-region) /pci_bridge_mem[0] (memory-region) /pci_bridge_pci[0] (memory-region) /pci_bridge_pref_mem[0] (memory-region) /pci_bridge_vga_io_hi[0] (memory-region) /pci_bridge_vga_io_lo[0] (memory-region) /pci_bridge_vga_mem[0] (memory-region) /pcie.0 (PCIE) Let's make changes in pnv_phb_attach_root_port() to attach the created root ports to its corresponding PHB. This is the result afterwards: /pnv-phb3[0] (pnv-phb3) /lsi (ics) /msi (phb3-msi) /msi32[0] (memory-region) /msi64[0] (memory-region) /pbcq (pnv-pbcq) (...) /phb3_iommu[0] (pnv-phb3-iommu-memory-region) /pnv-phb3-root.0 (pnv-phb3-root) /pnv-phb3-root-port[0] (pnv-phb3-root-port) /bus master container[0] (memory-region) /bus master[0] (memory-region) /pci_bridge_io[0] (memory-region) /pci_bridge_io[1] (memory-region) /pci_bridge_mem[0] (memory-region) /pci_bridge_pci[0] (memory-region) /pci_bridge_pref_mem[0] (memory-region) /pci_bridge_vga_io_hi[0] (memory-region) /pci_bridge_vga_io_lo[0] (memory-region) /pci_bridge_vga_mem[0] (memory-region) /pcie.0 (PCIE) Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220621173436.165912-3-danielhb413@gmail.com>
2022-07-06ppc/pnv: move root port attach to pnv_phb4_realize()Daniel Henrique Barboza
Creating a root port is something related to the PHB, not the PEC. It also makes the logic more in line with what pnv-phb3 does. Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220621173436.165912-2-danielhb413@gmail.com>
2022-07-06m68k: virt: pass RNG seed via bootinfo blockJason A. Donenfeld
This commit wires up bootinfo's RNG seed attribute so that Linux VMs can have their RNG seeded from the earliest possible time in boot, just like the "rng-seed" device tree property on those platforms. The link contains the corresponding Linux patch. Link: https://lore.kernel.org/lkml/20220626111509.330159-1-Jason@zx2c4.com/ Based-on: <20220625152318.120849-1-Jason@zx2c4.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Message-Id: <20220626111804.330745-1-Jason@zx2c4.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-07-06m68k: use correct variable name in boot info string macroJason A. Donenfeld
Every time this macro is used, the caller is passing in "parameters_base", so this bug wasn't spotted. But the actual macro variable name is "base", so use that instead. Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20220625152318.120849-1-Jason@zx2c4.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-07-06scsi/lsi53c895a: fix use-after-free in lsi_do_msgout (CVE-2022-0216)Mauro Matteo Cascella
Set current_req->req to NULL to prevent reusing a free'd buffer in case of repeated SCSI cancel requests. Thanks to Thomas Huth for suggesting the patch. Fixes: CVE-2022-0216 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/972 Signed-off-by: Mauro Matteo Cascella <mcascell@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20220705200543.2366809-1-mcascell@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-07-06e1000: set RX descriptor status in a separate operationDing Hui
The code of setting RX descriptor status field maybe work fine in previously, however with the update of glibc version, it shows two issues when guest using dpdk receive packets: 1. The dpdk has a certain probability getting wrong buffer_addr this impact may be not obvious, such as lost a packet once in a while 2. The dpdk may consume a packet twice when scan the RX desc queue over again this impact will lead a infinite wait in Qemu, since the RDT (tail pointer) be inscreased to equal to RDH by unexpected, which regard as the RX desc queue is full Write a whole of RX desc with DD flag on is not quite correct, because when the underlying implementation of memcpy using XMM registers to copy e1000_rx_desc (when AVX or something else CPU feature is usable), the bytes order of desc writing to memory is indeterminacy We can use full-scale test case to reproduce the issue-2 by https://github.com/BASM/qemu_dpdk_e1000_test (thanks to Leonid Myravjev) I also write a POC test case at https://github.com/cdkey/e1000_poc which can reproduce both of them, and easy to verify the patch effect. The hw watchpoint also shows that, when Qemu using XMM related instructions writing 16 bytes e1000_rx_desc, concurrent with DPDK using movb writing 1 byte status, the final result of writing to memory will be one of them, if it made by Qemu which DD flag is on, DPDK will consume it again. Setting DD status in a separate operation, can prevent the impact of disorder memory writing by memcpy, also avoid unexpected data when concurrent writing status by qemu and guest dpdk. Links: https://lore.kernel.org/qemu-devel/20200102110504.GG121208@stefanha-x1.localdomain/T/ Reported-by: Leonid Myravjev <asm@asm.pp.ru> Cc: Stefan Hajnoczi <stefanha@gmail.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: qemu-stable@nongnu.org Tested-by: Jing Zhang <zhangjing@sangfor.com.cn> Reviewed-by: Frank Lee <lifan38153@sangfor.com.cn> Signed-off-by: Ding Hui <dinghui@sangfor.com.cn> Signed-off-by: Jason Wang <jasowang@redhat.com>
2022-07-05xen/pass-through: don't create needless register groupChuck Zmudzinski
Currently we are creating a register group for the Intel IGD OpRegion for every device we pass through, but the XEN_PCI_INTEL_OPREGION register group is only valid for an Intel IGD. Add a check to make sure the device is an Intel IGD and a check that the administrator has enabled gfx_passthru in the xl domain configuration. Require both checks to be true before creating the register group. Use the existing is_igd_vga_passthrough() function to check for a graphics device from any vendor and that the administrator enabled gfx_passthru in the xl domain configuration, but further require that the vendor be Intel, because only Intel IGD devices have an Intel OpRegion. These are the same checks hvmloader and libxl do to determine if the Intel OpRegion needs to be mapped into the guest's memory. Also, move the comment about trapping 0xfc for the Intel OpRegion where it belongs after applying this patch. Signed-off-by: Chuck Zmudzinski <brchuckz@aol.com> Reviewed-by: Anthony PERARD <anthony.perard@citrix.com> Message-Id: <c76dff6369ccf2256bd9eed5141da1db767293d2.1656480662.git.brchuckz@aol.com> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
2022-07-05xen/pass-through: merge emulated bits correctlyChuck Zmudzinski
In xen_pt_config_reg_init(), there is an error in the merging of the emulated data with the host value. With the current Qemu, instead of merging the emulated bits with the host bits as defined by emu_mask, the emulated bits are merged with the host bits as defined by the inverse of emu_mask. In some cases, depending on the data in the registers on the host, the way the registers are setup, and the initial values of the emulated bits, the end result will be that the register is initialized with the wrong value. To correct this error, use the XEN_PT_MERGE_VALUE macro to help ensure the merge is done correctly. This correction is needed to resolve Qemu project issue #1061, which describes the failure of Xen HVM Linux guests to boot in certain configurations with passed through PCI devices, that is, when this error disables instead of enables the PCI_STATUS_CAP_LIST bit of the PCI_STATUS register of a passed through PCI device, which in turn disables the MSI-X capability of the device in Linux guests with the end result being that the Linux guest never completes the boot process. Fixes: 2e87512eccf3 ("xen/pt: Sync up the dev.config and data values") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1061 Buglink: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=988333 Signed-off-by: Chuck Zmudzinski <brchuckz@aol.com> Reviewed-by: Anthony PERARD <anthony.perard@citrix.com> Message-Id: <e4392535d8e5266063dc5461d0f1d301e3dd5951.1656522217.git.brchuckz@aol.com> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
2022-07-05hw/intc/loongarch_ipi: Fix mail send and any send functionXiaojuan Yang
By the document of ipi mailsend device, byte is written only when the mask bit is 0. The original code discards mask bit and overwrite the data always, this patch fixes the issue. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Message-Id: <20220705064901.2353349-3-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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