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2021-10-12aspeed/smc: Stop using the model name for the memory regionsCédric Le Goater
There is no real reason to use this name. It's simply nice to have in the monitor output but it's a burden for the following patch which removes the AspeedSMCController structure describing the controller. Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-10-12aspeed/smc: Introduce aspeed_smc_error() helperCédric Le Goater
It unifies the errors reported by the Aspeed SMC model and also removes some use of ctrl->name which will help us for the next patches. Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-10-12aspeed/smc: Add watchdog Control/Status RegistersCédric Le Goater
The Aspeed SoCs have a dual boot function for firmware fail-over recovery. The system auto-reboots from the second flash if the main flash does not boot successfully within a certain amount of time. This function is called alternate boot (ABR) in the FMC controllers. On AST2400/AST2500, ABR is enabled by hardware strapping in SCU70 to enable the 2nd watchdog timer, on AST2600, through register SCU510. If the boot on the the main flash succeeds, the firmware should disable the 2nd watchdog timer. If not, the BMC is reset and the CE0 and CE1 mappings are swapped to restart the BMC from the 2nd flash. On the AST2600, the ABR registers controlling the 2nd watchdog timer were moved from the watchdog register to the FMC controller and the FMC model should be able to control WDT2 through its own register set. This requires more work. For now, add dummy read/write handlers to let the FW disable the 2nd watchdog without error. Reviewed-by: Peter Delevoryas <pdel@fb.com> Reported-by: Peter Delevoryas <pdel@fb.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2021-10-08q800: wire macfb IRQ to separate video interrupt on VIA2Mark Cave-Ayland
Whilst the in-built Quadra 800 framebuffer exists within the Nubus address space for slot 9, it has its own dedicated interrupt on VIA2. Force the macfb device to occupy slot 9 in the q800 machine and wire its IRQ to the separate video interrupt since this is what is expected by the MacOS interrupt handler. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20211007221253.29024-14-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-10-08macfb: add vertical blank interruptMark Cave-Ayland
The MacOS driver expects a 60.15Hz vertical blank interrupt to be generated by the framebuffer which in turn schedules the mouse driver via the Vertical Retrace Manager. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20211007221253.29024-13-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-10-08macfb: fix 24-bit RGB pixel encodingMark Cave-Ayland
According to Apple Technical Note HW26: "Macintosh Quadra Built-In Video" the in-built framebuffer encodes each 24-bit pixel into 4 bytes. Adjust the 24-bit RGB pixel encoding accordingly which agrees with the encoding expected by MacOS when changing into 24-bit colour mode. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20211007221253.29024-12-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-10-08macfb: fix up 1-bit pixel encodingMark Cave-Ayland
The MacOS driver expects the RGB values for the pixel to be in entries 0 and 1 of the colour palette. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20211007221253.29024-11-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-10-08macfb: add common monitor modes supported by the MacOS toolbox ROMMark Cave-Ayland
The monitor modes table is found by experimenting with the Monitors Control Panel in MacOS and analysing the reads/writes. From this it can be found that the mode is controlled by writes to the DAFB_MODE_CTRL1 and DAFB_MODE_CTRL2 registers. Implement the first block of DAFB registers as a register array including the existing sense register, the newly discovered control registers above, and also the DAFB_MODE_VADDR1 and DAFB_MODE_VADDR2 registers which are used by NetBSD to determine the current video mode. These experiments also show that the offset of the start of video RAM and the stride can change depending upon the monitor mode, so update macfb_draw_graphic() and both the BI_MAC_VADDR and BI_MAC_VROW bootinfo for the q800 machine accordingly. Finally update macfb_common_realize() so that only the resolution and depth supported by the display type can be specified on the command line, and add an error hint showing the list of supported resolutions and depths if the user tries to specify an invalid display mode. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20211007221253.29024-10-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-10-08macfb: add qdev property to specify display typeMark Cave-Ayland
Since the available resolutions and colour depths are determined by the attached display type, add a qdev property to allow the display type to be specified. The main resolutions of interest are high resolution 1152x870 with 8-bit colour and SVGA resolution up to 800x600 with 24-bit colour so update the q800 machine to allow high resolution mode if specified and otherwise fall back to SVGA. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20211007221253.29024-9-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-10-08macfb: implement mode sense to allow display type to be detectedMark Cave-Ayland
The MacOS toolbox ROM uses the monitor sense to detect the display type and then offer a fixed set of resolutions and colour depths accordingly. Implement the monitor sense using information found in Apple Technical Note HW26: "Macintosh Quadra Built-In Video" along with some local experiments. Since the default configuration is 640 x 480 with 8-bit colour then hardcode the sense register to return MACFB_DISPLAY_VGA for now. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20211007221253.29024-8-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-10-08macfb: add trace events for reading and writing the control registersMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20211007221253.29024-7-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-10-08macfb: use memory_region_init_ram() in macfb_common_realize() for the ↵Mark Cave-Ayland
framebuffer Currently macfb_common_realize() defines the framebuffer RAM memory region as being non-migrateable but then immediately registers it for migration. Replace memory_region_init_ram_nomigrate() with memory_region_init_ram() which is clearer and does exactly the same thing. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20211007221253.29024-6-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-10-08macfb: fix overflow of color_palette arrayMark Cave-Ayland
The palette_current index counter has a maximum size of 256 * 3 to cover a full color palette of 256 RGB entries. Linux assumes that the palette_current index wraps back around to zero after writing 256 RGB entries so ensure that palette_current is reset at this point to prevent data corruption within MacfbState. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20211007221253.29024-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-10-08macfb: fix invalid object reference in macfb_common_realize()Mark Cave-Ayland
During realize memory_region_init_ram_nomigrate() is used to initialise the RAM memory region used for the framebuffer but the owner object reference is incorrect since MacFbState is a typedef and not a QOM type. Change the memory region owner to be the corresponding DeviceState to fix the issue and prevent random crashes during macfb_common_realize(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Fixes: 8ac919a0654 ("hw/m68k: add Nubus macfb video card") Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20211007221253.29024-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-10-08macfb: update macfb.c to use the Error API best practicesMark Cave-Ayland
As per the current Error API best practices, change macfb_commom_realize() to return a boolean indicating success to reduce errp boiler-plate handling code. Note that memory_region_init_ram_nomigrate() is also updated to use &error_abort to indicate a non-recoverable error, matching the behaviour recommended after similar discussions on memory API failures for the recent nubus changes. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20211007221253.29024-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-10-08macfb: handle errors that occur during realizeMark Cave-Ayland
Make sure any errors that occur within the macfb realize chain are detected and handled correctly to prevent crashes and to ensure that error messages are reported back to the user. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20211007221253.29024-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-10-07hw/riscv: shakti_c: Mark as not user creatableAlistair Francis
Mark the shakti_c machine as not user creatable. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/639 Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <c617a04d4e3dd041a3427b47a1b1d5ab475a2edd.1632871759.git.alistair.francis@wdc.com>
2021-10-07hw/dma: sifive_pdma: Don't run DMA when channel is disclaimedBin Meng
If Control.run bit is set while not preserving the Control.claim bit, the DMA transfer shall not be started. The following result is PDMA tested in U-Boot on Unleashed board: => mw.l 0x3000000 0x0 <= Disclaim channel 0 => mw.l 0x3000000 0x1 <= Claim channel 0 => mw.l 0x3000004 0x55000000 <= wsize = rsize = 5 (2^5 = 32 bytes) => mw.q 0x3000008 0x2 <= NextBytes = 2 => mw.q 0x3000010 0x84000000 <= NextDestination = 0x84000000 => mw.q 0x3000018 0x84001000 <= NextSource = 0x84001000 => mw.l 0x84000000 0x87654321 <= Fill test data to dst => mw.l 0x84001000 0x12345678 <= Fill test data to src => md.l 0x84000000 1; md.l 0x84001000 1 <= Dump src/dst memory contents 84000000: 87654321 !Ce. 84001000: 12345678 xV4. => md.l 0x3000000 8 <= Dump PDMA status 03000000: 00000001 55000000 00000002 00000000 .......U........ 03000010: 84000000 00000000 84001000 00000000 ................ => mw.l 0x3000000 0x2 <= Set channel 0 run bit only => md.l 0x3000000 8 <= Dump PDMA status 03000000: 00000000 55000000 00000002 00000000 .......U........ 03000010: 84000000 00000000 84001000 00000000 ................ => md.l 0x84000000 1; md.l 0x84001000 1 <= Dump src/dst memory contents 84000000: 87654321 !Ce. 84001000: 12345678 xV4. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210927072124.1564129-2-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-10-07hw/dma: sifive_pdma: Fix Control.claim bit detectionBin Meng
At present the codes detect whether the DMA channel is claimed by: claimed = !!s->chan[ch].control & CONTROL_CLAIM; As ! has higher precedence over & (bitwise and), this is essentially claimed = (!!s->chan[ch].control) & CONTROL_CLAIM; which is wrong, as any non-zero bit set in the control register will produce a result of a claimed channel. Fixes: de7c7988d25d ("hw/dma: sifive_pdma: reset Next* registers when Control.claim is set") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210927072124.1564129-1-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-10-07hw/char/mchp_pfsoc_mmuart: QOM'ify PolarFire MMUARTPhilippe Mathieu-Daudé
- Embed SerialMM in MchpPfSoCMMUartState and QOM-initialize it - Alias SERIAL_MM 'chardev' property on MCHP_PFSOC_UART - Forward SerialMM sysbus IRQ in mchp_pfsoc_mmuart_realize() - Add DeviceReset() method - Add vmstate structure for migration - Register device in 'input' category - Keep mchp_pfsoc_mmuart_create() behavior Note, serial_mm_init() calls qdev_set_legacy_instance_id(). This call is only needed for backwards-compatibility of incoming migration data with old versions of QEMU which implemented migration of devices with hand-rolled code. Since this device didn't previously handle migration at all, then it doesn't need to set the legacy instance ID. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210925133407.1259392-4-f4bug@amsat.org Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-10-07hw/char/mchp_pfsoc_mmuart: Use a MemoryRegion containerPhilippe Mathieu-Daudé
Our device have 2 different I/O regions: - a 16550 UART mapped for 32-bit accesses - 13 extra registers Instead of mapping each region on the main bus, introduce a container, map the 2 devices regions on the container, and map the container on the main bus. Before: (qemu) info mtree ... 0000000020100000-000000002010001f (prio 0, i/o): serial 0000000020100020-000000002010101f (prio 0, i/o): mchp.pfsoc.mmuart 0000000020102000-000000002010201f (prio 0, i/o): serial 0000000020102020-000000002010301f (prio 0, i/o): mchp.pfsoc.mmuart 0000000020104000-000000002010401f (prio 0, i/o): serial 0000000020104020-000000002010501f (prio 0, i/o): mchp.pfsoc.mmuart 0000000020106000-000000002010601f (prio 0, i/o): serial 0000000020106020-000000002010701f (prio 0, i/o): mchp.pfsoc.mmuart After: (qemu) info mtree ... 0000000020100000-0000000020100fff (prio 0, i/o): mchp.pfsoc.mmuart 0000000020100000-000000002010001f (prio 0, i/o): serial 0000000020100020-0000000020100fff (prio 0, i/o): mchp.pfsoc.mmuart.regs 0000000020102000-0000000020102fff (prio 0, i/o): mchp.pfsoc.mmuart 0000000020102000-000000002010201f (prio 0, i/o): serial 0000000020102020-0000000020102fff (prio 0, i/o): mchp.pfsoc.mmuart.regs 0000000020104000-0000000020104fff (prio 0, i/o): mchp.pfsoc.mmuart 0000000020104000-000000002010401f (prio 0, i/o): serial 0000000020104020-0000000020104fff (prio 0, i/o): mchp.pfsoc.mmuart.regs 0000000020106000-0000000020106fff (prio 0, i/o): mchp.pfsoc.mmuart 0000000020106000-000000002010601f (prio 0, i/o): serial 0000000020106020-0000000020106fff (prio 0, i/o): mchp.pfsoc.mmuart.regs Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Tested-by: Bin Meng <bin.meng@windriver.com> Message-id: 20210925133407.1259392-3-f4bug@amsat.org Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-10-07hw/char/mchp_pfsoc_mmuart: Simplify MCHP_PFSOC_MMUART_REG definitionPhilippe Mathieu-Daudé
The current MCHP_PFSOC_MMUART_REG_SIZE definition represent the size occupied by all the registers. However all registers are 32-bit wide, and the MemoryRegionOps handlers are restricted to 32-bit: static const MemoryRegionOps mchp_pfsoc_mmuart_ops = { .read = mchp_pfsoc_mmuart_read, .write = mchp_pfsoc_mmuart_write, .impl = { .min_access_size = 4, .max_access_size = 4, }, Avoid being triskaidekaphobic, simplify by using the number of registers. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210925133407.1259392-2-f4bug@amsat.org Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-10-07hw/char: sifive_uart: Register device in 'input' categoryBin Meng
The category of sifive_uart device is not set. Put it into the 'input' category. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210926105003.2716-3-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-10-07hw/char: shakti_uart: Register device in 'input' categoryBin Meng
The category of shakti_uart device is not set. Put it into the 'input' category. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210926105003.2716-2-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-10-07hw/char: ibex_uart: Register device in 'input' categoryBin Meng
The category of ibex_uart device is not set. Put it into the 'input' category. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20210926105003.2716-1-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-10-06block: introduce max_hw_iov for use in scsi-genericPaolo Bonzini
Linux limits the size of iovecs to 1024 (UIO_MAXIOV in the kernel sources, IOV_MAX in POSIX). Because of this, on some host adapters requests with many iovecs are rejected with -EINVAL by the io_submit() or readv()/writev() system calls. In fact, the same limit applies to SG_IO as well. To fix both the EINVAL and the possible performance issues from using fewer iovecs than allowed by Linux (some HBAs have max_segments as low as 128), introduce a separate entry in BlockLimits to hold the max_segments value from sysfs. This new limit is used only for SG_IO and clamped to bs->bl.max_iov anyway, just like max_hw_transfer is clamped to bs->bl.max_transfer. Reported-by: Halil Pasic <pasic@linux.ibm.com> Cc: Hanna Reitz <hreitz@redhat.com> Cc: Kevin Wolf <kwolf@redhat.com> Cc: qemu-block@nongnu.org Cc: qemu-stable@nongnu.org Fixes: 18473467d5 ("file-posix: try BLKSECTGET on block devices too, do not round to power of 2", 2021-06-25) Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210923130436.1187591-1-pbonzini@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2021-10-05Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingRichard Henderson
pc,pci,virtio: features, fixes A huge acpi refactoring. Fixes, cleanups all over the place. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Tue 05 Oct 2021 02:31:11 PM PDT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] * remotes/mst/tags/for_upstream: (47 commits) hw/i386/amd_iommu: Add description/category to TYPE_AMD_IOMMU_PCI hw/i386/amd_iommu: Rename SysBus specific functions as amdvi_sysbus_X() hw/i386/amd_iommu: Rename amdviPCI TypeInfo nvdimm: release the correct device list virtio-balloon: Fix page-poison subsection name bios-tables-test: Update ACPI DSDT table golden blobs for q35 hw/i386/acpi: fix conflicting IO address range for acpi pci hotplug in q35 bios-tables-test: allow changes in DSDT ACPI tables for q35 acpi: AcpiGenericAddress no longer used to map/access fields of MMIO, drop packed attribute acpi: remove no longer used build_header() acpi: build_facs: use build_append_int_noprefix() API to compose table acpi: arm/virt: build_gtdt: use acpi_table_begin()/acpi_table_end() instead of build_header() acpi: arm/virt: build_spcr: use acpi_table_begin()/acpi_table_end() instead of build_header() acpi: arm/virt: build_spcr: fix invalid cast acpi: arm/virt: convert build_iort() to endian agnostic build_append_FOO() API acpi: arm: virt: build_iort: use acpi_table_begin()/acpi_table_end() instead of build_header() acpi: arm: virt: build_dsdt: use acpi_table_begin()/acpi_table_end() instead of build_header() acpi: build_dsdt_microvm: use acpi_table_begin()/acpi_table_end() instead of build_header() acpi: arm/virt: madt: use build_append_int_noprefix() API to compose MADT table acpi: x86: madt: use build_append_int_noprefix() API to compose MADT table ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-10-05hw/i386/amd_iommu: Add description/category to TYPE_AMD_IOMMU_PCIPhilippe Mathieu-Daudé
TYPE_AMD_IOMMU_PCI is user-creatable but not well described. Implement its class_init() handler to add it to the 'Misc devices' category, and add a description. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210926175648.1649075-4-f4bug@amsat.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-05hw/i386/amd_iommu: Rename SysBus specific functions as amdvi_sysbus_X()Philippe Mathieu-Daudé
Various functions are SysBus specific. Rename them using the consistent amdvi_sysbus_XXX() pattern, to differentiate them from PCI specific functions (which we'll add in the next commit). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210926175648.1649075-3-f4bug@amsat.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-05hw/i386/amd_iommu: Rename amdviPCI TypeInfoPhilippe Mathieu-Daudé
Per 'QEMU Coding Style': Naming ====== Variables are lower_case_with_underscores; easy to type and read. Rename amdviPCI variable as amdvi_pci. amdviPCI_register_types() register more than PCI types: TYPE_AMD_IOMMU_DEVICE inherits TYPE_X86_IOMMU_DEVICE which itself inherits TYPE_SYS_BUS_DEVICE. Rename it more generically as amdvi_register_types(). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210926175648.1649075-2-f4bug@amsat.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-05nvdimm: release the correct device listLi Zhijian
Signed-off-by: Li Zhijian <lizhijian@cn.fujitsu.com> Message-Id: <20210624110415.187164-1-lizhijian@cn.fujitsu.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2021-10-05virtio-balloon: Fix page-poison subsection nameDr. David Alan Gilbert
The subsection name for page-poison was typo'd as: vitio-balloon-device/page-poison Note the missing 'r' in virtio. When we have a machine type that enables page poison, and the guest enables it (which needs a new kernel), things fail rather unpredictably. The fallout from this is that most of the other subsections fail to load, including things like the feature bits in the device, one possible fallout is that the physical addresses of the queues then get aligned differently and we fail with an error about last_avail_idx being wrong. It's not obvious to me why this doesn't produce a more obvious failure, but virtio's vmstate loading is a bit open-coded. Fixes: 7483cbbaf82 ("virtio-balloon: Implement support for page poison reporting feature") bz: https://bugzilla.redhat.com/show_bug.cgi?id=1984401 Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20210914131716.102851-1-dgilbert@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com>
2021-10-05acpi: remove no longer used build_header()Igor Mammedov
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210924122802.1455362-35-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-05acpi: build_facs: use build_append_int_noprefix() API to compose tableIgor Mammedov
Drop usage of packed structures and explicit endian conversions when building table and use endian agnostic build_append_int_noprefix() API to build it. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210924122802.1455362-34-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-05acpi: arm/virt: build_gtdt: use acpi_table_begin()/acpi_table_end() instead ↵Igor Mammedov
of build_header() it replaces error-prone pointer arithmetic for build_header() API, with 2 calls to start and finish table creation, which hides offsets magic from API user. while at it, replace packed structure with endian agnostic build_append_FOO() API. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210924122802.1455362-33-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-05acpi: arm/virt: build_spcr: use acpi_table_begin()/acpi_table_end() instead ↵Igor Mammedov
of build_header() it replaces error-prone pointer arithmetic for build_header() API, with 2 calls to start and finish table creation, which hides offsets magic from API user. while at it, replace packed structure with endian agnostic build_append_FOO() API. PS: Spec is Microsoft hosted, however 1.02 is no where to be found (MS lists only the current revision) and the current revision is 1.07, so bring comments in line with 1.07 as this is the only available spec. There is no content change between originally implemented 1.02 (using QEMU code as reference) and 1.07. The only change is renaming 'Reserved2' field to 'Language', with the same 0 value. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210924122802.1455362-32-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-05acpi: arm/virt: build_spcr: fix invalid castIgor Mammedov
implicit cast to structure uint8_t member didn't raise error when assigning value from incorrect enum, but when using build_append_gas() (next patch) it will error out with (clang): implicit conversion from enumeration type 'AmlRegionSpace' to different enumeration type 'AmlAddressSpace' fix cast error by using correct AML_AS_SYSTEM_MEMORY enum Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210924122802.1455362-31-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-05acpi: arm/virt: convert build_iort() to endian agnostic build_append_FOO() APIIgor Mammedov
Drop usage of packed structures and explicit endian conversions when building IORT table use endian agnostic build_append_int_noprefix() API to build it. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20210924122802.1455362-30-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com>
2021-10-05acpi: arm: virt: build_iort: use acpi_table_begin()/acpi_table_end() instead ↵Igor Mammedov
of build_header() it replaces error-prone pointer arithmetic for build_header() API, with 2 calls to start and finish table creation, which hides offsets magic from API user. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210924122802.1455362-29-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-05acpi: arm: virt: build_dsdt: use acpi_table_begin()/acpi_table_end() instead ↵Igor Mammedov
of build_header() it replaces error-prone pointer arithmetic for build_header() API, with 2 calls to start and finish table creation, which hides offsets magic from API user. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210924122802.1455362-28-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-05acpi: build_dsdt_microvm: use acpi_table_begin()/acpi_table_end() instead of ↵Igor Mammedov
build_header() it replaces error-prone pointer arithmetic for build_header() API, with 2 calls to start and finish table creation, which hides offsets magic from API user. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210924122802.1455362-27-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-05acpi: arm/virt: madt: use build_append_int_noprefix() API to compose MADT tableIgor Mammedov
Drop usage of packed structures and explicit endian conversions when building MADT table for arm/x86 and use endian agnostic build_append_int_noprefix() API to build it. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210924122802.1455362-26-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-05acpi: x86: madt: use build_append_int_noprefix() API to compose MADT tableIgor Mammedov
Drop usage of packed structures and explicit endian conversions when building MADT table for arm/x86 and use endian agnostic build_append_int_noprefix() API to build it. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210924122802.1455362-25-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-05acpi: x86: set enabled when composing _MAT entriesIgor Mammedov
Instead of composing disabled _MAT entry and then later on patching it to enabled for hotpluggbale CPUs in DSDT, set it to enabled at the time _MAT entry is built. It will allow to drop usage of packed structures in following patches when build_madt() is switched to use build_append_int_noprefix() API. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210924122802.1455362-24-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-05acpi: madt: arm/x86: use acpi_table_begin()/acpi_table_end() instead of ↵Igor Mammedov
build_header() it replaces error-prone pointer arithmetic for build_header() API, with 2 calls to start and finish table creation, which hides offsets magic from API user. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210924122802.1455362-22-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-05acpi: build_amd_iommu: use acpi_table_begin()/acpi_table_end() instead of ↵Igor Mammedov
build_header() it replaces error-prone pointer arithmetic for build_header() API, with 2 calls to start and finish table creation, which hides offsets magic from API user. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210924122802.1455362-21-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-05acpi: build_waet: use acpi_table_begin()/acpi_table_end() instead of ↵Igor Mammedov
build_header() it replaces error-prone pointer arithmetic for build_header() API, with 2 calls to start and finish table creation, which hides offsets magic from API user. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210924122802.1455362-20-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-05acpi: build_dmar_q35: use acpi_table_begin()/acpi_table_end() instead of ↵Igor Mammedov
build_header() it replaces error-prone pointer arithmetic for build_header() API, with 2 calls to start and finish table creation, which hides offsets magic from API user. While at it switch to build_append_int_noprefix() to build table entries tables. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210924122802.1455362-19-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-05acpi: use build_append_int_noprefix() API to compose SRAT tableIgor Mammedov
Drop usage of packed structures and explicit endian conversions when building SRAT tables for arm/x86 and use endian agnostic build_append_int_noprefix() API to build it. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210924122802.1455362-18-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2021-10-05acpi: arm/x86: build_srat: use acpi_table_begin()/acpi_table_end() instead ↵Igor Mammedov
of build_header() it replaces error-prone pointer arithmetic for build_header() API, with 2 calls to start and finish table creation, which hides offsets magic from API user. While at it switch to build_append_int_noprefix() to build table entries (which also removes some manual offset calculations) Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210924122802.1455362-17-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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