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AgeCommit message (Expand)Author
2020-06-23hw/i2c/versatile_i2c: Add definitions for register addressesPhilippe Mathieu-Daudé
2020-06-23hw/watchdog/cmsdk-apb-watchdog: Add trace event for lock statusPhilippe Mathieu-Daudé
2020-06-23hw/arm/virt: Add 5.0 HW compat propsAndrew Jones
2020-06-22hw/rx: Add RX GDB simulatorYoshinori Sato
2020-06-22hw/rx: Register R5F562N7 and R5F562N8 MCUsPhilippe Mathieu-Daudé
2020-06-22hw/rx: Honor -accel qtestRichard Henderson
2020-06-22hw/rx: RX62N microcontroller (MCU)Yoshinori Sato
2020-06-22hw/char: RX62N serial communication interface (SCI)Yoshinori Sato
2020-06-22hw/timer: RX62N compare match timer (CMT)Yoshinori Sato
2020-06-22hw/timer: RX62N 8-Bit timer (TMR)Yoshinori Sato
2020-06-22hw/intc: RX62N interrupt controller (ICUa)Yoshinori Sato
2020-06-22hw/timer/sh_timer: Remove unused 'qemu/timer.h' includePhilippe Mathieu-Daudé
2020-06-22hw/sh4: Extract timer definitions to 'hw/timer/tmu012.h'Philippe Mathieu-Daudé
2020-06-22Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200...Peter Maydell
2020-06-19Merge remote-tracking branch 'remotes/kraxel/tags/audio-20200619-pull-request...Peter Maydell
2020-06-19hw/riscv: sifive_u: Add a dummy DDR memory controller deviceBin Meng
2020-06-19hw/riscv: sifive_u: Sort the SoC memmap table entriesBin Meng
2020-06-19hw/riscv: sifive_u: Support different boot source per MSEL pin stateBin Meng
2020-06-19hw/riscv: sifive: Change SiFive E/U CPU reset vector to 0x1004Bin Meng
2020-06-19hw/riscv: sifive_u: Add a new property msel for MSEL pin stateBin Meng
2020-06-19hw/riscv: sifive_u: Rename serial property get/set functions to a generic nameBin Meng
2020-06-19hw/riscv: sifive_u: Add reset functionalityBin Meng
2020-06-19hw/riscv: sifive_gpio: Do not blindly trigger output IRQsBin Meng
2020-06-19hw/riscv: sifive_u: Hook a GPIO controllerBin Meng
2020-06-19hw/riscv: sifive_gpio: Add a new 'ngpio' propertyBin Meng
2020-06-19hw/riscv: sifive_gpio: Clean up the codesBin Meng
2020-06-19hw/riscv: sifive_u: Generate device tree node for OTPBin Meng
2020-06-19hw/riscv: sifive_u: Simplify the GEM IRQ connect code a little bitBin Meng
2020-06-19hw/riscv: opentitan: Remove the riscv_ prefix of the machine* and soc* functionsBin Meng
2020-06-19hw/riscv: sifive_e: Remove the riscv_ prefix of the machine* and soc* functionsBin Meng
2020-06-19riscv/opentitan: Connect the UART deviceAlistair Francis
2020-06-19riscv/opentitan: Connect the PLIC deviceAlistair Francis
2020-06-19hw/intc: Initial commit of lowRISC Ibex PLICAlistair Francis
2020-06-19hw/char: Initial commit of Ibex UARTAlistair Francis
2020-06-19riscv/opentitan: Fix the ROM sizeAlistair Francis
2020-06-19sifive_e: Support the revB machineAlistair Francis
2020-06-19tpm: Move backend code under the 'backends/' directoryPhilippe Mathieu-Daudé
2020-06-19hw/tpm: Make 'tpm_util.h' publicly accessible as "sysemu/tpm_util.h"Philippe Mathieu-Daudé
2020-06-19hw/tpm: Move DEFINE_PROP_TPMBE() macro to 'tmp_prop.h' local headerPhilippe Mathieu-Daudé
2020-06-19hw/tpm: Move few declarations from 'tpm_util.h' to 'tpm_int.h'Philippe Mathieu-Daudé
2020-06-19hw/tpm: Make TRACE_TPM_UTIL_SHOW_BUFFER check local to tpm_util.cPhilippe Mathieu-Daudé
2020-06-19hw/tpm: Remove unnecessary 'tpm_int.h' header inclusionPhilippe Mathieu-Daudé
2020-06-19hw/tpm: Move 'hw/acpi/tpm.h' inclusion from header to sourcesPhilippe Mathieu-Daudé
2020-06-19hw/tpm: Include missing 'qemu/option.h' headerPhilippe Mathieu-Daudé
2020-06-19hw/tpm: Do not include 'qemu/osdep.h' in headerPhilippe Mathieu-Daudé
2020-06-19hw/tpm: Rename TPMDEV as TPM_BACKEND in KconfigPhilippe Mathieu-Daudé
2020-06-19Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20200618' into stagingPeter Maydell
2020-06-19hw/audio/gus: Fix registers 32-bit accessAllan Peramaki
2020-06-18Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into st...Peter Maydell
2020-06-18hw/net/e1000e: Do not abort() on invalid PSRCTL register valuePhilippe Mathieu-Daudé