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2022-05-06Revert "vfio: Avoid disabling and enabling vectors repeatedly in VFIO migration"Longpeng(Mike)
Commit ecebe53fe993 ("vfio: Avoid disabling and enabling vectors repeatedly in VFIO migration") avoids inefficiently disabling and enabling vectors repeatedly and lets the unmasked vectors be enabled one by one. But we want to batch multiple routes and defer the commit, and only commit once outside the loop of setting vector notifiers, so we cannot enable the vectors one by one in the loop now. Revert that commit and we will take another way in the next patch, it can not only avoid disabling/enabling vectors repeatedly, but also satisfy our requirement of defer to commit. Signed-off-by: Longpeng(Mike) <longpeng2@huawei.com> Link: https://lore.kernel.org/r/20220326060226.1892-5-longpeng2@huawei.com Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-05-06vfio: simplify the failure path in vfio_msi_enableLongpeng(Mike)
Use vfio_msi_disable_common to simplify the error handling in vfio_msi_enable. Signed-off-by: Longpeng(Mike) <longpeng2@huawei.com> Link: https://lore.kernel.org/r/20220326060226.1892-4-longpeng2@huawei.com Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-05-06vfio: move re-enabling INTX out of the common helperLongpeng(Mike)
Move re-enabling INTX out, and the callers should decide to re-enable it or not. Signed-off-by: Longpeng(Mike) <longpeng2@huawei.com> Link: https://lore.kernel.org/r/20220326060226.1892-3-longpeng2@huawei.com Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-05-06vfio: simplify the conditional statements in vfio_msi_enableLongpeng(Mike)
It's unnecessary to test against the specific return value of VFIO_DEVICE_SET_IRQS, since any positive return is an error indicating the number of vectors we should retry with. Signed-off-by: Longpeng(Mike) <longpeng2@huawei.com> Link: https://lore.kernel.org/r/20220326060226.1892-2-longpeng2@huawei.com Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-05-05target/ppc: Remove msr_pr macroVíctor Colombo
msr_pr macro hides the usage of env->msr, which is a bad behavior Substitute it with FIELD_EX64 calls that explicitly use env->msr as a parameter. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220504210541.115256-4-victor.colombo@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05ppc/xive: Update the state of the External interrupt signalFrederic Barrat
When pulling or pushing an OS context from/to a CPU, we should re-evaluate the state of the External interrupt signal. Otherwise, we can end up catching the External interrupt exception in hypervisor mode, which is unexpected. The problem is best illustrated with the following scenario: 1. an External interrupt is raised while the guest is on the CPU. 2. before the guest can ack the External interrupt, an hypervisor interrupt is raised, for example the Hypervisor Decrementer or Hypervisor Virtualization interrupt. The hypervisor interrupt forces the guest to exit while the External interrupt is still pending. 3. the hypervisor handles the hypervisor interrupt. At this point, the External interrupt is still pending. So it's very likely to be delivered while the hypervisor is running. That's unexpected and can result in an infinite loop where the hypervisor catches the External interrupt, looks for an interrupt in its hypervisor queue, doesn't find any, exits the interrupt handler with the External interrupt still raised, repeat... The fix is simply to always lower the External interrupt signal when pulling an OS context. It means it needs to be raised again when re-pushing the OS context. Fortunately, it's already the case, as we now always call xive_tctx_ipb_update(), which will raise the signal if needed. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Message-Id: <20220429071620.177142-3-fbarrat@linux.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05ppc/xive: Always recompute the PIPR when pushing an OS contextFrederic Barrat
The Post Interrupt Priority Register (PIPR) is not restored like the other OS-context related fields of the TIMA when pushing an OS context on the CPU. It's not needed because it can be calculated from the Interrupt Pending Buffer (IPB), which is saved and restored. The PIPR must therefore always be recomputed when pushing an OS context. This patch fixes a path on P9 and P10 where it was not done. If there was a pending interrupt when the OS context was pulled, the IPB was saved correctly. When pushing back the context, the code in xive_tctx_need_resend() was checking for a interrupt raised while the context was not on the CPU, saved in the NVT. If one was found, then it was merged with the saved IPB and the PIPR updated and everything was fine. However, if there was no interrupt found in the NVT, then xive_tctx_ipb_update() was not being called and the PIPR was not updated. This patch fixes it by always calling xive_tctx_ipb_update(). Note that on P10 (xive2.c) and because of the above, there's no longer any need to check the CPPR value so it can go away. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Message-Id: <20220429071620.177142-2-fbarrat@linux.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05vhost-user: Use correct macro name TARGET_PPC64Murilo Opsfelder Araujo
The correct name of the macro is TARGET_PPC64. Fixes: 27598393a232 ("Lift max memory slots limit imposed by vhost-user") Reported-by: Fabiano Rosas <farosas@linux.ibm.com> Signed-off-by: Murilo Opsfelder Araujo <muriloo@linux.ibm.com> Cc: Raphael Norwitz <raphael.norwitz@nutanix.com> Cc: Peter Turschmid <peter.turschm@nutanix.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Raphael Norwitz <raphael.norwitz@nutanix.com> Message-Id: <20220503180108.34506-1-muriloo@linux.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-05-05Merge tag 'pull-target-arm-20220505' of ↵Richard Henderson
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * Enable read access to performance counters from EL0 * Enable SCTLR_EL1.BT0 for aarch64-linux-user * Refactoring of cpreg handling # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmJzlJYZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3rQXEACqtWhESD9ZJ0T1DfiWh7HX # KXZuvB5C4kEdY8KXPJsdFM47KGMB29AI1pfqN5oRvalGG40ROM1HNTO44LSjKgUr # b+aEq0bcbOJQuhfc5EPoh3b9wekowxlBYsH3Zq251J6ua6dRd1iqdeGXFIZbn02x # RY5lXB2wgWh8LnF+qwoLiIrqJWsJ8PSOolyl0LrKjI3Z22UboK1Y5K0sbJBlavX4 # xKEyd4Af1Jq+1GcleSymAjcNF1iO+38w6rrFSgMWj+f3HSjKCk+MHU78rfqVNa88 # ESRjBj1x3c8kRzNzy+Q8ntJ5QzREvFDpUYBC9lvnoLKQ6xRJWDvvZQw2YJGsH8sB # Xgg8fQ75iYEQdN4SHLWn24OwZpKuzTZ4QYm0d02GiAZCGXgAFEIKG62lBd3UJTAy # 6wTUdjuLv/KA+Lc3qdvmFfOVxfPh728VvFl55IoGXZv9FFrxvrluLEgr3TIje9W3 # 0r1FcjtAuuTHzKiaf8UsmvMW9nR550L1xQ+uMY8GKQvQgSvkf050srVZS05GFItH # DqCUv++hsyi0b44J377cUKkAEOdH/rhV20pvvfoJthRgmHLNN5LG61JI9eK9JXzl # +AYpbxAC3R6f0dp6/31D0ZRhW7wcC/rt1EVK/iACVKoGo8hZf3lC64y2+3TVoApF # DdCadVNnR9eUFWh1inGXKQ== # =Q7ra # -----END PGP SIGNATURE----- # gpg: Signature made Thu 05 May 2022 04:10:46 AM CDT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] * tag 'pull-target-arm-20220505' of https://git.linaro.org/people/pmaydell/qemu-arm: (23 commits) target/arm: read access to performance counters from EL0 target/arm: Add isar_feature_{aa64,any}_ras target/arm: Add isar predicates for FEAT_Debugv8p2 target/arm: Remove HOST_BIG_ENDIAN ifdef in add_cpreg_to_hashtable target/arm: Reformat comments in add_cpreg_to_hashtable target/arm: Perform override check early in add_cpreg_to_hashtable target/arm: Hoist isbanked computation in add_cpreg_to_hashtable target/arm: Use bool for is64 and ns in add_cpreg_to_hashtable target/arm: Consolidate cpreg updates in add_cpreg_to_hashtable target/arm: Hoist computation of key in add_cpreg_to_hashtable target/arm: Merge allocation of the cpreg and its name target/arm: Store cpregs key in the hash table directly target/arm: Drop always-true test in define_arm_vh_e2h_redirects_aliases target/arm: Name CPSecureState type target/arm: Name CPState type target/arm: Change cpreg access permissions to enum target/arm: Avoid bare abort() or assert(0) target/arm: Reorg ARMCPRegInfo type field bits target/arm: Make some more cpreg data static const target/arm: Replace sentinels with ARRAY_SIZE in cpregs.h ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-05target/arm: Replace sentinels with ARRAY_SIZE in cpregs.hRichard Henderson
Remove a possible source of error by removing REGINFO_SENTINEL and using ARRAY_SIZE (convinently hidden inside a macro) to find the end of the set of regs being registered or modified. The space saved by not having the extra array element reduces the executable's .data.rel.ro section by about 9k. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220501055028.646596-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-05target/arm: Split out cpregs.hRichard Henderson
Move ARMCPRegInfo and all related declarations to a new internal header, out of the public cpu.h. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220501055028.646596-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-05-04Merge tag 'for-upstream' of git://repo.or.cz/qemu/kevin into stagingRichard Henderson
Block layer patches - Fix and re-enable GLOBAL_STATE_CODE assertions - vhost-user: Fixes for VHOST_USER_ADD/REM_MEM_REG - vmdk: Fix reopening bs->file - coroutine: use QEMU_DEFINE_STATIC_CO_TLS() - docs/qemu-img: Fix list of formats which implement check # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEE3D3rFZqa+V09dFb+fwmycsiPL9YFAmJyi+YRHGt3b2xmQHJl # ZGhhdC5jb20ACgkQfwmycsiPL9aphxAAt0sXEOWlcIeU87NOk+V30rRiBup0K/HZ # wqsE6e0EMbygmC2aS/xqNu3naQ/TMY6UaoVBWSpf0D3sK2GnWEJW8bjV05ObZBwp # 6QUgqljk1QAAVv0o2/nViAcV8mEW+OzZLveP+qxFRNlNGoJDsbGzWj939SHM13eu # ZD+/GGs/qXL3Gxp6adhOBjxbXYjvxm13F3pVjoyAugjMSqoSuCI0eXu1xkwXNHSP # /wqObH3dQSzIvEXfE/1BOp3ofZwvg+XzeZ6MM4I/lvHDZWuQBfCQcBYKL9mMNWGc # ijFEeolWt7hER50ik4XPvBmbj0jU2nPXQwo1XcFeWX3MSoNsha2jCZsz4LqzadIN # YijGQHmkfDRmG2LSoIGcgM7chdwj88K8pfMnrrTsVEB6Dl4QrK6FjXviL5mG+rcX # 5FbKpgRwm3fmtug7Ttpgm1LJQmwK5A3YPenPH+CC2FoK3Rje46ZoMwQR5PBuHvM1 # rg9RB01eGJQGrw5Rt3VFk7304O/yT2J5m96x6CMejx4CuGK78VpkBC54HixTTh0R # nXxLLZdqawVqwrPP6sE02FEajM931///nhU6fuN/832m3bYUsfM8SZNVqJh5xoex # SK8x/a5HnTIkp7kys3f4juc+jzb4Yvka8IBIZi/gqzoqf8POGKLBCTpEXa3lBWIT # gnCCnWWEdgY= # =ETW/ # -----END PGP SIGNATURE----- # gpg: Signature made Wed 04 May 2022 09:21:26 AM CDT # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] * tag 'for-upstream' of git://repo.or.cz/qemu/kevin: coroutine-win32: use QEMU_DEFINE_STATIC_CO_TLS() coroutine: use QEMU_DEFINE_STATIC_CO_TLS() coroutine-ucontext: use QEMU_DEFINE_STATIC_CO_TLS() iotests/reopen-file: Test reopening file child block/vmdk: Fix reopening bs->file iotests: Add regression test for issue 945 Revert "main-loop: Disable GLOBAL_STATE_CODE() assertions" qcow2: Do not reopen data_file in invalidate_cache block: Classify bdrv_get_flags() as I/O function vhost-user: Don't pass file descriptor for VHOST_USER_REM_MEM_REG libvhost-user: Fix extra vu_add/rem_mem_reg reply docs/vhost-user: Clarifications for VHOST_USER_ADD/REM_MEM_REG qemu-img: properly list formats which have consistency check implemented Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-04vhost-user: Don't pass file descriptor for VHOST_USER_REM_MEM_REGKevin Wolf
The spec clarifies now that QEMU should not send a file descriptor in a request to remove a memory region. Change it accordingly. For libvhost-user, this is a bug fix that makes it compatible with rust-vmm's implementation that doesn't send a file descriptor. Keep accepting, but ignoring a file descriptor for compatibility with older QEMU versions. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20220407133657.155281-4-kwolf@redhat.com> Reviewed-by: Raphael Norwitz <raphael.norwitz@nutanix.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2022-05-04target/s390x: add S390_FEAT_VECTOR_ENH2 to qemu CPU modelDavid Miller
[ dh: take care of compat machines ] Signed-off-by: David Miller <dmiller423@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20220428094708.84835-13-david@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-05-03Merge tag 'misc-pull-request' of gitlab.com:marcandre.lureau/qemu into stagingRichard Henderson
Misc cleanups # -----BEGIN PGP SIGNATURE----- # # iQJQBAABCAA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmJxKjQcHG1hcmNhbmRy # ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5ZD5D/9f5CGbNsrl7kB1t6iS # 1ABr5AeW0g9sidMCsQAe9xhWl6+R2SO/z0bBue+mv1ltG0RSZ1ZXS4FyJFBAhFfR # fZ6J7bvdnawIKOxu5T9NY/UvthdRV0eC8CTo0q6GAJo9MHyIGvo1TOoM2Ld9QpfB # 2uup+9fw3Clh0HSHwV9LSL7v2nucFef4A5P1CJ6d1KHnnej0hfug5o+Aiy+wDLA2 # 5RnTm44dqm9lzTgt/x4MqE6Us7WWQukjlLny8/gyurNTR+6fxLqjsHZG+6woQETu # Gg6angsOoAFyciFZ564rjGv80qQuccMVMjtrKvBZz/cmwUUz+Lb4tU3tUPBqomGX # wiofVtL4qcXs94OHWX654UX/iXgkRqC3r+aC0xT37cL4svC8N69BhilxI5+gIGxZ # ZjaQhHx/0e+Ut3c+xrjYHbywQMd9L9AhRyYSMz5BNeLg9+yUiMR+hvGVR/SubLN1 # iiLS07CRgdOKdP6ts7CC7txAgDw4h3cPN5Hz+gqXMJTcnBKpXpnF1lL+Zd/J5++N # 8qMVQH5O4REQRISsbKaOPW8PCiPESsUaHb/mWkre7iYLgkEdNMVQvRcnfx14ejbk # /KKXolrG1huJXGQGnYvgJArHMBBL+ieIYiT6alKFNRNECLdioL46FuSOlirHVCGe # StU22Vsl61M8ifDOPdolK55X5Q== # =npwd # -----END PGP SIGNATURE----- # gpg: Signature made Tue 03 May 2022 06:12:20 AM PDT # gpg: using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5 # gpg: issuer "marcandre.lureau@redhat.com" # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full] # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full] * tag 'misc-pull-request' of gitlab.com:marcandre.lureau/qemu: (23 commits) util: rename qemu_*block() socket functions tests: replace qemu_set_nonblock() net: replace qemu_set_nonblock() ui: replace qemu_set_nonblock() hw: replace qemu_set_nonblock() qga: replace qemu_set_nonblock() io: replace qemu_set{_non}block() chardev: replace qemu_set_nonblock() io: make qio_channel_command_new_pid() static Replace fcntl(O_NONBLOCK) with g_unix_set_fd_nonblocking() io: replace pipe() with g_unix_open_pipe(CLOEXEC) virtiofsd: replace pipe() with g_unix_open_pipe(CLOEXEC) os-posix: replace pipe()+cloexec with g_unix_open_pipe(CLOEXEC) tests: replace pipe() with g_unix_open_pipe(CLOEXEC) qga: replace pipe() with g_unix_open_pipe(CLOEXEC) util: replace pipe()+cloexec with g_unix_open_pipe() Replace qemu_pipe() with g_unix_open_pipe() block: move fcntl_setfl() Use g_unix_set_fd_nonblocking() libqtest: split QMP part in libqmp ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-03util: rename qemu_*block() socket functionsMarc-André Lureau
The qemu_*block() functions are meant to be be used with sockets (the win32 implementation expects SOCKET) Over time, those functions where used with Win32 SOCKET or file-descriptors interchangeably. But for portability, they must only be used with socket-like file-descriptors. FDs can use g_unix_set_fd_nonblocking() instead. Rename the functions with "socket" in the name to prevent bad usages. This is effectively reverting commit f9e8cacc5557e43 ("oslib-posix: rename socket_set_nonblock() to qemu_set_nonblock()"). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-05-03hw: replace qemu_set_nonblock()Marc-André Lureau
Those calls are non-socket fd, or are POSIX-specific. Use the dedicated GLib API. (qemu_set_nonblock() is for socket-like) (this is a preliminary patch before renaming qemu_set_nonblock()) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2022-05-03Use g_unix_set_fd_nonblocking()Marc-André Lureau
API available since glib 2.30. It also preserves errno. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-03aspeed/hace: Support AST1030 HACESteven Lee
Per ast1030_v7.pdf, AST1030 HACE engine is identical to AST2600's HACE engine. Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02hw/gpio/aspeed_gpio: Fix QOM pin propertyPeter Delevoryas
I was setting gpioV4-7 to "1110" using the QOM pin property handler and noticed that lowering gpioV7 was inadvertently lowering gpioV4-6 too. (qemu) qom-set /machine/soc/gpio gpioV4 true (qemu) qom-set /machine/soc/gpio gpioV5 true (qemu) qom-set /machine/soc/gpio gpioV6 true (qemu) qom-get /machine/soc/gpio gpioV4 true (qemu) qom-set /machine/soc/gpio gpioV7 false (qemu) qom-get /machine/soc/gpio gpioV4 false An expression in aspeed_gpio_set_pin_level was using a logical NOT operator instead of a bitwise NOT operator: value &= !pin_mask; The original author probably intended to make a bitwise NOT expression "~", but mistakenly used a logical NOT operator "!" instead. Some programming languages like Rust use "!" for both purposes. Fixes: 4b7f956862dc ("hw/gpio: Add basic Aspeed GPIO model for AST2400 and AST2500") Signed-off-by: Peter Delevoryas <pdel@fb.com> Message-Id: <20220502080827.244815-1-pdel@fb.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed/hace: Support AST2600 HACESteven Lee
The aspeed ast2600 accumulative mode is described in datasheet ast2600v10.pdf section 25.6.4: 1. Allocating and initiating accumulative hash digest write buffer with initial state. * Since QEMU crypto/hash api doesn't provide the API to set initial state of hash library, and the initial state is already set by crypto library (gcrypt/glib/...), so skip this step. 2. Calculating accumulative hash digest. (a) When receiving the last accumulative data, software need to add padding message at the end of the accumulative data. Padding message described in specific of MD5, SHA-1, SHA224, SHA256, SHA512, SHA512/224, SHA512/256. * Since the crypto library (gcrypt/glib) already pad the padding message internally. * This patch is to remove the padding message which fed byguest machine driver. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220426021120.28255-3-steven_lee@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed/hace: Support HMAC Key Buffer register.Steven Lee
Support HACE28: Hash HMAC Key Buffer Base Address Register. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220426021120.28255-2-steven_lee@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02hw/arm/aspeed: fix AST2500/AST2600 EVB fmc modelJae Hyun Yoo
Current fmc model of AST2500 EVB and AST2600 EVB can't emulate quad mode properly so fix them using equivalent mx25l25635e and mx66u51235f respectively. These default settings still can be overridden using the 'fmc-model' command line option. Reported-by: Graeme Gregory <quic_ggregory@quicinc.com> Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220402184427.4010304-1-quic_jaehyoo@quicinc.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed: Add an AST1030 eval boardJamin Lin
The image should be supplied with ELF binary. $ qemu-system-arm -M ast1030-evb -kernel zephyr.elf -nographic Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220401083850.15266-9-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed/soc : Add AST1030 supportSteven Lee
The embedded core of AST1030 SoC is ARM Coretex M4. It is hard to be integrated in the common Aspeed Soc framework. We introduce a new ast1030 class with instance_init and realize handlers. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> [ clg: rename aspeed_ast10xx.c to aspeed_ast10x0.c to match zephyr ] Message-Id: <20220401083850.15266-8-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed/scu: Add AST1030 supportSteven Lee
Per ast1030_v07.pdf, AST1030 SOC doesn't have SCU300, the pclk divider selection is defined in SCU310[11:8]. Add a get_apb_freq function and a class init handler for ast1030. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220401083850.15266-7-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed/timer: Add AST1030 supportSteven Lee
ast1030 tmc(timer controller) is identical to ast2600 tmc. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220401083850.15266-6-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed/wdt: Add AST1030 supportSteven Lee
AST1030 wdt controller is similiar to AST2600's wdt, but it has extra registers. Introduce ast1030 object class and increse the number of regs(offset) of ast1030 model. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220401083850.15266-5-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed/wdt: Fix ast2500/ast2600 default reload valueSteven Lee
Per ast2500_2520_datasheet_v1.8 and ast2600v11.pdf, the default value of WDT00 and WDT04 is 0x014FB180 for ast2500/ast2600. Add default_status and default_reload_value attributes for storing counter status and reload value as they are different from ast2400. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220401083850.15266-4-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed/smc: Add AST1030 supportSteven Lee
AST1030 spi controller's address decoding unit is 1MB that is identical to ast2600, but fmc address decoding unit is 512kb. Introduce seg_to_reg and reg_to_seg handlers for ast1030 fmc controller. In addition, add ast1030 fmc, spi1, and spi2 class init handler. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220401083850.15266-3-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed/adc: Add AST1030 supportSteven Lee
Per ast1030_v7.pdf, AST1030 ADC engine is identical to AST2600's ADC. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220401083850.15266-2-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed: Add eMMC Boot Controller stubJoel Stanley
Guest code (u-boot) pokes at this on boot. No functionality is required for guest code to work correctly, but it helps to document the region being read from. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220318092211.723938-1-joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02aspeed: sbc: Correct default reset valuesJoel Stanley
In order to correctly report secure boot running firmware, these values must be set. They are taken from a running machine when secure boot is enabled. We don't yet have documentation from ASPEED on what they mean. Set the raw values for now, and in the future improve the model with properties to set these on a per-machine basis. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220310052159.183975-1-joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02hw: aspeed_scu: Introduce clkin_25Mhz attributeSteven Lee
AST2600 clkin is always 25MHz, introduce clkin_25Mhz attribute for aspeed_scu_get_clkin() to return the correct clkin for ast2600. Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220315075753.8591-3-steven_lee@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-02hw: aspeed_scu: Add AST2600 apb_freq and hpll calculation functionSteven Lee
AST2600's HPLL register offset and bit definition are different from AST2500. Add a hpll calculation function and an apb frequency calculation function based on SCU200 register description in ast2600v11.pdf. Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> [ clg: checkpatch fixes ] Message-Id: <20220315075753.8591-2-steven_lee@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-05-019pfs: fix qemu_mknodat() to always return -1 on error on macOS hostChristian Schoenebeck
qemu_mknodat() is expected to behave according to its POSIX API, and therefore should always return exactly -1 on any error, and errno should be set for the actual error code. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@gmail.com> Message-Id: <c714b5e1cae225ab7575242c45ee0fe4945eb6ad.1651228001.git.qemu_oss@crudebyte.com>
2022-05-019pfs: fix removing non-existent POSIX ACL xattr on macOS hostChristian Schoenebeck
When mapped POSIX ACL is used, we are ignoring errors when trying to remove a POSIX ACL xattr that does not exist. On Linux hosts we would get ENODATA in such cases, on macOS hosts however we get ENOATTR instead. As we can be sure that ENOATTR is defined as being identical on Linux hosts (at least by qemu/xattr.h), it is safe to fix this issue by simply comparing against ENOATTR instead of ENODATA. This patch fixes e.g. a command on Linux guest like: cp --preserve=mode old new Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Link: https://lore.kernel.org/qemu-devel/2866993.yOYK24bMf6@silver/ Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@gmail.com> Message-Id: <34f81e9bffd7a3e65fb7aab5b56c107bd0aac960.1651228001.git.qemu_oss@crudebyte.com>
2022-05-019pfs: fix wrong errno being sent to Linux client on macOS hostChristian Schoenebeck
Linux and macOS only share some errno definitions with equal macro name and value. In fact most mappings for errno are completely different on the two systems. This patch converts some important errno values from macOS host to corresponding Linux errno values before eventually sending such error codes along with 'Rlerror' replies (if 9p2000.L is used that is). Not having translated errnos before violated the 9p2000.L protocol spec, which says: " size[4] Rlerror tag[2] ecode[4] ... ecode is a numerical Linux errno. " https://github.com/chaos/diod/wiki/protocol#lerror----return-error-code This patch fixes a bunch of misbehaviours when running a Linux client on macOS host. For instance this patch fixes: mount -t 9p -o posixacl ... on Linux guest if security_mode=mapped was used for 9p server, which refused to mount successfully, because macOS returned ENOATTR==93 when client tried to retrieve POSIX ACL xattrs, because errno 93 is defined as EPROTONOSUPPORT==93 on Linux, so Linux client believed that xattrs were not supported by filesystem on host in general. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Link: https://lore.kernel.org/qemu-devel/20220421124835.3e664669@bahia/ Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@gmail.com> Message-Id: <b322ab298a62069e527d2b032028bdc9115afacd.1651228001.git.qemu_oss@crudebyte.com>
2022-05-019pfs: fix wrong encoding of rdev field in Rgetattr on macOSChristian Schoenebeck
The 'rdev' field in 9p reponse 'Rgetattr' is of type dev_t, which is actually a system dependant type and therefore both the size and encoding of dev_t differ between macOS and Linux. So far we have sent 'rdev' to guest in host's dev_t format as-is, which caused devices to appear with wrong device numbers on guests running on macOS hosts, eventually leading to various misbehaviours on guest in conjunction with device files. This patch fixes this issue by converting the device number from host's dev_t format to Linux dev_t format. As 9p request 'Tgettattr' is exclusive to protocol version 9p2000.L, it should be fair to assume that 'rdev' field is assumed to be in Linux dev_t format by client as well. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Link: https://lore.kernel.org/qemu-devel/20220421093056.5ab1e7ed@bahia/ Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@gmail.com> Message-Id: <b3a430c2c382ba69a7405e04c0b090ab0d86f17e.1651228001.git.qemu_oss@crudebyte.com>
2022-05-019pfs: fix qemu_mknodat(S_IFSOCK) on macOSChristian Schoenebeck
mknod() on macOS does not support creating sockets, so divert to call sequence socket(), bind() and fchmodat() respectively if S_IFSOCK was passed with mode argument. Link: https://lore.kernel.org/qemu-devel/17933734.zYzKuhC07K@silver/ Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@gmail.com> Message-Id: <2e7b5ecd7a6d83a538db4e8a22d8fb03e9e0f06e.1651228001.git.qemu_oss@crudebyte.com> [C.S. - Use AT_SYMLINK_NOFOLLOW instead of AT_SYMLINK_NOFOLLOW_ANY. ] Link: https://lore.kernel.org/qemu-devel/3704033.BMyLRrx2Jx@silver/
2022-04-309pfs: fix qemu_mknodat(S_IFREG) on macOSChristian Schoenebeck
mknod() on macOS does not support creating regular files, so divert to openat_file() if S_IFREG is passed with mode argument. Furthermore, 'man 2 mknodat' on Linux says: "Zero file type is equivalent to type S_IFREG". Link: https://lore.kernel.org/qemu-devel/17933734.zYzKuhC07K@silver/ Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Will Cohen <wwcohen@gmail.com> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Akihiko Odaki <akihiko.odaki@gmail.com> Message-Id: <3102ca936f88bc1f79d2a325e5bc68f48f54e6e3.1651228000.git.qemu_oss@crudebyte.com>
2022-04-309pfs: fix inode sequencing in 'synth' driverChristian Schoenebeck
The 'synth' driver's root node and the 'synth' driver's first subdirectory node falsely share the same inode number (zero), which makes it impossible for 9p clients (i.e. 9p test cases) to distinguish root node and first subdirectory from each other by comparing their QIDs (which are derived by 9p server from driver's inode numbers). Fix this issue by using prefix-increment instead of postfix-increment operator while generating new inode numbers for subdirectories and files. Link: https://lore.kernel.org/qemu-devel/3859307.hTDP4D0zbi@silver/ Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <E1nTpyU-0000yR-9o@lizzy.crudebyte.com>
2022-04-29hw/riscv: Enable TPM backendsAlistair Francis
Imply the TPM sysbus devices. This allows users to add TPM devices to the RISC-V virt board. This was tested by first creating an emulated TPM device: swtpm socket --tpm2 -t -d --tpmstate dir=/tmp/tpm \ --ctrl type=unixio,path=swtpm-sock Then launching QEMU with: -chardev socket,id=chrtpm,path=swtpm-sock \ -tpmdev emulator,id=tpm0,chardev=chrtpm \ -device tpm-tis-device,tpmdev=tpm0 The TPM device can be seen in the memory tree and the generated device tree. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/942 Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-Id: <20220427234146.1130752-7-alistair.francis@opensource.wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-04-29hw/riscv: virt: Add device plug supportAlistair Francis
Add support for plugging in devices, this was tested with the TPM device. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-Id: <20220427234146.1130752-6-alistair.francis@opensource.wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-04-29hw/riscv: virt: Add support for generating platform FDT entriesAlistair Francis
Similar to the ARM virt machine add support for adding device tree entries for dynamically created devices. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Message-Id: <20220427234146.1130752-5-alistair.francis@opensource.wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-04-29hw/riscv: virt: Create a platform busAlistair Francis
Create a platform bus to allow dynamic devices to be connected. This is based on the ARM implementation. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-Id: <20220427234146.1130752-4-alistair.francis@opensource.wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-04-29hw/core: Move the ARM sysbus-fdt to coreAlistair Francis
The ARM virt machine currently uses sysbus-fdt to create device tree entries for dynamically created MMIO devices. The RISC-V virt machine can also benefit from this, so move the code to the core directory. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-Id: <20220427234146.1130752-3-alistair.francis@opensource.wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-04-29hw/riscv: virt: Add a machine done notifierAlistair Francis
Move the binary and device tree loading code to the machine done notifier. This allows us to prepare for editing the device tree as part of the notifier. This is based on similar code in the ARM virt machine. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-Id: <20220427234146.1130752-2-alistair.francis@opensource.wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-04-29hw/riscv: Don't add empty bootargs to device treeBin Meng
Commit 7c28f4da20e5 ("RISC-V: Don't add NULL bootargs to device-tree") tried to avoid adding *NULL* bootargs to device tree, but unfortunately the changes were entirely useless, due to MachineState::kernel_cmdline can't be NULL at all as the default value is given as an empty string. (see hw/core/machine.c::machine_initfn()). Note the wording of *NULL* bootargs is wrong. It can't be NULL otherwise a segfault had already been observed by dereferencing the NULL pointer. It should be worded as *empty" bootargs. Fixes: 7c28f4da20e5 ("RISC-V: Don't add NULL bootargs to device-tree") Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20220421055629.1177285-2-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2022-04-29hw/riscv: spike: Add '/chosen/stdout-path' in device tree unconditionallyBin Meng
At present the adding '/chosen/stdout-path' property in device tree is determined by whether a kernel command line is provided, which is wrong. It should be added unconditionally. Fixes: 8d8897accb1c ("hw/riscv: spike: Allow using binary firmware as bios") Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20220421055629.1177285-1-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
generated by cgit v1.2.3 (git 2.26.2) at 2025-01-10 15:58:32 +0000