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2020-10-27hw/arm/bcm2836: Introduce BCM283XClass::core_countPhilippe Mathieu-Daudé
The BCM2835 has only one core. Introduce the core_count field to be able to use values different than BCM283X_NCPUS (4). Reviewed-by: Luc Michel <luc.michel@greensocs.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201024170127.3592182-4-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-27hw/arm/bcm2836: QOM'ify more by adding class_init() to each SoC typePhilippe Mathieu-Daudé
Remove usage of TypeInfo::class_data. Instead fill the fields in the corresponding class_init(). So far all children use the same values for almost all fields, but we are going to add the BCM2711/BCM2838 SoC for the raspi4 machine which use different fields. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201024170127.3592182-3-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-27hw/arm/bcm2836: Restrict BCM283XInfo declaration to C sourcePhilippe Mathieu-Daudé
No code out of bcm2836.c uses (or requires) the BCM283XInfo declarations. Move it locally to the C source file. Reviewed-by: Luc Michel <luc.michel@greensocs.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201024170127.3592182-2-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-27hw/arm/smmuv3: Set the restoration priority of the vSMMUv3 explicitlyZenghui Yu
Ensure the vSMMUv3 will be restored before all PCIe devices so that DMA translation can work properly during migration. Signed-off-by: Zenghui Yu <yuzenghui@huawei.com> Message-id: 20201019091508.197-1-yuzenghui@huawei.com Acked-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-27hw/gpio: Add GPIO model for Nuvoton NPCM7xxHavard Skinnemoen
The NPCM7xx chips have multiple GPIO controllers that are mostly identical except for some minor differences like the reset values of some registers. Each controller controls up to 32 pins. Each individual pin is modeled as a pair of unnamed GPIOs -- one for emitting the actual pin state, and one for driving the pin externally. Like the nRF51 GPIO controller, a gpio level may be negative, which means the pin is not driven, or floating. Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-27hw/arm/npcm7xx: Add EHCI and OHCI controllersHavard Skinnemoen
The NPCM730 and NPCM750 chips have a single USB host port shared between a USB 2.0 EHCI host controller and a USB 1.1 OHCI host controller. This adds support for both of them. Testing notes: * With -device usb-kbd, qemu will automatically insert a full-speed hub, and the keyboard becomes controlled by the OHCI controller. * With -device usb-kbd,bus=usb-bus.0,port=1, the keyboard is directly attached to the port without any hubs, and the device becomes controlled by the EHCI controller since it's high speed capable. * With -device usb-kbd,bus=usb-bus.0,port=1,usb_version=1, the keyboard is directly attached to the port, but it only advertises itself as full-speed capable, so it becomes controlled by the OHCI controller. In all cases, the keyboard device enumerates correctly. Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-27hw/misc: Add npcm7xx random number generatorHavard Skinnemoen
The RNG module returns a byte of randomness when the Data Valid bit is set. This implementation ignores the prescaler setting, and loads a new value into RNGD every time RNGCS is read while the RNG is enabled and random data is available. A qtest featuring some simple randomness tests is included. Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-27hw/timer: Adding watchdog for NPCM7XX Timer.Hao Wu
The watchdog is part of NPCM7XX's timer module. Its behavior is controlled by the WTCR register in the timer. When enabled, the watchdog issues an interrupt signal after a pre-set amount of cycles, and issues a reset signal shortly after that. Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: deleted blank line at end of npcm_watchdog_timer-test.c] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-27Move npcm7xx_timer_reached_zero call out of npcm7xx_timer_pauseHavard Skinnemoen
This allows us to reuse npcm7xx_timer_pause for the watchdog timer. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-27hw/arm: fix min_cpus for xlnx-versal-virt platformPavel Dovgalyuk
This patch sets min_cpus field for xlnx-versal-virt platform, because it always creates XLNX_VERSAL_NR_ACPUS cpus even with -smp 1 command line option. Signed-off-by: Pavel Dovgalyuk <pavel.dovgalyuk@ispras.ru> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 160343854912.8460.17915238517799132371.stgit@pasha-ThinkPad-X280 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-27hw/arm/highbank: Silence warnings about missing fallthrough statementsThomas Huth
When compiling with -Werror=implicit-fallthrough, gcc complains about missing fallthrough annotations in this file. Looking at the code, the fallthrough is very likely intended here, so add some comments to silence the compiler warnings. Signed-off-by: Thomas Huth <thuth@redhat.com> Message-id: 20201020105938.23209-1-thuth@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-27hw/block/nvme: fix queue identifer validationGollu Appalanaidu
The nvme_check_{sq,cq} functions check if the given queue identifer is valid *and* that the queue exists. Thus, the function return value cannot simply be inverted to check if the identifer is valid and that the queue does *not* exist. Replace the call with an OR'ed version of the checks. Signed-off-by: Gollu Appalanaidu <anaidu.gollu@samsung.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
2020-10-27hw/block/nvme: fix create IO SQ/CQ status codesGollu Appalanaidu
Replace the Invalid Field in Command with the Invalid PRP Offset status code in the nvme_create_{cq,sq} functions. Also, allow PRP1 to be address 0x0. Also replace the Completion Queue Invalid status code returned in nvme_create_cq when the the queue identifier is invalid with the Invalid Queue Identifier. The Completion Queue Invalid status code is exclusively for indicating that the completion queue identifer given when creating a submission queue is invalid. See NVM Express v1.3d, Section 5.3 ("Create I/O Completion Queue command") and 5.4("Create I/O Submission Queue command"). Signed-off-by: Gollu Appalanaidu <anaidu.gollu@samsung.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
2020-10-27hw/block/nvme: fix prp mapping status codesGollu Appalanaidu
Address 0 is not an invalid address. Remove those invalikd checks. Unaligned PRP2 and PRP list entries should result in Invalid PRP Offset status code and not Invalid Field. Fix that. See NVMe Express v1.3d, Section 4.3 ("Physical Region Page Entry and List"). Suggested-by: Keith Busch <kbusch@kernel.org> Signed-off-by: Gollu Appalanaidu <anaidu.gollu@samsung.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
2020-10-27hw/block/nvme: report actual LBA data shift in LBAFDmitry Fomichev
Calculate the data shift value to report based on the set value of logical_block_size device property. In the process, use a local variable to calculate the LBA format index instead of the hardcoded value 0. This makes the code more readable and it will make it easier to add support for multiple LBA formats in the future. Signed-off-by: Dmitry Fomichev <dmitry.fomichev@wdc.com> Signed-off-by: Keith Busch <kbusch@kernel.org> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2020-10-27hw/block/nvme: add trace event for requests with non-zero status codeKlaus Jensen
If a command results in a non-zero status code, trace it. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-10-27hw/block/nvme: add nsid to get/setfeat trace eventsKlaus Jensen
Include the namespace id in the pci_nvme_{get,set}feat trace events. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-10-27hw/block/nvme: reject io commands if only admin command set selectedKlaus Jensen
If the host sets CC.CSS to 111b, all commands submitted to I/O queues should be completed with status Invalid Command Opcode. Note that this is technically a v1.4 feature, but it does not hurt to implement before we finally bump the reported version implemented. Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Signed-off-by: Keith Busch <kbusch@kernel.org>
2020-10-27hw/block/nvme: support for admin-only command setKeith Busch
Signed-off-by: Keith Busch <kbusch@kernel.org> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2020-10-27hw/block/nvme: validate command set selectedKeith Busch
Fail to start the controller if the user requests a command set that the controller does not support. Signed-off-by: Keith Busch <kbusch@kernel.org> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2020-10-27hw/block/nvme: support per-namespace smart logKeith Busch
Let the user specify a specific namespace if they want to get access stats for a specific namespace. Signed-off-by: Keith Busch <kbusch@kernel.org> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2020-10-27hw/block/nvme: fix log page offset checkKeith Busch
Return error if the requested offset starts after the size of the log being returned. Also, move the check for earlier in the function so we're not doing unnecessary calculations. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed- by: Dmitry Fomichev <dmitry.fomichev@wdc.com> Signed-off-by: Keith Busch <kbusch@kernel.org> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2020-10-27hw/block/nvme: remove pointless rw indirectionKeith Busch
The code switches on the opcode to invoke a function specific to that opcode. There's no point in consolidating back to a common function that just switches on that same opcode without any actual common code. Restore the opcode specific behavior without going back through another level of switches. Signed-off-by: Keith Busch <kbusch@kernel.org> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
2020-10-27hw/block/nvme: update nsid when registeredKlaus Jensen
If the user does not specify an nsid parameter on the nvme-ns device, nvme_register_namespace will find the first free namespace id and assign that. This fix makes sure the assigned id is saved. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Dmitry Fomichev <dmitry.fomichev@wdc.com>
2020-10-27hw/block/nvme: change controller pci idKlaus Jensen
There are two reasons for changing this: 1. The nvme device currently uses an internal Intel device id. 2. Since commits "nvme: fix write zeroes offset and count" and "nvme: support multiple namespaces" the controller device no longer has the quirks that the Linux kernel think it has. As the quirks are applied based on pci vendor and device id, change them to get rid of the quirks. To keep backward compatibility, add a new 'use-intel-id' parameter to the nvme device to force use of the Intel vendor and device id. This is off by default but add a compat property to set this for 5.1 machines and older. If a 5.1 machine is booted (or the use-intel-id parameter is explicitly set to true), the Linux kernel will just apply these unnecessary quirks: 1. NVME_QUIRK_IDENTIFY_CNS which says that the device does not support anything else than values 0x0 and 0x1 for CNS (Identify Namespace and Identify Namespace). With multiple namespace support, this just means that the kernel will "scan" namespaces instead of using "Active Namespace ID list" (CNS 0x2). 2. NVME_QUIRK_DISABLE_WRITE_ZEROES. The nvme device started out with a broken Write Zeroes implementation which has since been fixed in commit 9d6459d21a6e ("nvme: fix write zeroes offset and count"). Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Keith Busch <kbusch@kernel.org> Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
2020-10-27hw/block/nvme: support multiple namespacesKlaus Jensen
This adds support for multiple namespaces by introducing a new 'nvme-ns' device model. The nvme device creates a bus named from the device name ('id'). The nvme-ns devices then connect to this and registers themselves with the nvme device. This changes how an nvme device is created. Example with two namespaces: -drive file=nvme0n1.img,if=none,id=disk1 -drive file=nvme0n2.img,if=none,id=disk2 -device nvme,serial=deadbeef,id=nvme0 -device nvme-ns,drive=disk1,bus=nvme0,nsid=1 -device nvme-ns,drive=disk2,bus=nvme0,nsid=2 The drive property is kept on the nvme device to keep the change backward compatible, but the property is now optional. Specifying a drive for the nvme device will always create the namespace with nsid 1. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Keith Busch <kbusch@kernel.org> Reviewed-by: Minwoo Im <minwoo.im.dev@gmail.com>
2020-10-27hw/block/nvme: refactor identify active namespace id listKlaus Jensen
Prepare to support inactive namespaces. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
2020-10-27hw/block/nvme: add support for sgl bit bucket descriptorGollu Appalanaidu
This adds support for SGL descriptor type 0x1 (bit bucket descriptor). See the NVM Express v1.3d specification, Section 4.4 ("Scatter Gather List (SGL)"). Signed-off-by: Gollu Appalanaidu <anaidu.gollu@samsung.com> Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
2020-10-27hw/block/nvme: add support for scatter gather listsKlaus Jensen
For now, support the Data Block, Segment and Last Segment descriptor types. See NVM Express 1.3d, Section 4.4 ("Scatter Gather List (SGL)"). Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
2020-10-27hw/block/nvme: harden cmb accessKlaus Jensen
Since the controller has only supported PRPs so far it has not been required to check the ending address (addr + len - 1) of the CMB access for validity since it has been guaranteed to be in range of the CMB. This changes when the controller adds support for SGLs (next patch), so add that check. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
2020-10-27hw/block/nvme: default request status to successKlaus Jensen
Make the default request status NVME_SUCCESS so only error status codes have to be set. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
2020-10-27hw/block/nvme: refactor aio submissionKlaus Jensen
This pulls block layer aio submission/completion to common functions. For completions, additionally map an AIO error to the Unrecovered Read and Write Fault status codes. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
2020-10-27hw/block/nvme: add symbolic command name to trace eventsKlaus Jensen
Add the symbolic command name to the pci_nvme_{io,admin}_cmd and pci_nvme_rw trace events. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
2020-10-27hw/block/nvme: fix endian conversionKlaus Jensen
The raw NLB field is a 16 bit value, so use le16_to_cpu instead of le32_to_cpu and cast to uint32_t before incrementing the value to not wrap around. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Keith Busch <kbusch@kernel.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-10-27hw/block/nvme: add a lba to bytes helperKlaus Jensen
Add the nvme_l2b helper and use it for converting NLB and SLBA to byte counts and offsets. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
2020-10-27hw/block/nvme: alignment style fixesKlaus Jensen
Style fixes. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
2020-10-27hw/block/nvme: commonize nvme_rw error handlingKlaus Jensen
Move common error handling to a label. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
2020-10-27hw/block/nvme: handle dma errorsKlaus Jensen
Handling DMA errors gracefully is required for the device to pass the block/011 test ("disable PCI device while doing I/O") in the blktests suite. With this patch the device sets the Controller Fatal Status bit in the CSTS register when failing to read from a submission queue or writing to a completion queue; expecting the host to reset the controller. If DMA errors occur at any other point in the execution of the command (say, while mapping the PRPs), the command is aborted with a Data Transfer Error status code. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
2020-10-27hw/block/nvme: fix typo in trace eventKlaus Jensen
Fix a typo in the sq doorbell trace event. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Keith Busch <kbusch@kernel.org>
2020-10-27hw/timer/sh_timer: Remove superfluous "break" statementsThomas Huth
hw_error() is marked as QEMU_NORETURN, so the "break" statements after this function are just dead code. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201020153935.54315-4-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-10-27hw/timer/sh_timer: Silence warnings about missing fallthrough statementsThomas Huth
When compiling with -Werror=implicit-fallthrough, gcc complains about missing fallthrough annotations in this file. Looking at the code, the fallthrough is very likely intended here, so add some comments to silence the compiler warnings. Fixes: cd1a3f6840e ("Stand-alone TMU emulation code") Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201020153935.54315-3-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-10-27hw/timer/sh_timer: Coding style clean-upThomas Huth
Replace TAB characters with spaces, put code after case-statement on separate lines and add some curly braces in related lines to keep checkpatch.pl happy. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201020153935.54315-2-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-10-26Merge remote-tracking branch 'remotes/philmd-gitlab/tags/sd-next-20201026' ↵Peter Maydell
into staging SD/MMC patches - Fix a bug in CMD6/SWITCH_FUNCTION (Bin Meng) - Minor housekeeping patches CI jobs result: . https://cirrus-ci.com/build/5461987880599552 . https://gitlab.com/philmd/qemu/-/pipelines/207532287 . https://travis-ci.org/github/philmd/qemu/builds/738901111 . https://app.shippable.com/github/philmd/qemu/runs/888/summary/console # gpg: Signature made Mon 26 Oct 2020 11:02:22 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/sd-next-20201026: hw/sd/sdcard: Zero out function selection fields before being populated hw/sd/sdcard: Make iolen unsigned hw/sd/sdcard: Constify sd_crc*()'s message argument hw/sd/sdcard: Simplify cmd_valid_while_locked() hw/sd/sdcard: Update the SDState documentation Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-26Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ↵Peter Maydell
staging * fix --disable-tcg builds (Claudio) * Fixes for macOS --enable-modules build and OpenBSD curses/iconv detection (myself) * Start preparing for meson 0.56 (myself) * Move directory configuration to meson (myself) * Start untangling qemu_init (myself) * Windows fixes (Sunil) * Remove -no-kbm (Thomas) # gpg: Signature made Mon 26 Oct 2020 11:12:17 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: machine: move SMP initialization from vl.c machine: move UP defaults to class_base_init machine: remove deprecated -machine enforce-config-section option win32: boot broken when bind & data dir are the same WHPX: Fix WHPX build break configure: move install_blobs from configure to meson configure: remove unused variable from config-host.mak configure: move directory options from config-host.mak to meson configure: allow configuring localedir Makefile: separate meson rerun from the rest of the ninja invocation Remove deprecated -no-kvm option replay: do not build if TCG is not available qtest: unbreak non-TCG builds in bios-tables-test hw/core/qdev-clock: add a reference on aliased clocks do not use colons in test names meson: rewrite curses/iconv test build: fix macOS --enable-modules build Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-26Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20201026' into stagingPeter Maydell
some s390x fixes # gpg: Signature made Mon 26 Oct 2020 10:46:50 GMT # gpg: using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02FAF # gpg: issuer "cohuck@redhat.com" # gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" [unknown] # gpg: aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" [full] # gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>" [full] # gpg: aka "Cornelia Huck <cohuck@kernel.org>" [unknown] # gpg: aka "Cornelia Huck <cohuck@redhat.com>" [unknown] # Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF * remotes/cohuck/tags/s390x-20201026: s390x: pv: Fix diag318 PV fencing s390x: pv: Remove sclp boundary checks s390x/s390-virtio-ccw: Reset PCI devices during subsystem reset Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-26hw/arm/tosa: Replace fprintf() calls by LED devicesPhilippe Mathieu-Daudé
The recently added LED device reports LED status changes with the 'led_set_intensity' trace event. It is less invasive than the fprintf() calls. We need however to have a binary built with tracing support. Reviewed-by: Luc Michel <luc.michel@greensocs.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200912134041.946260-8-f4bug@amsat.org>
2020-10-26hw/misc/mps2-scc: Use the LED devicePhilippe Mathieu-Daudé
Per the 'ARM MPS2 and MPS2+ FPGA Prototyping Boards Technical Reference Manual' (100112_0200_07_en): 2.1 Overview of the MPS2 and MPS2+ hardware The MPS2 and MPS2+ FPGA Prototyping Boards contain the following components and interfaces: * User switches and user LEDs: - Two green LEDs and two push buttons that connect to the FPGA. - Eight green LEDs and one 8-way dip switch that connect to the MCC. Add the 8 LEDs connected to the MCC. This replaces the 'mps2_scc_leds' trace events by the generic 'led_set_intensity' event. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-Id: <20200912134041.946260-7-f4bug@amsat.org>
2020-10-26hw/misc/mps2-fpgaio: Use the LED devicePhilippe Mathieu-Daudé
Per the 'ARM MPS2 and MPS2+ FPGA Prototyping Boards Technical Reference Manual' (100112_0200_07_en): 2.1 Overview of the MPS2 and MPS2+ hardware The MPS2 and MPS2+ FPGA Prototyping Boards contain the following components and interfaces: * User switches and user LEDs: - Two green LEDs and two push buttons that connect to the FPGA. - Eight green LEDs and one 8-way dip switch that connect to the MCC. Add the 2 LEDs connected to the FPGA. This replaces the 'mps2_fpgaio_leds' trace events by the generic 'led_set_intensity' event. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-Id: <20200912134041.946260-6-f4bug@amsat.org>
2020-10-26hw/arm/aspeed: Add the 3 front LEDs drived by the PCA9552 #1Philippe Mathieu-Daudé
The Witherspoon has 3 LEDs connected to a PCA9552. Add them. The names and reset values are taken from: https://github.com/open-power/witherspoon-xml/blob/master/witherspoon.xml Example booting obmc-phosphor-image: $ qemu-system-arm -M witherspoon-bmc -trace led_change_intensity 1592693373.997015:led_change_intensity LED desc:'front-fault-4' color:green intensity 0% -> 100% 1592693373.997632:led_change_intensity LED desc:'front-power-3' color:green intensity 0% -> 100% 1592693373.998239:led_change_intensity LED desc:'front-id-5' color:green intensity 0% -> 100% 1592693500.291805:led_change_intensity LED desc:'front-power-3' color:green intensity 100% -> 0% 1592693500.312041:led_change_intensity LED desc:'front-power-3' color:green intensity 0% -> 100% 1592693500.821254:led_change_intensity LED desc:'front-power-3' color:green intensity 100% -> 0% 1592693501.331517:led_change_intensity LED desc:'front-power-3' color:green intensity 0% -> 100% 1592693501.841367:led_change_intensity LED desc:'front-power-3' color:green intensity 100% -> 0% 1592693502.350839:led_change_intensity LED desc:'front-power-3' color:green intensity 0% -> 100% 1592693502.861134:led_change_intensity LED desc:'front-power-3' color:green intensity 100% -> 0% 1592693503.371090:led_change_intensity LED desc:'front-power-3' color:green intensity 0% -> 100% We notice the front-power LED starts to blink at a ~2Hz rate. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20200912134041.946260-5-f4bug@amsat.org>
2020-10-26hw/misc/led: Emit a trace event when LED intensity has changedPhilippe Mathieu-Daudé
Track the LED intensity, and emit a trace event when it changes. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200912134041.946260-4-f4bug@amsat.org>