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2011-03-10vmstate: add VMSTATE_STRUCT_VARRAY_INT32Juan Quintela
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-03-10vmstate: add UINT32 VARRAYSJuan Quintela
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-03-10vmstate: Fix varrays with uint8 indexesJuan Quintela
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-03-10vmstate: add VMSTATE_UINT32_EQUALJuan Quintela
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-03-10xilinx-ethlite: Simplify byteswapping to/from bramsEdgar E. Iglesias
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
2011-03-10mainstone: PCMCIA supportDmitry Eremin-Solenikov
Extend mst_fpga and mainstone with logic to support PCMCIA attachment (IRQs, status regs). Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-03-10mainstone: use gpio 0 for connection of FPGA instead of hooking into PIC ↵Dmitry Eremin-Solenikov
directly Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-03-10pxa2xx_timer: Get rid of .level in PXA2xxTimer0.Andrzej Zaborowski
2011-03-10pxa2xx_pic: fixup initialisationAndrzej Zaborowski
This is based on Dmitry Eremin-Solenikov's patch but simplified.
2011-03-10pxa2xx_timer: separate irq for pxa27x handlingDmitry Eremin-Solenikov
First, sysbus_init_irq shan't be called on on-stack variables. Indeed, it only stores a passed pointer in qdev and the stored irq is later populated, so we get a nice write-to-stack bug. Second, irq for pxa27x should probably be handled in a more gentler way, as we should check if we have events to raise this irq. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-03-07lm32: EVR32 and uclinux BSPMichael Walle
This patch adds support for the following two BSPs: - LM32 EVR32 BSP (as used by RTEMS) - uclinux BSP by Theobroma Systems Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07lm32: support for creating device treeMichael Walle
This patch adds helper functions to create a ROM, which contains a hardware description of a board. This is used in Theobromas LM32 Linux port. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07lm32: system control modelMichael Walle
This patch add support for a system control block. It is supposed to act as helper for the emulated program. E.g. shutting down the VM or printing test results. This model is intended for testing purposes only and doesn't fit to any real hardware. Therefore, it is not added to any board by default. Instead a user has to add it explicitly with the '-device' commandline parameter. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07lm32: uart modelMichael Walle
This patch add support for the LatticeMico32 UART. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07lm32: timer modelMichael Walle
This patch adds support for the LatticeMico32 system timer. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07lm32: pic and juart helper functionsMichael Walle
This patch adds init functions for the PIC and JTAG UART commonly used in the board initialization. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07lm32: juart modelMichael Walle
This patch adds the JTAG UART model. It is accessed through special control registers and opcodes. Therefore the translation uses callbacks to this model. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07lm32: interrupt controller modelMichael Walle
This patch adds the interrupt controller of the lm32. Because the PIC is accessed through special control registers and opcodes, there are callbacks from the lm32 translation code to this model. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-06target-arm: Integrate secondary CPU reset in arm_bootAdam Lackorzynski
Integrate secondary CPU reset into arm_boot, removing it from realview.c. On non-Linux systems secondary CPUs start with the same entry as the boot CPU. Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06target-arm: Fix soft interrupt in GIC distributorAdam Lackorzynski
Fix selection of target list filter mode. Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06gt64xxx: remove savevm supportJuan Quintela
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06vmstate: remove uninorth savevm codeJuan Quintela
It was migrating the wrong structures, no way it would work Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06vmstate: remove grackle_pci savevm codeJuan Quintela
It was migrating the wrong structures, no way it would work Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06hw/sd.c: fix sd_set_cb() crash when bdrv == NULLAurelien Jarno
sd_set_cb() calls bdrv_is_read_only() and bdrv_is_inserted() even if no block driver is associated with the card reader. This patch fixes the issues by not setting the irq in this case, this fixes ARM versatile crash. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06hw/realview: Wire up the MMC card statusPeter Maydell
Instantiate the three PL061 GPIO modules the realview boards have. Connect the MMC card status outputs of the PL181 MMC controller to both the system registers and the GPIO module which handles internal devices. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06hw/irq: Add qemu_irq_split() so one GPIO output can feed two inputsPeter Maydell
Add a qemu_irq_split() function which allows a board to wire a single GPIO output up to two GPIO inputs. This is needed for realview boards, where the MMC card status is visible both in a system register and via a PL061 GPIO module. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06hw/pl061.c: Implement ARM PL061 as well as Luminary onePeter Maydell
ARM's PL061 has a different set of ID registers to the one in the Luminary Stellaris; implement this so that the Linux driver can identify the Realview PBX PL061 correctly. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06hw/arm_sysctl.c: Wire MCI register MMC card status bits to GPIO inputsPeter Maydell
Implement some GPIO inputs which a board can connect up to set the MMC card status bits in the MCI register. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06hw/pl181: Implement GPIO output pins for card statusPeter Maydell
Add two GPIO output pins to the PL181 model to indicate the card present and readonly status information. On ARM boards these usually are reflected in a system register. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-06lsi53c895a: Update dnad when skipping MSGOUT bytesStefan Hajnoczi
Update not only dbc but also dnad when skipping bytes during the MSGOUT phase. Previously only dbc was updated which is probably wrong and could lead to bogus message codes being read. Tested on Linux and Windows Server 2003. Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-05hw/pcnet.c: Fix EPROM contents to suit AMD netware driversGerhard Wiesinger
bugfix under DOS for AMD netware driver: AMD PCNTNW Ethernet MLID v3.10 (960115), network card not found bugfix works well under DOS with: 1.) AMD NDIS driver v2.0.1 2.) AMD PCNTNW Ethernet MLID v3.10 (960115) 3.) Knoppix 6.2 Signed-off-by: Gerhard Wiesinger <lists@wiesinger.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-03-03virtio-net: Fix lduw_p() pointer argument of wrong sizeStefan Hajnoczi
A pointer to a size_t variable was passed as the void * pointer to lduw_p() in virtio_net_receive(). Instead of acting on the 16-bit value this caused failure on big-endian hosts. Avoid this issue in the future by using stw_p() instead. In general we should use ld*_p() for loading from target memory and st*_p() for storing to target memory anyway, not the other way around. Also tighten up a correct use of lduw_p() when stw_p() should be used instead in virtio_net_get_config(). Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-03pxa2xx: port pxa2xx_rtc to using qdev/vmstateAndrzej Zaborowski
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-03-03pxa2xx_dma: Get rid of a forward declaration.Andrzej Zaborowski
2011-03-03pxa2xx_dma: port to qdev/vmstateAndrzej Zaborowski
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-03-03vmstate: move VMSTATE_PCIE_AER_ERRS to hw/hw.hDmitry Eremin-Solenikov
VMSTATE_PCIE_AER_ERRS is indeed useful for other emulation drivers. Move it to hw/hw.h under the name of VMSTATE_STRUCT_VARRAY_POINTER_UINT16. Also add VMSTATE_STRUCT_VARRAY_POINTER_INT32 which is more or less the same as _UINT16 macro, except the fact it uses int32_t internally. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-03-03pxa2xx_dma: drop unused pxa2xx_dma_handler_t/handler fieldDmitry Eremin-Solenikov
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-03-03pxa2xx_timer: Store relevant irq line in each timer.Andrzej Zaborowski
2011-03-03pxa2xx_timer: switch to using qdev/vmstateDmitry Eremin-Solenikov
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-03-03pxa2xx_timer: change info struct name to comply with guidelinesDmitry Eremin-Solenikov
It should be PXA2xxTimerInfo, not pxa2xx_timer_info. Replace all occurences of old name with the new one. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-03-03pxa2xx_pic: Set base address for sysbus device.Andrzej Zaborowski
Thid device's registration was broken since e1f8c729fa890c67bb4532f22c22ace6fb0e1aaf, this should fix it.
2011-03-03vmstate: add VMSTATE_STRUCT_ARRAY_TESTDmitry Eremin-Solenikov
This is a _TEST variant of VMSTATE_STRUCT_ARRAY, necessary e.g. for future patch changing pxa2xx_timer to use vmstate. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-02-25pxa2xx_pic: update to use qdevDmitry Eremin-Solenikov
Use qdev/sysbus framework to handle pxa2xx-pic. Instead of exposing IRQs via array, reference them via qdev_get_gpio_in(). Patch has been modified by the committer. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-02-25mst_fpga: correct irq level settingsDmitry Eremin-Solenikov
Final corrections for IRQ levels that are set by mst_fpga: * Don't retranslate IRQ if previously IRQ was masked. * After setting or clearing IRQs through register, apply mask before setting parent IRQ level. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-02-24virtio-serial: kill VirtIOSerialDeviceGerd Hoffmann
VirtIOSerialDevice is like VirtIOSerialPort with just the first two fields, which makes it pretty pointless. Using VirtIOSerialPort directly works equally well and is less confusing. [Amit: - rebase - rename 'dev' to 'port' in function params in virtio-serial.h ] Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Amit Shah <amit.shah@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-02-24hw/sd.c: Add missing state change for SD_STATUS, SEND_NUM_WR_BLOCKSPeter Maydell
The SD_STATUS and SEND_NUM_WR_BLOCKS commands are supposed to cause the card to send data back to the host. However sd.c was missing the state change to sd_sendingdata_state for these commands, with the effect that the Linux driver would either hang indefinitely waiting for nonexistent data (pl181) or read zeroes and provoke a qemu warning message (omap). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-23pls3adsp1800: Base load_elf endianness on target endiannessEdgar E. Iglesias
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
2011-02-21hw/irq.h: Remove unused SetIRQFunc typedefPeter Maydell
Remove the typedef SetIRQFunc, as it is not used by anything. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-21Revert "prep: Disable second IDE channel, as long as ISA IDE emulation ↵Aurelien Jarno
doesn't support same irq for both channels" This reverts commit 491e2a338fdf8310c84f6ebaed1683a871a0700e.
2011-02-21isa-bus: Remove bogus IRQ sharing checkJan Kiszka
Nothing prevented IRQ sharing on the ISA bus in principle. Not all boards supported this, neither each and every card nor driver and OS. Still, there existed valid IRQ sharing scenarios, (at least) two of them can also be found in QEMU: >2 PC UARTs and the PREP IDE buses. So remove this artificial restriction from our ISA model. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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