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2018-06-12spapr: move lookup of the node into spapr_memory_plug()David Hildenbrand
Let's clean the hotplug handler up by moving lookup of the node into the function where it is actually being used. Signed-off-by: David Hildenbrand <david@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-12spapr: no need to verify the nodeDavid Hildenbrand
The node property can always be queried and the value has already been verified in pc_dimm_realize(). Acked-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Hildenbrand <david@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-12ppc4xx_i2c: Clean up and improve error loggingBALATON Zoltan
Make it more readable by converting register indexes to decimal (avoids lot of superfluous 0x0) and distinguish errors caused by accessing non-existent vs. unimplemented registers. No functional change. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-12mos6522: convert VMSTATE_TIMER_PTR_TEST to VMSTATE_TIMER_PTRMark Cave-Ayland
The timers are configured in the mos6522 init function and therefore will always exist, so the function can never return false. Peter also pointed out that this is the only remaining user of VMSTATE_TIMER_PTR_TEST in the codebase, so we might as well just convert it over to VMSTATE_TIMER_PTR and remove mos6522_timer_exist() as it is no longer required. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-12mos6522: move timer frequency initialisation to mos6522_resetMark Cave-Ayland
The 6522 VIA timer frequency cannot be set by altering registers within the device itself and hence it is a fixed property of the machine. Move the initialisation of the timer frequency to the mos6522 reset function and ensure that any subclasses always call the parent reset function so that it isn't required to store the timer frequency within vmstate_mos6522_timer itself. By moving the frequency initialisation to the device reset function then we find that the realize function for both mos6522 and mos6522_cuda becomes obsolete and can simply be removed. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-12cuda: embed mos6522_cuda device directly rather than using QOM object linkMark Cave-Ayland
Examining the migration stream it can be seen that the mos6522 device state is being stored separately rather than as part of the CUDA device which is incorrect (and likely to cause issues if another mos6522 device is added to the machine). Resolve this by embedding the mos6522_cuda device directly within the CUDA device rather than using a QOM object link to reference the device separately. Note that we also bump the version in vmstate_cuda to reflect this change: this isn't particularly important for the moment as the Mac machine migration isn't 100% reliable due to issues migrating the timebase under TCG. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-12mos6522: fix vmstate_mos6522_timer version in vmstate_mos6522Mark Cave-Ayland
This was accidentally introduced when extracting the 6522 VIA functionality from the CUDA device, and prevents loadvm from completing successfully. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-12ppc: remove obsolete macio_init() definition from mac.hMark Cave-Ayland
Commits b6712ea391 removed the macio_init() function but missed the header prototype in mac.h. Remove it since it is no longer needed. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-12ppc: remove obsolete pci_pmac_init() definitions from mac.hMark Cave-Ayland
Commits 7b19318bee and 8ce3f743c7 removed the pci_pmac_init() and pci_pmac_u3_init() functions but missed the header prototypes in mac.h. Remove them since they are no longer needed. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-12hw/misc/mos6522: Add trailing '\n' to qemu_log() callsPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-12spapr/vio: deprecate the "irq" propertyCédric Le Goater
VIO devices have an "irq" property that can be used by the sPAPR IRQ allocator as an IRQ number hint. But it is not set in QEMU nor in libvirt. It brings unnecessary complexity to the underlying layers managing the IRQ number space and it is in full opposition with the new static IRQ allocator we want to introduce in sPAPR. Let's deprecate it to simplify the spapr_irq_alloc routine in the future. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> [dwg: Check qtest_enabled() to suppress bogus warnings from make check] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-12prep: fix keyboard for the 40p machineMark Cave-Ayland
Commit 72d3d8f052 "hw/isa/superio: Add a keyboard/mouse controller (8042)" added an 8042 keyboard device to the PC87312 superio device to replace that being used by the prep machine. Unfortunately this commit didn't do the same for the 40p machine which broke the keyboard by registering two 8042 keyboard devices at the same address. Resolve this by similarly removing the 8042 keyboard from the 40p machine as done for the prep machine in commit 72d3d8f052. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-1240p: remove pci_allow_0_address = true from 40p machine classMark Cave-Ayland
The Linux sandalfoot zImage has an initialisation process which resets the VGA controller by setting all the BAR addresses to zero to access the VGA ioports at their legacy addresses. Unfortunately setting the framebuffer BAR to address 0 makes the framebuffer memory overlap the internal VGA memory causing accesses to fail, and so prevents the kernel from switching successfully to text mode. Since OpenHackWare configures the framebuffer BAR address outside of the legacy VGA internal memory space, remove pci_allow_0_address from the 40p machine class which causes the BAR reprogramming to zero to fail and so the VGA internal memory can be accessed correctly again. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-12hw/ppc/spapr_drc: Replace error_setg(&error_abort) by error_report() + abort()Philippe Mathieu-Daudé
Use error_report() + abort() instead of error_setg(&error_abort), as suggested by the "qapi/error.h" documentation: Please don't error_setg(&error_fatal, ...), use error_report() and exit(), because that's more obvious. Likewise, don't error_setg(&error_abort, ...), use assert(). Use abort() instead of the suggested assert() because the error message already got displayed. Suggested-by: Eric Blake <eblake@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-12uninorth: remove token register from uninorth deviceMark Cave-Ayland
>From observation of various OS sources it can be seen that the token register introduced in 4e46dcdbd3 "PPC: Newworld: Add uninorth token register" is not required, since the only register currently implemented is the uninorth hardware version which is read-only. Remove the token register implementation and instead return the uninorth version corresponding to the hardware. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-12macio: add trace-events to timer deviceMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-12ppc440_pcix: Fix a typo in setting a register (Coverity CID1390577)BALATON Zoltan
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2018-06-11nvdimm: make persistence option symbolicRoss Zwisler
Replace the "nvdimm-cap" option which took numeric arguments such as "2" with a more user friendly "nvdimm-persistence" option which takes symbolic arguments "cpu" or "mem-ctrl". Signed-off-by: Ross Zwisler <ross.zwisler@linux.intel.com> Suggested-by: Michael S. Tsirkin <mst@redhat.com> Suggested-by: Dan Williams <dan.j.williams@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2018-06-11Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' ↵Peter Maydell
into staging x86 queue, 2018-06-11 * Support for CPUID[0x8000001D] (AMD Cache Topology Information) * pc bug fix: Remove PC_COMPAT_2_12 from 3.0 machine-types # gpg: Signature made Mon 11 Jun 2018 18:22:48 BST # gpg: using RSA key 2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-next-pull-request: pc: Remove PC_COMPAT_2_12 from 3.0 machine-types i386: Populate AMD Processor Cache Information for cpuid 0x8000001D i386: Clean up cache CPUID code Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-10pc: Remove PC_COMPAT_2_12 from 3.0 machine-typesEduardo Habkost
commit f548222c added PC_COMPAT_2_12 to the 3.0 PC machine-types. I believe this happened during manual conflict resolution when applying the patch. Cc: Xiao Guangrong <xiaoguangrong@tencent.com> Cc: Juan Quintela <quintela@redhat.com> Fixes: f548222c24342ca74689de7794f9006b43f86a54 Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20180608192940.19548-1-ehabkost@redhat.com> Reviewed-by: Marcel Apfelbaum<marcel.apfelbaum@gmail.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2018-06-08ide: introduce ide_transfer_start_norecursePaolo Bonzini
For the case where the end_transfer_func is also the caller of ide_transfer_start, the mutual recursion can lead to unlimited stack usage. Introduce a new version that can be used to change tail recursion into a loop, and use it in trace_ide_atapi_cmd_reply_end. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606190955.20845-8-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08atapi: call ide_set_irq before ide_transfer_startPaolo Bonzini
The ATAPI_INT_REASON_IO interrupt is raised when I/O starts, but in the AHCI case ide_set_irq was actually called at the end of a mutual recursion. Move it early, with the side effect that ide_transfer_start becomes a tail call in ide_atapi_cmd_reply_end. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606190955.20845-7-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ide: make ide_transfer_stop idempotentPaolo Bonzini
There is code checking s->end_transfer_func and it was not taught about ide_transfer_cancel. We can just use ide_transfer_stop because s->end_transfer_func is only ever called in the DRQ phase. ide_transfer_cancel can then be removed, since it would just be calling ide_transfer_halt. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606190955.20845-6-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ide: call ide_cmd_done from ide_transfer_stopPaolo Bonzini
The code can simply be moved to the sole caller that has notify == true. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606190955.20845-5-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ide: push end_transfer_func out of start_transfer callback, rename callbackPaolo Bonzini
Now that end_transfer_func is a tail call in ahci_start_transfer, formalize the fact that the callback (of which ahci_start_transfer is the sole implementation) takes care of the transfer too: rename it to pio_transfer and, if it is present, call the end_transfer_func as soon as it returns. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606190955.20845-4-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: move PIO Setup FIS before transfer, fix it for ATAPI commandsJohn Snow
The PIO Setup FIS is written in the PIO:Entry state, which comes before the ATA and ATAPI data transfer states. As a result, the PIO Setup FIS interrupt is now raised before DMA ends for ATAPI commands, and tests have to be adjusted. This is also hinted by the description of the command header in the AHCI specification, where the "A" bit is described as When ‘1’, indicates that a PIO setup FIS shall be sent by the device indicating a transfer for the ATAPI command. and also by the description of the ACMD (ATAPI command region): The ATAPI command must be either 12 or 16 bytes in length. The length transmitted by the HBA is determined by the PIO setup FIS that is sent by the device requesting the ATAPI command. QEMU, which conflates the "generator" and the "receiver" of the FIS into one device, always uses ATAPI_PACKET_SIZE, aka 12, for the length. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606190955.20845-3-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: make ahci_mem_write traces more descriptiveJohn Snow
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-17-jsnow@redhat.com [Fixed format specifiers. --js] Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: delete old host register address definitionsJohn Snow
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-16-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: adjust ahci_mem_write to work on registersJohn Snow
Actually, this function looks pretty broken, but for now, let's finish up what this series of commits came here to do. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-15-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: fix spacing damage on ahci_mem_writeJohn Snow
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-14-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: make mem_read_32 traces more descriptiveJohn Snow
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-13-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: modify ahci_mem_read_32 to work on register numbersJohn Snow
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-12-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: fix host register max addressJohn Snow
Yes, comment, it ought to be 0x2C. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-11-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: add host register enumerationJohn Snow
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-10-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: delete old port register address definitionsJohn Snow
They're now unused. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-9-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: make port write traces more descriptiveJohn Snow
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-8-jsnow@redhat.com [Changed format specifier. --js] Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: modify ahci_port_write to use register numbersJohn Snow
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-7-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: combine identical clauses in port writeJohn Snow
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-6-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: fix spacing damage on ahci_port_writeJohn Snow
Churn. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-5-jsnow@redhat.com [Fix patchew/checkpatch nit. --js] Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: make port read traces more descriptiveJohn Snow
A trace is added to let us watch unimplemented registers specifically, as these are more likely to cause us trouble. Otherwise, the port read traces now tell us what register is getting hit, which is nicer. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-4-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: modify ahci_port_read to use register numbersJohn Snow
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-3-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: add port register enumerationJohn Snow
Instead of tracking offsets, lets count the registers. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-2-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: don't schedule unnecessary BHJohn Snow
The comment gives us a hint. *Maybe* we still have something to process. Well, why not check? Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Jeff Cody <jcody@redhat.com> Message-id: 20180531004323.4611-4-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: fix PxCI register raceJohn Snow
Fixes: https://bugs.launchpad.net/qemu/+bug/1769189 AHCI presently signals completion prior to the PxCI register being cleared to indicate completion. If a guest driver attempts to issue a new command in its IRQ handler, it might be surprised to learn there is still a command pending. In the case of Windows 10's boot driver, it will actually poll the IRQ register hoping to find out when the command is done running -- which will never happen, as there isn't a command running. Fix this: clear PxCI in ahci_cmd_done and not in the asynchronous BH. Because it now runs synchronously, we don't need to check if the command is actually done by spying on the ATA registers. We know it's done. CC: qemu-stable <qemu-stable@nongnu.org> Reported-by: François Guerraz <kubrick@fgv6.net> Tested-by: Bruce Rogers <brogers@suse.com> Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Jeff Cody <jcody@redhat.com> Message-id: 20180531004323.4611-3-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08ahci: trim signatures on raise/lowerJohn Snow
These functions work on the AHCI device, not the individual AHCI devices, so trim the AHCIDevice argument. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Jeff Cody <jcody@redhat.com> Message-id: 20180531004323.4611-2-jsnow@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2018-06-08sdcard: Disable CMD19/CMD23 for Spec v2Philippe Mathieu-Daudé
These commands got introduced by Spec v3 (see 0c3fb03f7ec and 4481bbc79d2). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180607180641.874-7-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08sdcard: Reflect when the Spec v3 is supported in the Config Register (SCR)Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20180607180641.874-6-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08sdcard: Disable SEND_IF_COND (CMD8) for Spec v1Philippe Mathieu-Daudé
CMD8 is "Reserved" in Spec v1.10. Spec v2.00 introduces the SEND_IF_COND command: 6.4.1 Power Up CMD8 is newly added in the Physical Layer Specification Version 2.00 to support multiple voltage ranges and used to check whether the card supports supplied voltage. The version 2.00 or later host shall issue CMD8 and verify voltage before card initialization. The host that does not support CMD8 shall supply high voltage range. Message-Id: 201204252110.20873.paul@codesourcery.com Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180607180641.874-5-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08sdcard: Add a 'spec_version' property, default to Spec v2.00Philippe Mathieu-Daudé
As of this commit, the Spec v1 is not working, and all controllers expect the cards to be conformant to Spec v2. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20180607180641.874-4-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-06-08sdcard: Allow commands valid in SPI modePhilippe Mathieu-Daudé
From the "Physical Layer Simplified Specification Version 1.10" Chapter 7.3 "SPI Mode Transaction Packets" Table 57: "Commands and arguments" Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20180607180641.874-3-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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