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2020-10-19hw/xen: Set suppress-vmdesc for Xen machinesJason Andryuk
xen-save-devices-state doesn't currently generate a vmdesc, so restore always triggers "Expected vmdescription section, but got 0". This is not a problem when restore comes from a file. However, when QEMU runs in a linux stubdom and comes over a console, EOF is not received. This causes a delay restoring - though it does restore. Setting suppress-vmdesc skips looking for the vmdesc during restore and avoids the wait. The other approach would be generate a vmdesc in qemu_save_device_state. Since COLO shared that function, and the vmdesc is just discarded on restore, we choose to skip it. Reported-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com> Signed-off-by: Jason Andryuk <jandryuk@gmail.com> Acked-by: Anthony PERARD <anthony.perard@citrix.com> Message-Id: <20201013190506.3325-1-jandryuk@gmail.com> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
2020-10-19xen-bus: reduce scope of backend watchPaul Durrant
Currently a single watch on /local/domain/X/backend is registered by each QEMU process running in service domain X (where X is usually 0). The purpose of this watch is to ensure that QEMU is notified when the Xen toolstack creates a new device backend area. Such a backend area is specific to a single frontend area created for a specific guest domain and, since each QEMU process is also created to service a specfic guest domain, it is unnecessary and inefficient to notify all QEMU processes. Only the QEMU process associated with the same guest domain need receive the notification. This patch re-factors the watch registration code such that notifications are targetted appropriately. Reported-by: Jerome Leseinne <jerome.leseinne@gmail.com> Signed-off-by: Paul Durrant <pdurrant@amazon.com> Reviewed-by: Anthony PERARD <anthony.perard@citrix.com> Message-Id: <20201001081500.1026-1-paul@xen.org> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
2020-10-19xen: xenguest is not used so is not neededMichael Tokarev
There's no references in only file which includes xenguest.h to any xen definitions. And there's no references to -lxenguest in qemu, either. Drop it. Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Anthony PERARD <anthony.perard@citrix.com> Message-Id: <20200727140048.19779-1-mjt@msgid.tls.msk.ru> [perard: rebased] Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
2020-10-19Merge remote-tracking branch 'remotes/cschoenebeck/tags/pull-9p-20201019' ↵Peter Maydell
into staging 9pfs: add tests using local fs driver The currently existing 9pfs test cases are all solely using the 9pfs 'synth' fileystem driver, which is a very simple and purely simulated (in RAM only) filesystem. There are issues though where the 'synth' fs driver is not sufficient. For example the following two bugs need test cases running the 9pfs 'local' fs driver: https://bugs.launchpad.net/qemu/+bug/1336794 https://bugs.launchpad.net/qemu/+bug/1877384 This patch set for that reason introduces 9pfs test cases using the 9pfs 'local' filesystem driver along to the already existing tests on 'synth'. # gpg: Signature made Mon 19 Oct 2020 13:39:08 BST # gpg: using RSA key 96D8D110CF7AF8084F88590134C2B58765A47395 # gpg: issuer "qemu_oss@crudebyte.com" # gpg: Good signature from "Christian Schoenebeck <qemu_oss@crudebyte.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: ECAB 1A45 4014 1413 BA38 4926 30DB 47C3 A012 D5F4 # Subkey fingerprint: 96D8 D110 CF7A F808 4F88 5901 34C2 B587 65A4 7395 * remotes/cschoenebeck/tags/pull-9p-20201019: tests/9pfs: add local Tmkdir test tests/9pfs: add virtio_9p_test_path() tests/9pfs: wipe local 9pfs test directory tests/9pfs: introduce local tests tests/9pfs: change qtest name prefix to synth 9pfs: suppress performance warnings on qtest runs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-19Merge remote-tracking branch 'remotes/kraxel/tags/usb-20201019-pull-request' ↵Peter Maydell
into staging usb: fixes for dwc2 + ehci. # gpg: Signature made Mon 19 Oct 2020 13:33:16 BST # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/usb-20201019-pull-request: hw/usb/hcd-dwc2: fix divide-by-zero in dwc2_handle_packet() usb/hcd-ehci: Fix error handling on missing device for iTD usb: hcd-dwc2: change assert()s to qemu_log_mask(LOG_GUEST_ERROR...) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-199pfs: suppress performance warnings on qtest runsChristian Schoenebeck
Don't trigger any performance warning if we're just running test cases, because tests intentionally run for edge cases. So far performance warnings were suppressed for the 'synth' fs driver backend only. This patch suppresses them for all 9p fs driver backends. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <a2d2ff2163f8853ea782a7a1d4e6f2afd7c29ffe.1603106145.git.qemu_oss@crudebyte.com> Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
2020-10-19Merge remote-tracking branch 'remotes/mcayland/tags/qemu-macppc-20201019' ↵Peter Maydell
into staging qemu-macppc updates # gpg: Signature made Mon 19 Oct 2020 08:13:16 BST # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F # gpg: issuer "mark.cave-ayland@ilande.co.uk" # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full] # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * remotes/mcayland/tags/qemu-macppc-20201019: mac_oldworld: Change PCI address of macio to match real hardware mac_oldworld: Drop some variables mac_oldworld: Drop a variable, use get_system_memory() directly mac_newworld: Allow loading binary ROM image mac_oldworld: Allow loading binary ROM image m48t59: remove legacy m48t59_init() function ppc405_boards: use qdev properties instead of legacy m48t59_init() function sun4u: use qdev properties instead of legacy m48t59_init() function sun4m: use qdev properties instead of legacy m48t59_init() function m48t59-isa: remove legacy m48t59_init_isa() function uninorth: use qdev gpios for PCI IRQs grackle: use qdev gpios for PCI IRQs macio: don't reference serial_hd() directly within the device Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-19Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-next-20201017' ↵Peter Maydell
into staging MIPS patches queue . Fix some comment spelling errors . Demacro some TCG helpers . Add loongson-ext lswc2/lsdc2 group of instructions . Log unimplemented cache opcode . Increase number of TLB entries on the 34Kf core . Allow the CPU to use dynamic frequencies . Calculate the CP0 timer period using the CPU frequency . Set CPU frequency for each machine . Fix Malta FPGA I/O region size . Allow running qtests when ROM is missing . Add record/replay acceptance tests . Update MIPS CPU documentation . MAINTAINERS updates CI jobs results: https://gitlab.com/philmd/qemu/-/pipelines/203931842 https://travis-ci.org/github/philmd/qemu/builds/736491461 https://cirrus-ci.com/build/6272264062631936 https://app.shippable.com/github/philmd/qemu/runs/886/summary/console # gpg: Signature made Sat 17 Oct 2020 14:59:53 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/mips-next-20201017: (44 commits) target/mips: Increase number of TLB entries on the 34Kf core (16 -> 64) MAINTAINERS: Remove duplicated Malta test entries MAINTAINERS: Downgrade MIPS Boston to 'Odd Fixes', fix Paul Burton mail MAINTAINERS: Put myself forward for MIPS target MAINTAINERS: Remove myself docs/system: Update MIPS CPU documentation tests/acceptance: Add MIPS record/replay tests hw/mips: Remove exit(1) in case of missing ROM hw/mips: Rename TYPE_MIPS_BOSTON to TYPE_BOSTON hw/mips: Simplify code using ROUND_UP(INITRD_PAGE_SIZE) hw/mips: Simplify loading 64-bit ELF kernels hw/mips/malta: Use clearer qdev style hw/mips/malta: Move gt64120 related code together hw/mips/malta: Fix FPGA I/O region size target/mips/cpu: Display warning when CPU is used without input clock hw/mips/cps: Do not allow use without input clock hw/mips/malta: Set CPU frequency to 320 MHz hw/mips/boston: Set CPU frequency to 1 GHz hw/mips/cps: Expose input clock and connect it to CPU cores hw/mips/jazz: Correct CPU frequencies ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-19hw/usb/hcd-dwc2: fix divide-by-zero in dwc2_handle_packet()Mauro Matteo Cascella
Check the value of mps to avoid potential divide-by-zero later in the function. Since HCCHAR_MPS is guest controllable, this prevents a malicious/buggy guest from crashing the QEMU process on the host. Signed-off-by: Mauro Matteo Cascella <mcascell@redhat.com> Reviewed-by: Paul Zimmerman <pauldzim@gmail.com> Reported-by: Gaoning Pan <gaoning.pgn@antgroup.com> Reported-by: Xingwei Lin <linyi.lxw@antfin.com> Message-id: 20201015075957.268823-1-mcascell@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-10-19usb/hcd-ehci: Fix error handling on missing device for iTDAnthony PERARD
The EHCI Host Controller emulation attempt to locate the device associated with a periodic isochronous transfer description (iTD) and when this fail the host controller is reset. But according the EHCI spec 1.0 section 5.15.2.4 Host System Error, the host controller is supposed to reset itself only when it failed to communicate with the Host (Operating System), like when there's an error on the PCI bus. If a transaction fails, there's nothing in the spec that say to reset the host controller. This patch rework the error path so that the host controller can keep working when the OS setup a bogus transaction, it also revert to the behavior of the EHCI emulation to before commits: e94682f1fe ("ehci: check device is not NULL before calling usb_ep_get()") 7011baece2 ("usb: remove unnecessary NULL device check from usb_ep_get()") The issue has been found while trying to passthrough a USB device to a Windows Server 2012 Xen guest via "usb-ehci", which prevent the USB device from working in Windows. ("usb-ehci" alone works, windows only setup this weird periodic iTD to device 127 endpoint 15 when the USB device is passthrough.) Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Message-id: 20201014104106.2962640-1-anthony.perard@citrix.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-10-19usb: hcd-dwc2: change assert()s to qemu_log_mask(LOG_GUEST_ERROR...)Paul Zimmerman
Change several assert()s to qemu_log_mask(LOG_GUEST_ERROR...), to prevent the guest from causing Qemu to assert. Also fix up several existing qemu_log_mask()s to include the function name in the message. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paul Zimmerman <pauldzim@gmail.com> Message-id: 20200920021449.830-1-pauldzim@gmail.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-10-19mac_oldworld: Change PCI address of macio to match real hardwareBALATON Zoltan
The board firmware expect these to be at fixed addresses and programs them without probing, this patch puts the macio device at the expected PCI address. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <f14bcaf3cf129500710ba5289980a134086bd949.1602805637.git.balaton@eik.bme.hu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-19mac_oldworld: Drop some variablesBALATON Zoltan
Values not used frequently enough may not worth putting in a local variable, especially with names almost as long as the original value because that does not improve readability, to the contrary it makes it harder to see what value is used. Drop a few such variables. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <d67bc8d914a366ca6822b5190c1308d31af5c9b3.1602805637.git.balaton@eik.bme.hu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-19mac_oldworld: Drop a variable, use get_system_memory() directlyBALATON Zoltan
Half of the occurances already use get_system_memory() directly instead of sysmem variable, convert the two other uses to get_system_memory() too which seems to be more common and drop the variable. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <b4c714e03690deb6f94f80f7a5b2af47d90550ae.1602805637.git.balaton@eik.bme.hu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-19mac_newworld: Allow loading binary ROM imageBALATON Zoltan
Fall back to load binary ROM image if loading ELF fails. This also moves PROM_BASE and PROM_SIZE defines to board as these are matching the ROM size and address on this board and removes the now unused PROM_ADDR and BIOS_SIZE defines from common mac.h. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <4d58ffe7645a0c746c8fed6aa8775c0867b624e0.1602805637.git.balaton@eik.bme.hu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-19mac_oldworld: Allow loading binary ROM imageBALATON Zoltan
The beige G3 Power Macintosh has a 4MB firmware ROM. Fix the size of the rom region and fall back to loading a binary image with -bios if loading ELF image failed. This allows testing emulation with a ROM image from real hardware as well as using an ELF OpenBIOS image. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20201017155139.5A36A746331@zero.eik.bme.hu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-18m48t59: remove legacy m48t59_init() functionMark Cave-Ayland
Now that all of the callers of this function have been switched to use qdev properties, this legacy init function can now be removed. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20201016182739.22875-6-mark.cave-ayland@ilande.co.uk> Reviewed-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-18ppc405_boards: use qdev properties instead of legacy m48t59_init() functionMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20201016182739.22875-5-mark.cave-ayland@ilande.co.uk> Reviewed-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-18sun4u: use qdev properties instead of legacy m48t59_init() functionMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20201016182739.22875-4-mark.cave-ayland@ilande.co.uk> Reviewed-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-18sun4m: use qdev properties instead of legacy m48t59_init() functionMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20201016182739.22875-3-mark.cave-ayland@ilande.co.uk> Reviewed-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-18m48t59-isa: remove legacy m48t59_init_isa() functionMark Cave-Ayland
This function is no longer used within the codebase. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20201016182739.22875-2-mark.cave-ayland@ilande.co.uk> Reviewed-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-18uninorth: use qdev gpios for PCI IRQsMark Cave-Ayland
Currently an object link property is used to pass a reference to the OpenPIC into the PCI host bridge so that pci_unin_init_irqs() can connect the PCI IRQs to the PIC itself. This can be simplified by defining the PCI IRQs as qdev gpios and then wiring up the PCI IRQs to the PIC in the New World machine init function. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201013114922.2946-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-18grackle: use qdev gpios for PCI IRQsMark Cave-Ayland
Currently an object link property is used to pass a reference to the Heathrow PIC into the PCI host bridge so that grackle_init_irqs() can connect the PCI IRQs to the PIC itself. This can be simplified by defining the PCI IRQs as qdev gpios and then wiring up the PCI IRQs to the PIC in the Old World machine init function. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201013114922.2946-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-18macio: don't reference serial_hd() directly within the deviceMark Cave-Ayland
Instead use qdev_prop_set_chr() to configure the ESCC serial chardevs at the Mac Old World and New World machine level. Also remove the now obsolete comment referring to the use of serial_hd() and the setting of user_creatable to false accordingly. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20201013114922.2946-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-17hw/mips: Remove exit(1) in case of missing ROMPavel Dovgalyuk
This patch updates MIPS-based machines to allow starting them without ROM. In this case CPU starts to execute instructions from the empty memory, but QEMU allows introspecting the machine configuration. Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <159531210571.24117.231100997794891819.stgit@pasha-ThinkPad-X280> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-10-17hw/mips: Rename TYPE_MIPS_BOSTON to TYPE_BOSTONEduardo Habkost
This will make the type name constant consistent with the name of the type checking macro. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200902224311.1321159-19-ehabkost@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-10-17hw/mips: Simplify code using ROUND_UP(INITRD_PAGE_SIZE)Philippe Mathieu-Daudé
Instead of using a INITRD_PAGE_MASK definition, use the simpler INITRD_PAGE_SIZE one which allows us to simplify the code by using directly the self-explicit ROUND_UP() macro. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200927163943.614604-3-f4bug@amsat.org>
2020-10-17hw/mips: Simplify loading 64-bit ELF kernelsPhilippe Mathieu-Daudé
Since 82790064116 ("Cast ELF datatypes properly to host 64bit types") we don't need to sign-extend the entry_point address. Remove this unnecessary code. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200927163943.614604-2-f4bug@amsat.org>
2020-10-17hw/mips/malta: Use clearer qdev stylePhilippe Mathieu-Daudé
In order to be consistent with the other code base uses, rewrite slightly how the MIPS_MALTA object is created. No logical change. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201012160503.3472140-3-f4bug@amsat.org>
2020-10-17hw/mips/malta: Move gt64120 related code togetherPhilippe Mathieu-Daudé
The 'empty_slot' region created is related to the gt64120. Move its creation close to the gt64120 instance creation. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201012160503.3472140-2-f4bug@amsat.org>
2020-10-17hw/mips/malta: Fix FPGA I/O region sizePhilippe Mathieu-Daudé
The FPGA present on the CoreCard has an I/O region 1MiB wide. Refs: - Atlas User’s Manual (Document Number: MD00005) - Malta User’s Manual (Document Number: MD00048) Fixes: ea85df72b60 ("mips_malta: convert to memory API") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200905213049.761949-1-f4bug@amsat.org>
2020-10-17hw/mips/cps: Do not allow use without input clockPhilippe Mathieu-Daudé
Now than all QOM users provides the input clock, do not allow using a CPS without input clock connected. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201012095804.3335117-21-f4bug@amsat.org>
2020-10-17hw/mips/malta: Set CPU frequency to 320 MHzPhilippe Mathieu-Daudé
The CoreLV card with ID 0x420's CPU clocked at 320 MHz. Create a 'cpuclk' output clock and connect it to the CPU input clock. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201012095804.3335117-20-f4bug@amsat.org>
2020-10-17hw/mips/boston: Set CPU frequency to 1 GHzPhilippe Mathieu-Daudé
The I6400 can run at 1 GHz or more. Create a 'cpuclk' output clock and connect it to the CPU input clock. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201012095804.3335117-19-f4bug@amsat.org>
2020-10-17hw/mips/cps: Expose input clock and connect it to CPU coresPhilippe Mathieu-Daudé
Expose a qdev input clock named 'clk-in', and connect it to each core to forward-propagate the clock. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201012095804.3335117-18-f4bug@amsat.org>
2020-10-17hw/mips/jazz: Correct CPU frequenciesPhilippe Mathieu-Daudé
The Magnum 4000PC CPU runs at 100 MHz, and the Acer PICA-61 CPU at ~134 MHz. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201012095804.3335117-17-f4bug@amsat.org>
2020-10-17hw/mips/mipssim: Correct CPU frequencyPhilippe Mathieu-Daudé
The MIPSsim machine CPU frequency is too fast running at 200 MHz, while it should be 12 MHz for the 24K and 6 MHz for the 5K core. Ref: Linux commit c78cbf49c4ed ("Support for MIPSsim, the cycle accurate MIPS simulator.") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201012095804.3335117-16-f4bug@amsat.org>
2020-10-17hw/mips/fuloong2e: Set CPU frequency to 533 MHzPhilippe Mathieu-Daudé
The CPU frequency is normally provided by the firmware in the "cpuclock" environment variable. The 2E board can handles up to 660MHz, but be conservative and take the same value used by the Linux kernel: 533 MHz. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <20201012095804.3335117-15-f4bug@amsat.org>
2020-10-17hw/mips/r4k: Explicit CPU frequency is 200 MHzPhilippe Mathieu-Daudé
Since its introduction in commit 6af0bf9c7c3, the 'r4k' machine runs at 200 MHz. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201012095804.3335117-14-f4bug@amsat.org>
2020-10-16Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' ↵Peter Maydell
into staging x86 queue, 2020-10-15 Cleanups: * Drop x86_cpu_get_supported_feature_word() forward declaration (Vitaly Kuznetsov) * Delete kvm_allows_irq0_override() (Eduardo Habkost) * Correct documentation of kvm_irqchip_*() (Eduardo Habkost) * Fix FEATURE_HYPERV_EDX value in hyperv_passthrough case (Zhenyu Wang) Deprecation: * CPU model deprecation API (Robert Hoo) * Mark Icelake-Client CPU models deprecated (Robert Hoo) Bug fixes: * Remove core_id assert check in CPUID 0x8000001E (Babu Moger) # gpg: Signature made Thu 15 Oct 2020 17:43:58 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-next-pull-request: i386: Mark Icelake-Client CPU models deprecated cpu: Introduce CPU model deprecation API kvm: Correct documentation of kvm_irqchip_*() i386/kvm: Delete kvm_allows_irq0_override() i386/kvm: Remove IRQ routing support checks i386/kvm: Require KVM_CAP_IRQ_ROUTING target/i386: Remove core_id assert check in CPUID 0x8000001E i386/kvm: fix FEATURE_HYPERV_EDX value in hyperv_passthrough case i386: drop x86_cpu_get_supported_feature_word() forward declaration Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-16hw/core/clock: Add the clock_new helper functionLuc Michel
This function creates a clock and parents it to another object with a given name. It calls clock_setup_canonical_path before returning the new clock. This function is useful to create clocks in devices when one doesn't want to expose it at the qdev level (as an input or an output). Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Luc Michel <luc@lmichel.fr> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201010135759.437903-4-luc@lmichel.fr> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-10-16hw/qdev-clock: Display error hint when clock is missing from devicePhilippe Mathieu-Daudé
Instead of directly aborting, display a hint to help the developer figure out the problem (likely trying to connect a clock to a device pre-dating the Clock API, thus not expecting clocks). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Reviewed-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-Id: <20201012095804.3335117-4-f4bug@amsat.org>
2020-10-14cpu: Introduce CPU model deprecation APIRobert Hoo
Implement the ability of marking some versions deprecated. When that CPU model is chosen, print a warning. The warning message can be customized, e.g. suggesting an alternative CPU model to be used instead. The deprecation message will be printed by x86_cpu_list_entry(), e.g. '-cpu help'. QMP command 'query-cpu-definitions' will return a bool value indicating the deprecation status. Signed-off-by: Robert Hoo <robert.hu@linux.intel.com> Message-Id: <1600758855-80046-1-git-send-email-robert.hu@linux.intel.com> [ehabkost: reword commit message] [ehabkost: Handle NULL cpu_type] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-10-14i386/kvm: Delete kvm_allows_irq0_override()Eduardo Habkost
As IRQ routing is always available on x86, kvm_allows_irq0_override() will always return true, so we don't need the function anymore. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20200922201922.2153598-4-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-10-14i386/kvm: Remove IRQ routing support checksEduardo Habkost
KVM_CAP_IRQ_ROUTING is always available on x86, so replace checks for kvm_has_gsi_routing() and KVM_CAP_IRQ_ROUTING with asserts. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20200922201922.2153598-3-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-10-13vga-pci: Register "big-endian-framebuffer" as class propertyEduardo Habkost
Class properties make QOM introspection simpler and easier, as they don't require an object to be instantiated. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20200921221045.699690-22-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-10-13Merge remote-tracking branch ↵Peter Maydell
'remotes/vivier2/tags/trivial-branch-for-5.2-pull-request' into staging Trivial Patches Pull request 20201013 # gpg: Signature made Tue 13 Oct 2020 12:49:59 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-5.2-pull-request: meson.build: drop duplicate 'sparc64' entry mingw: fix error __USE_MINGW_ANSI_STDIO redefined target/sparc/int32_helper: Remove duplicated 'Tag Overflow' entry goldfish_rtc: change MemoryRegionOps endianness to DEVICE_NATIVE_ENDIAN hw/char/serial: remove duplicate .class_init in serial_mm_info block/blkdebug: fix memory leak hw/pci: Fix typo in PCI hot-plug error message softmmu/memory: Log invalid memory accesses hw/acpi/piix4: Rename piix4_pm_add_propeties() to piix4_pm_add_properties() vmdk: fix maybe uninitialized warnings tests/test-char: Use a proper fallthrough comment hw/block/nvme: Simplify timestamp sum target/i386/cpu: Update comment that mentions Texinfo qemu-img-cmds.hx: Update comment that mentions Texinfo Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-13goldfish_rtc: change MemoryRegionOps endianness to DEVICE_NATIVE_ENDIANLaurent Vivier
The doc [1] doesn't define the endianness, but the kernel driver uses readl() to access the registers, so we can guess it depends on the architecture endianness. As riscv architecture endianness is little it might not change anything for it. Moreover, android implementation uses DEVICE_NATIVE_ENDIAN [2] [1] https://android.googlesource.com/platform/external/qemu/+/master/docs/GOLDFISH-VIRTUAL-HARDWARE.TXT [2] https://android.googlesource.com/platform/external/qemu/+/refs/heads/emu-master-dev/hw/timer/goldfish_timer.c#177 Fixes: 9a5b40b84279 ("hw: rtc: Add Goldfish RTC device") Cc: Anup.Patel@wdc.com Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20201009113843.60995-2-lvivier@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-10-13hw/char/serial: remove duplicate .class_init in serial_mm_infoLaurent Vivier
.class_init is already set to serial_mm_class_init. Remove the duplicate entry. Fixes: 17fd1a6490b1 ("serial-mm: add "regshift" property") Cc: marcandre.lureau@redhat.com Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Li Qiang <liq3ea@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20201009113843.60995-1-lvivier@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-10-13hw/pci: Fix typo in PCI hot-plug error messageJulia Suvorova
'occupied' is spelled like 'ocuppied' in the message. Signed-off-by: Julia Suvorova <jusual@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20201006133958.600932-1-jusual@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
generated by cgit v1.2.3 (git 2.26.2) at 2024-11-24 00:33:38 +0000