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2015-11-12Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell
virtio, vhost: fixes for 2.5 This fixes a performance regression with virtio 1, and makes device stop/start more robust for vhost-user. virtio devices on pcie bus now have pcie and pm capability, as required by the PCI Express spec. migration now works better with virtio 9p. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Thu 12 Nov 2015 14:40:42 GMT using RSA key ID D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" * remotes/mst/tags/for_upstream: virtio-9p: add savem handlers hw/virtio: Add PCIe capability to virtio devices vhost: send SET_VRING_ENABLE at start/stop vhost: rename RESET_DEVICE backto RESET_OWNER vhost-user: modify SET_LOG_BASE to pass mmap size and offset virtio-pci: unbreak queue_enable read virtio-pci: introduce pio notification capability for modern device virtio-pci: use zero length mmio eventfd for 1.0 notification cap when possible KVM: add support for any length io eventfd memory: don't try to adjust endianness for zero length eventfd virtio-pci: fix 1.0 virtqueue migration Conflicts: include/hw/compat.h [Fixed a trivial merge conflict in compat.h] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-12virtio-9p: add savem handlersGreg Kurz
We don't support migration of mounted 9p shares. This is handled by a migration blocker. One would expect, however, to be able to migrate if the share is unmounted. Unfortunately virtio-9p-device does not register savevm handlers at all ! Migration succeeds and leaves the guest with a dangling device... This patch simply registers migration handlers for virtio-9p-device. Whether migration is possible or not still depends on the migration blocker. Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-11-12hw/virtio: Add PCIe capability to virtio devicesMarcel Apfelbaum
The virtio devices are converted to PCI-Express if they are plugged into a PCI-Express bus and the 'modern' protocol is enabled. Devices plugged directly into the Root Complex as Integrated Endpoints remain PCI. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-11-12Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into ↵Peter Maydell
staging # gpg: Signature made Thu 12 Nov 2015 08:01:55 GMT using RSA key ID 398D6211 # gpg: Good signature from "Jason Wang (Jason Wang on RedHat) <jasowang@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 215D 46F4 8246 689E C77F 3562 EF04 965B 398D 6211 * remotes/jasowang/tags/net-pull-request: net: netmap: use error_setg() helpers in place of error_report() net: netmap: Fix compilation issue e1000: Introducing backward compatibility command line parameter e1000: Implementing various counters e1000: Fixing the packet address filtering procedure e1000: Fixing the received/transmitted octets' counters e1000: Fixing the received/transmitted packets' counters e1000: Trivial implementation of various MAC registers e1000: Introduced an array to control the access to the MAC registers e1000: Add support for migrating the entire MAC registers' array e1000: Cosmetic and alignment fixes slirp: Fix type casts and format strings in debug code Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-12vhost: send SET_VRING_ENABLE at start/stopYuanhan Liu
Send SET_VRING_ENABLE at start/stop, to give the backend an explicit sign of our state. Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-11-12vhost: rename RESET_DEVICE backto RESET_OWNERYuanhan Liu
This patch basically reverts commit d1f8b30e. It turned out that it breaks stuff, so revert it: http://lists.nongnu.org/archive/html/qemu-devel/2015-10/msg00949.html CC: "Michael S. Tsirkin" <mst@redhat.com> Reported-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-11-12vhost-user: modify SET_LOG_BASE to pass mmap size and offsetVictor Kaplansky
Unlike the kernel, vhost-user application accesses log table by mmaping it to its user space. This change adds two new fields to VhostUserMsg payload: mmap_size, and mmap_offset and make QEMU to pass the to vhost-user application in VHOST_USER_SET_LOG_BASE request. Signed-off-by: Victor Kaplansky <victork@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-11-12virtio-pci: unbreak queue_enable readJason Wang
Guest always get zero when reading queue_enable. This violates spec. Fixing this by setting the queue_enable to true during any guest writing and setting it to zero during reset. Cc: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-11-12virtio-pci: introduce pio notification capability for modern deviceJason Wang
We used to use mmio for notification. This could be slow on some arch (e.g on x86 without EPT). So this patch introduces pio bar and a pio notification cap for modern device. This ability is enabled through property "modern-pio-notify" for virtio pci devices and was disabled by default. Management can enable when it thinks it was needed. Benchmarks shows almost no obvious difference compared to legacy device on machines without ept. Thanks Wenli Quan <wquan@redhat.com> for the benchmarking. Cc: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-11-12virtio-pci: use zero length mmio eventfd for 1.0 notification cap when possibleJason Wang
We use data match eventfd for 1.0 notification currently. This could be slow since software decoding is needed for mmio exit. To speed this up, we can switch to use zero length mmio eventfd for 1.0 notification since we can examine the queue index directly from the writing address. KVM kernel module can utilize this by registering it to fast mmio bus which could be as fast as pio on ept capable machine when fast mmio is supported by host kernel. Lots of improvements were seen on a ept capable machine: Guest RX:(TCP) size/session/+throughput%/+cpu%/-+per cpu%/ 64/1/+1.6807%/[-16.2421%]/[+21.3984%]/ 64/2/+0.6091%/[-11.0187%]/[+13.0678%]/ 64/4/+0.0553%/[-5.9768%]/[+6.4155%]/ 64/8/+0.1206%/[-4.0057%]/[+4.2984%]/ 256/1/-0.0031%/[-10.1166%]/[+11.2517%]/ 256/2/-0.5058%/[-6.1656%]/+6.0317%]/ ... Guest TX:(TCP) size/session/+throughput%/+cpu%/-+per cpu%/ 64/1/[+18.9183%]/-0.2823%/[+19.2550%]/ 64/2/[+13.5714%]/[+2.2675%]/[+11.0533%]/ 64/4/[+13.1070%]/[+2.1817%]/[+10.6920%]/ 64/8/[+13.0426%]/[+2.0887%]/[+10.7299%]/ 256/1/[+36.2761%]/+6.3434%/[+28.1471%]/ ... 1024/1/[+44.8873%]/+2.0811%/[+41.9335%]/ ... 1024/4/+0.0228%/[-2.2044%]/[+2.2774%]/ ... 16384/2/+0.0127%/[-5.0346%]/[+5.3148%]/ ... 65535/1/[+0.0062%]/[-4.1183%]/[+4.3017%]/ 65535/2/+0.0004%/[-4.2311%]/[+4.4185%]/ 65535/4/+0.0107%/[-4.6106%]/[+4.8446%]/ 65535/8/-0.0090%/[-5.5178%]/[+5.8306%]/ Latency:(TCP_RR) size/session/+transaction rate%/+cpu%/-+per cpu%/ 64/1/[+6.5248%]/[-9.2882%]/[+17.4322%]/ 64/25/[+11.0854%]/[+0.8000%]/[+10.2038%]/ 64/50/[+12.1076%]/[+2.4627%]/[+9.4131%]/ 256/1/[+5.3677%]/[+10.5669%]/-4.7024%/ 256/25/[+5.6402%]/-0.8962%/[+6.5955%]/ 256/50/[+5.9685%]/[+1.7766%]/[+4.1188%]/ 4096/1/+0.2508%/[-10.4941%]/[+12.0047%]/ 4096/25/[+1.8533%]/-0.0273%/+1.8812%/ 4096/50/[+1.2156%]/-1.4134%/+2.6667%/ Notes: data with '[]' is the one whose significance is greater than 95%. Thanks Wenli Quan <wquan@redhat.com> for the benchmarking. Cc: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-11-12virtio-pci: fix 1.0 virtqueue migrationJason Wang
We don't migrate the followings fields for virtio-pci: uint32_t dfselect; uint32_t gfselect; uint32_t guest_features[2]; struct { uint16_t num; bool enabled; uint32_t desc[2]; uint32_t avail[2]; uint32_t used[2]; } vqs[VIRTIO_QUEUE_MAX]; This will confuse driver if migrating during initialization. Solves this issue by: - introduce transport specific callbacks to load and store extra virtqueue states. - add a new subsection for virtio to migrate transport specific modern device state. - implement pci specific callbacks. - add a new property for virtio-pci for whether or not to migrate extra state. - compat the migration for 2.4 and elder machine types Cc: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-11-12Merge remote-tracking branch 'remotes/dgibson/tags/ppc-next-20151112' into ↵Peter Maydell
staging ppc patch queue -2015-11-12 Highlights: - A number of fixes for MacOS 9 compatibility based on the old MOL (Mac-On-Linux) code and a GSoC project. - Cleaner and more general way of handling register access from the monitor # gpg: Signature made Thu 12 Nov 2015 04:33:26 GMT using RSA key ID 20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-next-20151112: monitor/target-ppc: Define target_get_monitor_def cuda.c: add delay to setting of SR_INT bit cuda.c: fix T2 timer and enable its interrupt cuda.c: rename get_counter() state variable from s to ti for consistency cuda.c: refactor get_tb() so that the time can be passed in cuda.c: add defines for CUDA registers cuda.c: fix CUDA SR interrupt clearing cuda.c: implement dummy IIC access commands cuda.c: implement simple CUDA_GET_6805_ADDR command cuda.c: fix CUDA_PACKET response packet format cuda.c: fix CUDA ADB error packet format PPC: mac99: Always add USB controller PPC: Fix lswx bounds checks PPC: Allow Rc bit to be set on mtspr Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-12Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2015-11-11' ↵Peter Maydell
into staging error: More error_setg() usage # gpg: Signature made Wed 11 Nov 2015 17:57:15 GMT using RSA key ID EB918653 # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" * remotes/armbru/tags/pull-error-2015-11-11: error: More error_setg() usage Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-12e1000: Introducing backward compatibility command line parameterLeonid Bloch
This follows the previous patches, where support for migrating the entire MAC registers' array, and some new MAC registers were introduced. This patch introduces the e1000-specific boolean parameter "extra_mac_registers", which is on by default. Setting it to off will enable migration to older versions of QEMU, but will disable the read and write access to the new registers, that were introduced since adding the ability to migrate the entire MAC array. Example for usage to enable backward compatibility and to disable the new MAC registers: qemu-system-x86_64 -device e1000,extra_mac_registers=off,... ... As mentioned above, the default value is "on". Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com> Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2015-11-12e1000: Implementing various countersLeonid Bloch
This implements the following Statistic registers (various counters) according to Intel's specs: TSCTC GOTCL GOTCH GORCL GORCH MPRC BPRC RUC ROC BPTC MPTC PTC... PRC... PLEASE NOTE: these registers will not be active, nor will migrate, until a compatibility flag will be set (in the next patch in this series). Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com> Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2015-11-12e1000: Fixing the packet address filtering procedureLeonid Bloch
Previously, if promiscuous unicast was enabled, a packet was received straight away, even if it was a multicast or a broadcast packet. This patch fixes that behavior, while making the filtering procedure a bit more human-readable. Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com> Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2015-11-12e1000: Fixing the received/transmitted octets' countersLeonid Bloch
Previously, these 64-bit registers did not stick at their maximal values when (and if) they reached them, as they should do, according to the specs. This patch introduces a function that takes care of such registers, avoiding code duplication, making the relevant parts more compatible with the QEMU coding style, while ensuring that in the unlikely case of reaching the maximal value, the counter will stick there, as it supposed to. Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com> Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2015-11-12e1000: Fixing the received/transmitted packets' countersLeonid Bloch
According to Intel's specs, these counters (as the other Statistic registers) stick at 0xffffffff when this maximal value is reached. Previously, they would reset after the max. value. Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com> Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2015-11-12e1000: Trivial implementation of various MAC registersLeonid Bloch
These registers appear in Intel's specs, but were not implemented. These registers are now implemented trivially, i.e. they are initiated with zero values, and if they are RW, they can be written or read by the driver, or read only if they are R (essentially retaining their zero values). For these registers no other procedures are performed. For the trivially implemented Diagnostic registers, a debug warning is produced on read/write attempts. PLEASE NOTE: these registers will not be active, nor will migrate, until a compatibility flag will be set (in a later patch in this series). The registers implemented here are: Transmit: RW: AIT Management: RW: WUC WUS IPAV IP6AT* IP4AT* FFLT* WUPM* FFMT* FFVT* Diagnostic: RW: RDFH RDFT RDFHS RDFTS RDFPC PBM* TDFH TDFT TDFHS TDFTS TDFPC Statistic: RW: FCRUC R: RNBC TSCTFC MGTPRC MGTPDC MGTPTC RFC RJC SCC ECOL LATECOL MCC COLC DC TNCRS SEC CEXTERR RLEC XONRXC XONTXC XOFFRXC XOFFTXC Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com> Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2015-11-12e1000: Introduced an array to control the access to the MAC registersLeonid Bloch
The array of uint8_t's which is introduced here, contains access metadata about the MAC registers: if a register is accessible, but partly implemented, or if a register requires a certain compatibility flag in order to be accessed. Currently, 6 hypothetical flags are supported (3 exist for e1000 so far) but in the future, if more than 6 flags will be needed, the datatype of this array can simply be swapped for a larger one. This patch is intended to solve the following current problems: 1) In a scenario of migration between different versions of QEMU, which differ by the MAC registers implemented in them, some registers need not to be active if a compatibility flag is set, in order to preserve the machine's state perfectly for the older version. Checking this for each register individually, would create a lot of clutter in the code. 2) Some registers are (or may be) only partly implemented (e.g. placeholders that allow reading and writing, but lack other functions). In such cases it is better to print a debug warning on read/write attempts. As above, dealing with this functionality on a per-register level, would require longer and more messy code. Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com> Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2015-11-12e1000: Add support for migrating the entire MAC registers' arrayLeonid Bloch
This patch makes the migration of the entire array of MAC registers possible during live migration. The entire array is just 128 KB long, so practically no penalty should be felt when transmitting it, additionally to the previously transmitted individual registers. The advantage here is eliminating the need to introduce new vmstate subsections in the future, when additional MAC registers will be implemented. Backward compatibility is preserved by introducing a e1000-specific boolean parameter (in a later patch), which will be on by default. Setting it to off would enable migration to older versions of QEMU. Additionally, this parameter will be used to control the access to the extra MAC registers in the future. Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com> Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2015-11-12e1000: Cosmetic and alignment fixesLeonid Bloch
This fixes some alignment and cosmetic issues. The changes are made in order that the following patches in this series will look like integral parts of the code surrounding them, while conforming to the coding style. Although some changes in unrelated areas are also made. Signed-off-by: Leonid Bloch <leonid.bloch@ravellosystems.com> Signed-off-by: Dmitry Fleytman <dmitry.fleytman@ravellosystems.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2015-11-12cuda.c: add delay to setting of SR_INT bitMark Cave-Ayland
MacOS 9 is racy when it comes to accessing the shift register. Fix this by introducing a small delay between data accesses and raising the SR_INT interrupt bit. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-11-12cuda.c: fix T2 timer and enable its interruptMark Cave-Ayland
Fix the counter loading logic and enable the T2 interrupt when the timer expires. Otherwise MacOS 9 hangs on boot. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-11-12cuda.c: rename get_counter() state variable from s to ti for consistencyMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-11-12cuda.c: refactor get_tb() so that the time can be passed inMark Cave-Ayland
This is in preparation for sharing the code between timers. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-11-12cuda.c: add defines for CUDA registersMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-11-12cuda.c: fix CUDA SR interrupt clearingMark Cave-Ayland
Make sure that we also clear the data and clock interrupts at the same time. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-11-12cuda.c: implement dummy IIC access commandsMark Cave-Ayland
These are used by MacOS 9 on boot. Here we return an error except for 4-byte commands which write to the IIC bus in a similar manner to MOL. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-11-12cuda.c: implement simple CUDA_GET_6805_ADDR commandMark Cave-Ayland
This simply returns an empty response with no error status as implemented by MOL to allow MacOS 9 boot to proceed further. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-11-12cuda.c: fix CUDA_PACKET response packet formatMark Cave-Ayland
According to comments in MOL, the response to a CUDA_PACKET should be one of the following: Reply: (CUDA_PACKET, status, cmd) Error: (ERROR_PACKET, status, CUDA_PACKET, cmd) Update cuda_receive_packet() accordingly to reflect this in order to make MacOS 9 happy. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-11-12cuda.c: fix CUDA ADB error packet formatMark Cave-Ayland
According to MOL, ADB error packets should be of the form (type, status, cmd) rather than just (type, status). This fixes ADB device detection under MacOS 9. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-11-12PPC: mac99: Always add USB controllerAlexander Graf
The mac99 machines always have a USB controller. Usually not having one around doesn't hurt quite as much, but Mac OS 9 really really wants one or it crashes on bootup. So always add OHCI to make it happy. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-11-11error: More error_setg() usageEric Blake
A few uses of error_set(ERROR_CLASS_GENERIC_ERROR) were missed in c6bd8c706, or have snuck in since. Nuke them. Signed-off-by: Eric Blake <eblake@redhat.com> Message-Id: <1447224690-9743-19-git-send-email-eblake@redhat.com> Acked-by: Andreas Färber <afaerber@suse.de> [Indentation tidied up, commit message tweaked] Signed-off-by: Markus Armbruster <armbru@redhat.com>
2015-11-11s390: deprecate the non-ccw machine in 2.5Christian Borntraeger
The non-ccw machine for s390 (s390-virtio) is not very well maintained and caused several issues in the past: - aliases like virtio-blk did not work for s390 - virtio refactoring failed due to long standing bugs (e.g.see commit cb927b8a "s390-virtio: Accommodate guests using virtqueues too early") - some features like memory hotplug will cause trouble due to virtio storage being above guest memory - the boot loader bios no longer seems to work. the source code of that loader is also no longer maintained 2.4 changed the default to the ccw machine, let's deprecate the old machine for 2.5. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Message-Id: <1446811645-25565-1-git-send-email-borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-11-11s390x/ipl: switch error reporting to error_setgDavid Hildenbrand
Now that we can report errors in the realize function, let's replace the fprintf's and hw_error's with error_setg. Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-11-11s390x/ipl: clean up qom definitions and turn into TYPE_DEVICEDavid Hildenbrand
Let's move the qom definitions of the ipl device into ipl.h, replace "s390-ipl" by a proper type define, turn it into a TYPE_DEVICE and remove the unneeded class definition. Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-11-11qdev: provide qdev_reset_all_fn()David Hildenbrand
For TYPE_DEVICE, the dc->reset() function is not called on system resets yet. Until that is changed, we have to manually register a reset handler. Let's provide qdev_reset_all_fn(), that can directly be used - just like the reset handler that is already available for qbus. Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-11-11s390x: switch to memory_region_allocate_system_memoryDominik Dingel
By replacing memory_region_init_ram with memory_region_allocate_system_memory we gain goodies like mem-path backends. This will allow us to use hugetlbfs once the kernel supports it. Signed-off-by: Dominik Dingel <dingel@linux.vnet.ibm.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-11-11s390x/pci : fix up s390 pci iommu translation functionYi Min Zhao
On s390x, each pci device has its own iommu, which is only properly setup in qemu once the mpcifc instruction used to register the translation table has been intercepted. Therefore, for a pci device that is not configured or has not been initialized, proper translation is neither required nor possible. Moreover, we may not have a host bridge device ready yet. This was exposed by a recent vfio change that triggers iommu translation during the initialization of the vfio pci device. Let's do an early exit in that case. Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Signed-off-by: Yi Min Zhao <zyimin@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-11-11s390x/css: sense data endiannessCornelia Huck
We keep the device's sense data in a byte array (following the architecture), but the ecws are an array of 32 bit values. If we just blindly copy the values, the sense data will change from de-facto BE data to de-facto cpu-endian data, which means we end up doing an incorrect conversion on LE hosts. Let's just explicitly convert to cpu-endianness while assembling the irb. Reported-by: Andy Lutomirski <luto@kernel.org> Tested-by: Andy Lutomirski <luto@kernel.org> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com>
2015-11-11Merge remote-tracking branch 'remotes/dgibson/tags/ppc-next-20151111' into ↵Peter Maydell
staging ppc patch queue - 2015-11-11 Highlights: - Updated SLOF version for "pseries machine - Bugfix / cleanup for KVM hash page table allocation # gpg: Signature made Wed 11 Nov 2015 02:30:51 GMT using RSA key ID 20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-next-20151111: spapr: Handle failure of KVM_PPC_ALLOCATE_HTAB ioctl ppc: Let kvmppc_reset_htab() return 0 for !CONFIG_KVM pseries: Update SLOF firmware image to qemu-slof-20151103 ppc: Add/Re-introduce MMU model definitions needed by PR KVM Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-11spapr: Handle failure of KVM_PPC_ALLOCATE_HTAB ioctlBharata B Rao
KVM_PPC_ALLOCATE_HTAB ioctl can return -ENOMEM for KVM guests and QEMU never handled this correctly. But this didn't cause any problems till now as KVM_PPC_ALLOCATE_HTAB ioctl returned with smaller than requested HTAB when enough contiguous memory wasn't available in the host. After the proposed kernel change: https://patchwork.ozlabs.org/patch/530501/, KVM_PPC_ALLOCATE_HTAB ioctl will not fallback to lower sized HTAB allocation and will fail if requested HTAB size can't be met. Check for such failures in QEMU and abort appropriately. This will prevent guest kernel from hanging/freezing during early boot by doing graceful exit when host is unable to allocate requested HTAB. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-11-10Merge remote-tracking branch 'remotes/awilliam/tags/vfio-update-20151110.0' ↵Peter Maydell
into staging VFIO updates 2015-11-10 - Make Windows happy with vfio-pci devices exposed on conventional PCI buses on q35 by hiding PCIe capability (Alex Williamson) - Convert to g_new() where appropriate (Markus Armbruster) # gpg: Signature made Tue 10 Nov 2015 19:46:41 GMT using RSA key ID 3BB08B22 # gpg: Good signature from "Alex Williamson <alex.williamson@redhat.com>" # gpg: aka "Alex Williamson <alex@shazbot.org>" # gpg: aka "Alex Williamson <alwillia@redhat.com>" # gpg: aka "Alex Williamson <alex.l.williamson@gmail.com>" * remotes/awilliam/tags/vfio-update-20151110.0: vfio: Use g_new() & friends where that makes obvious sense vfio/pci: Hide device PCIe capability on non-express buses for PCIe VMs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-10vfio: Use g_new() & friends where that makes obvious senseMarkus Armbruster
g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size arguments of the form sizeof(T). Same Coccinelle semantic patch as in commit b45c03f. Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2015-11-10vfio/pci: Hide device PCIe capability on non-express buses for PCIe VMsAlex Williamson
When we have a PCIe VM, such as Q35, guests start to care more about valid configurations of devices relative to the VM view of the PCI topology. Windows will error with a Code 10 for an assigned device if a PCIe capability is found for a device on a conventional bus. We also have the possibility of IOMMUs, like VT-d, where the where the guest may be acutely aware of valid express capabilities on physical hardware. Some devices, like tg3 are adversely affected by this due to driver dependencies on the PCIe capability. The only solution for such devices is to attach them to an express capable bus in the VM. Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2015-11-10Merge remote-tracking branch 'remotes/juanquintela/tags/migration/20151110' ↵Peter Maydell
into staging migration/next for 20151110 # gpg: Signature made Tue 10 Nov 2015 14:23:26 GMT using RSA key ID 5872D723 # gpg: Good signature from "Juan Quintela <quintela@redhat.com>" # gpg: aka "Juan Quintela <quintela@trasno.org>" * remotes/juanquintela/tags/migration/20151110: (57 commits) migration: qemu_savevm_state_cleanup becomes mandatory operation Inhibit ballooning during postcopy Disable mlock around incoming postcopy End of migration for postcopy Postcopy: Mark nohugepage before discard postcopy: Wire up loadvm_postcopy_handle_ commands Start up a postcopy/listener thread ready for incoming page data Postcopy; Handle userfault requests Round up RAMBlock sizes to host page sizes Host page!=target page: Cleanup bitmaps Don't iterate on precopy-only devices during postcopy Don't sync dirty bitmaps in postcopy postcopy: Check order of received target pages Postcopy: Use helpers to map pages during migration postcopy_ram.c: place_page and helpers Page request: Consume pages off the post-copy queue Page request: Process incoming page request Page request: Add MIG_RP_MSG_REQ_PAGES reverse command Postcopy: End of iteration Postcopy: Postcopy startup in migration thread ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-10Inhibit ballooning during postcopyDr. David Alan Gilbert
Postcopy detects accesses to pages that haven't been transferred yet using userfaultfd, and it causes exceptions on pages that are 'not present'. Ballooning also causes pages to be marked as 'not present' when the guest inflates the balloon. Potentially a balloon could be inflated to discard pages that are currently inflight during postcopy and that may be arriving at about the same time. To avoid this confusion, disable ballooning during postcopy. When disabled we drop balloon requests from the guest. Since ballooning is generally initiated by the host, the management system should avoid initiating any balloon instructions to the guest during migration, although it's not possible to know how long it would take a guest to process a request made prior to the start of migration. Guest initiated ballooning will not know if it's really freed a page of host memory or not. Queueing the requests until after migration would be nice, but is non-trivial, since the set of inflate/deflate requests have to be compared with the state of the page to know what the final outcome is allowed to be. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Amit Shah <amit.shah@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com>
2015-11-10Rename save_live_complete to save_live_complete_precopyDr. David Alan Gilbert
In postcopy we're going to need to perform the complete phase for postcopiable devices at a different point, start out by renaming all of the 'complete's to make the difference obvious. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Amit Shah <amit.shah@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Juan Quintela <quintela@redhat.com>
2015-11-10hw/arm/virt: error_report cleanupsAndrew Jones
Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-id: 1446909925-12201-1-git-send-email-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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