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2015-06-22qobject: Use 'bool' inside qdictEric Blake
Now that qbool is fixed, let's fix getting and setting a bool value to a qdict member to also use C99 bool rather than int. I audited all callers to ensure that the changed return type will not cause any changed semantics. Signed-off-by: Eric Blake <eblake@redhat.com> Reviewed-by: Alberto Garcia <berto@igalia.com> Acked-by: Luiz Capitulino <lcapitulino@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2015-06-22Merge remote-tracking branch 'remotes/afaerber/tags/qom-devices-for-peter' ↵Peter Maydell
into staging QOM infrastructure fixes and device conversions * Changes to name string ownership for alias properties * Improvements around enum properties * Cleanups around -object handling * New helper functions * Cleanups of qdev init helper functions * Add path argument to qom-tree script * QTest cleanup to use new qtest_add_data_func() consistently # gpg: Signature made Fri Jun 19 18:14:38 2015 BST using RSA key ID 3E7E013F # gpg: Good signature from "Andreas Färber <afaerber@suse.de>" # gpg: aka "Andreas Färber <afaerber@suse.com>" * remotes/afaerber/tags/qom-devices-for-peter: qdev: Un-deprecate qdev_init_nofail() qdev: Deprecated qdev_init() is finally unused, drop qom: Don't pass string table to object_get_enum() function qom: Add an object_property_add_enum() helper function qom: Make enum string tables const-correct qom: Add object_new_with_props() / object_new_withpropv() helpers qom: Add helper function for getting user objects root vl: Create (most) objects before creating chardev backends doc: Document user creatable object types in help text backends: Fix typename of 'policy' enum property in hostmem obj scripts: Add support for path as argument of qom-tree tests: Use qtest_add_data_func() consistently qdev: Free property names after registering gpio aliases qom: strdup() target property name on object_property_add_alias() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-22Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell
* i8254 security fix * Avoid long 100% CPU wait after restarting guests that use the periodic timer * Fixes for access clamping (WinXP, MIPS) * wixl/.msi support for qemu-ga on Windows # gpg: Signature made Fri Jun 19 11:30:53 2015 BST using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: exec: clamp accesses against the MemoryRegionSection exec: do not clamp accesses to MMIO regions mc146818rtc: Reset the periodic timer on load qemu-timer: Call clock reset notifiers on forward jumps tests: virtio-scsi: Add test for unaligned WRITE SAME tests: virtio-scsi: Move start/stop to individual test functions libqos: Complete virtio device ID definition list libqos: Allow calling guest_free on NULL pointer tests: Link libqos virtio object to virtio-scsi-test i8254: fix out-of-bounds memory access in pit_ioport_read() qemu-ga: Building Windows MSI installation with configure/Makefile qemu-ga: Introduce Windows MSI script qemu-ga: debug printouts to help troubleshoot installation qemu-ga: adding vss-[un]install options qemu-log: Open file for logging when specified Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-21s3adsp1800: Remove the hardcoded values from the resetAlistair Francis
Remove the hardcoded values from the machine specific reset function, as the same values are already set in the standard MicroBlaze reset. This also allows the entire reset function to be deleted, as PVR registers are now preserved on reset. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21ml605_mmu: Move the hardcoded values to the init functionAlistair Francis
Move the hard coded register values to the init function. This also allows the entire reset function to be deleted, as PVR registers are now preserved on reset. The hardcoded PVR0 values can be removed as they are setting the endianness and stack protection, which is already done or invalid. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21target-microblaze: Convert version_mask to a CPU propertyAlistair Francis
Originally the version_mask PVR bits were manually set for each machine. This is a hassle and difficult to read, instead set them based on the CPU properties. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21target-microblaze: Convert endi to a CPU propertyAlistair Francis
Originally the endi PVR bits were manually set for each machine. This is a hassle and difficult to read, instead set them based on the CPU properties. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21target-microblaze: Convert dcache-writeback to a CPU propertyAlistair Francis
Originally the dcache-writeback PVR bits were manually set for each machine. This is a hassle and difficult to read, instead set them based on the CPU properties. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21target-microblaze: Convert use-fpu to a CPU propertyAlistair Francis
Originally the use-fpu PVR bits were manually set for each machine. This is a hassle and difficult to read, instead set them based on the CPU properties. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-21microblaze: s3adsp: Instantiate CPU using QOMPeter Crosthwaite
Instantiate and realise the CPU directly, rather than using cpu_mb_init. Microblazes cpu_model argument is a dummy so remove the default cpu_model set logic. Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-06-19qdev: Deprecated qdev_init() is finally unused, dropMarkus Armbruster
qdev_init() is a wrapper around setting property "realized" to true, plus error handling that passes errors to qerror_report_err(). qerror_report_err() is a transitional interface to help with converting existing monitor commands to QMP. It should not be used elsewhere. All code has been modernized to avoid qdev_init() and its inappropriate error handling. We can finally drop it. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-06-19arm: xlnx-zynqmp: Add 2xCortexR5 CPUsPeter Crosthwaite
Add the 2xCortexR5 CPUs to zynqmp board. They are powered off on reset (this is true of real hardware) by default or selectable as the boot processor. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: da34128c73ca13fc4f8c3293e1a33d1e1e345655.1434501320.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19arm: xlnx-zynqmp: Add boot-cpu propertyPeter Crosthwaite
Add a string property that specifies the primary boot cpu. All CPUs except the one selected will start-powered-off. This allows for elf boots on any CPU, which prepares support for booting R5 elfs directly on the R5 processors. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 53331c00d80c7ce9c6a83712348773f1b38fae2b.1434501320.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19arm: xlnx-zynqmp: Preface CPU variables with "apu"Peter Crosthwaite
The CPUs currently supported by zynqmp are the APU (application processing unit) CPUs. There are other CPUs in Zynqmp so unqualified "cpus" in ambiguous. Preface the variables with "APU" accordingly, to prepare support adding the RPU (realtime processing unit) processors. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: ce32287fc365aea898465e981da3546a227e0811.1434501320.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19hw/arm/sysbus-fdt: enable vfio-calxeda-xgmac dynamic instantiationEric Auger
This patch allows the instantiation of the vfio-calxeda-xgmac device from the QEMU command line (-device vfio-calxeda-xgmac,host="<device>"). A specialized device tree node is created for the guest, containing compat, dma-coherent, reg and interrupts properties. Signed-off-by: Eric Auger <eric.auger@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1434455898-17895-1-git-send-email-eric.auger@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell
virtio, pci fixes, enhancements Most notably this includes virtio cross-endian patches. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Fri Jun 19 11:18:05 2015 BST using RSA key ID D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" * remotes/mst/tags/for_upstream: vhost: enable vhost without without MSI-X pci: Don't register a specialized 'config_write' if default behavior is intended hw/core: rebase sysbus_get_fw_dev_path() to g_strdup_printf() vhost_net: re-enable when cross endian vhost-net: tell tap backend about the vnet endianness tap: fix non-linux build tap: add VNET_LE/VNET_BE operations vhost: set vring endianness for legacy virtio virtio: introduce virtio_legacy_is_cross_endian() linux-headers: sync vhost.h vhost-user: part of virtio Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19mc146818rtc: Reset the periodic timer on loadPaul Donohue
When loading a VM from a snapshot or migration, clock changes can cause the periodic timer to stall or loop rapidly. qemu-timer has a reset notifier mechanism that is used to avoid timer stalls or loops if the host clock changes while the VM is running when using QEMU_CLOCK_HOST. However, when loading a snapshot or migration, qemu-timer is initialized and fires the reset notifier before mc146818rtc is initialized and has registered its reset handler. In addition, this mechanism isn't used when using QEMU_CLOCK_REALTIME, which might also change when loading a snapshot or migration. To correct that problem, this commit resets the periodic timer after loading from a snapshot or migration if the clock has either jumped backward or has jumped forward by more than the clock jump limit that is used by the reset notifier code in qemu-timer. Signed-off-by: Paul Donohue <qemu-git@PaulSD.com> Message-Id: <20150612141013.GE2749@TopQuark.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-06-19vhost: enable vhost without without MSI-XPankaj Gupta
We use vhostforce to enable vhost even if Guests don't have MSI-X support and we fall back to QEMU virtio-net. This gives a very small performance gain, but the disadvantage is that guest now controls which virtio code is running (qemu or vhost) so our attack surface is doubled. This patch will enable vhost unconditionally whenever it's requested. For compatibility, enable vhost when vhostforce is set, as well. Signed-off-by: Pankaj Gupta <pagupta@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Jason Wang <jasowang@redhat.com>
2015-06-19pci: Don't register a specialized 'config_write' if default behavior is intendedShmulik Ladkani
Few devices have their specialized 'config_write' methods which simply call 'pci_default_write_config' followed by a 'msix_write_config' or 'msi_write_config' calls, using exact same arguments. This is unnecessary as 'pci_default_write_config' already invokes 'msi_write_config' and 'msix_write_config'. Also, since 'pci_default_write_config' is the default 'config_write' handler, we can simply avoid the registration of these specialized versions. Cc: Leonid Shatz <leonid.shatz@ravellosystems.com> Signed-off-by: Shmulik Ladkani <shmulik.ladkani@ravellosystems.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-19hw/core: rebase sysbus_get_fw_dev_path() to g_strdup_printf()Laszlo Ersek
This is done mainly for improving readability, and in preparation for the next patch, but Markus pointed out another bonus for the string being returned: "No arbitrary length limit. Before the patch, it's 39 characters, and the code breaks catastrophically when qdev_fw_name() is longer: the second snprintf() is called with its first argument pointing beyond path[], and its second argument underflowing to a huge size." Cc: qemu-stable@nongnu.org Signed-off-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-19vhost_net: re-enable when cross endianCédric Le Goater
Cross-endianness is now checked by the core vhost code. revert 371df9f5e0f1 "vhost-net: disable when cross-endian" Signed-off-by: Cédric Le Goater <clg@fr.ibm.com> [ added commit message, Greg Kurz <gkurz@linux.vnet.ibm.com> ] Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-19vhost-net: tell tap backend about the vnet endiannessGreg Kurz
The default behaviour for TAP/MACVTAP is to consider vnet as native endian. This patch handles the cases when this is not true: - virtio 1.0: always little-endian - legacy cross-endian Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-19q35: Re-enable FDC on pc-q35-2.3 and olderEduardo Habkost
commit ea96bc629cbd52be98b2967a4b4f72e91dfc3ee4 doesn't match the patch submitted by Laszlo to qemu-devel. We reuse pc_q35_2_4_machine_options() inside pc_q35_2_3_machine_options(), so we need to undo the no_floppy change in pc_q35_2_3_machine_options(). (This discrepancy was due to a bad merge.) This restores the previous behavior where all the 2.3 and older machines had no_floppy=0. Reported-by: Ján Tomko <jtomko@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-id: 1434646168-3100-1-git-send-email-ehabkost@redhat.com Cc: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> [PMM: mention that this was a merge issue, not a review issue] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-19qdev: Free property names after registering gpio aliasesEduardo Habkost
Now that object_property_add_alias() strdup()s target_name, we can free the property names in qdev_pass_gpios(). Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-06-18vfio: fix build error on CentOS 5.7Leon Alrae
Include linux/vfio.h after sys/ioctl.h, just like in hw/vfio/common.c. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Acked-by: Alex Williamson <alex.williamson@redhat.com> Message-id: 1434544500-22405-1-git-send-email-leon.alrae@imgtec.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-17vhost: set vring endianness for legacy virtioGreg Kurz
Legacy virtio is native endian: if the guest and host endianness differ, we have to tell vhost so it can swap bytes where appropriate. This is done through a vhost ring ioctl. Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-17i8254: fix out-of-bounds memory access in pit_ioport_read()Petr Matousek
Due converting PIO to the new memory read/write api we no longer provide separate I/O region lenghts for read and write operations. As a result, reading from PIT Mode/Command register will end with accessing pit->channels with invalid index. Fix this by ignoring read from the Mode/Command register. This is CVE-2015-3214. Reported-by: Matt Tait <matttait@google.com> Fixes: 0505bcdec8228d8de39ab1a02644e71999e7c052 Cc: qemu-stable@nongnu.org Signed-off-by: Petr Matousek <pmatouse@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-06-17s390x: Switch to s390-ccw machine as defaultAlexander Graf
We now finally have TCG support for the basic set of instructions necessary to run the s390-ccw machine. That means in any aspect possible that machine type is now superior to the legacy s390-virtio machine. Switch over to the ccw machine as default. That way people don't get a halfway broken machine with the s390x target. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com>
2015-06-17virtio-ccw: disable ioevent bit when ioeventfds are not enabledAurelien Jarno
This remove the corresponding error messages in TCG mode, and allow to simplify the s390_assign_subch_ioeventfd() function. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-06-16Merge remote-tracking branch 'remotes/kraxel/tags/pull-vga-20150615-1' into ↵Peter Maydell
staging virtio-gpu: pci support bits and virtio-vga. # gpg: Signature made Mon Jun 15 13:55:19 2015 BST using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/kraxel/tags/pull-vga-20150615-1: virtio-vga: add vgabios configuration virtio-vga: add '-vga virtio' support virtio-vga: add virtio gpu device with vga compatibility virtio-gpu-pci: add virtio pci support virtio-gpu: fix error message Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15hw/arm/virt-acpi-build: Add SPCR tableAndrew Jones
Signed-off-by: Andrew Jones <drjones@redhat.com> Tested-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 1433929959-29530-3-git-send-email-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15hw/arm/boot: fix rom_reset notifier registration orderEric Auger
commit ac9d32e39664e060cd1b538ff190980d57ad69e4 had the consequence to register the do_cpu_reset after the rom_reset one. Hence they get executed in the wrong order. This commit restores the registration of do_cpu_reset in arm_load_kernel. Signed-off-by: Eric Auger <eric.auger@linaro.org> Reported-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Tested-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1434111582-9325-1-git-send-email-eric.auger@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15hw/sd/pxa2xx_mmci: Stop using old_mmio in MemoryRegionOpsPeter Maydell
Update the pxa2xx_mmci device to stop using the old_mmio read and write callbacks in its MemoryRegionOps. This actually simplifies the code because the separate byte/halfword/word access functions were all calling into a single function to do the work anyway. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1434117989-7367-6-git-send-email-peter.maydell@linaro.org
2015-06-15hw/arm/pxa2xx: Convert pxa2xx-ssp to VMStatePeter Maydell
The pxa2xx-ssp device is already a QOM device but is still using the old-style register_savevm(); convert to VMState. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1434117989-7367-5-git-send-email-peter.maydell@linaro.org
2015-06-15hw/arm/pxa2xx: Add reset method for pxa2xx_sspPeter Maydell
The pxa2xx_ssp device was missing a reset method; add one. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter..crosthwaite@xilinx.com> Message-id: 1434117989-7367-4-git-send-email-peter.maydell@linaro.org
2015-06-15hw/arm/pxa2xx: Convert pxa2xx-fir to QOM and VMStatePeter Maydell
Convert the pxa2xx-fir device to QOM, including using a VMState for its migration info. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1434117989-7367-3-git-send-email-peter.maydell@linaro.org
2015-06-15hw/arm/pxa2xx: Mark coprocessor registers as ARM_CP_IOPeter Maydell
The pxa2xx custom coprocessor registers in cp6 and cp14 do device accesses, so mark the non-constant regs as ARM_CP_IO so that icount works correctly and doesn't abort. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1434117989-7367-2-git-send-email-peter.maydell@linaro.org
2015-06-15target-arm: Use the kernel's idea of MPIDR if we're using KVMPavel Fedin
When we're using KVM, the kernel's internal idea of the MPIDR affinity fields must match the values we tell it for the guest vcpu cluster configuration in the device tree. Since at the moment the kernel doesn't support letting userspace tell it the correct affinity fields to use, we must read the kernel's view and reflect that back in the device tree. Signed-off-by: Shlomo Pongratz <shlomo.pongratz@huawei.com> Signed-off-by: Pavel Fedin <p.fedin@samsung.com> Message-id: 02f601d0a1e6$90c7d630$b2578290$@samsung.com [PMM: Use a local #define rather than a global variable for the TCG ARM_CPUS_PER_CLUSTER setting. Tweak a comment. Update the commit message.] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15hw/arm/virt: Add cortex-a53 cpu support in machine virtShannon Zhao
Add cortex-a53 cpu support in machine virt, so it can be used for TCG and KVM. Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1433207452-4512-3-git-send-email-shannon.zhao@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15hw/display/exynos4210_fimd: Fix bit-swapping codePeter Maydell
fimd_swap_data() includes code to reverse the bits in a 64-bit integer, but an off-by-one error meant that it would try to shift off the top of the integer. Correct the bug (spotted by Coverity). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1432912615-23107-1-git-send-email-peter.maydell@linaro.org
2015-06-15arm_gic: gic_update should always update all coresJohan Karlsson
This patch fixes so that gic_update always updates all the cores with new pending irq states. If the function returns early it is possible to get interrupts that has already been acknowledged. Signed-off-by: Johan Karlsson <johan.karlsson@enea.com> [PMM: rebased to apply to current master] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15Merge remote-tracking branch 'remotes/borntraeger/tags/s390x-20150615' into ↵Peter Maydell
staging s390x/kvm/watchdog 1. Implement a diag288 based watchdog 2. Fix virtio-ccw BIOS for gcc >= 4.9 # gpg: Signature made Mon Jun 15 12:36:25 2015 BST using RSA key ID B5A61C7C # gpg: Good signature from "Christian Borntraeger (IBM) <borntraeger@de.ibm.com>" * remotes/borntraeger/tags/s390x-20150615: s390/bios: build with -fdelete-null-pointer-checks watchdog: Add new Virtual Watchdog action INJECT-NMI nmi: Implement inject_nmi() for non-monitor context use s390x/watchdog: diag288 migration support s390x/kvm: diag288 instruction interception and handling s390x/watchdog: introduce diag288 watchdog device watchdog: change option wording to allow for more watchdogs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-12Merge remote-tracking branch 'remotes/stefanha/tags/net-pull-request' into ↵Peter Maydell
staging # gpg: Signature made Fri Jun 12 13:57:20 2015 BST using RSA key ID 81AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" * remotes/stefanha/tags/net-pull-request: qmp/hmp: add rocker device support rocker: bring link up/down on PHY enable/disable rocker: update tests using hw-derived interface names rocker: Add support for phys name iohandler: Change return type of qemu_set_fd_handler to "void" event-notifier: Always return 0 for posix implementation xen_backend: Remove unused error handling of qemu_set_fd_handler oss: Remove unused error handling of qemu_set_fd_handler alsaaudio: Remove unused error handling of qemu_set_fd_handler main-loop: Drop qemu_set_fd_handler2 Change qemu_set_fd_handler2(..., NULL, ...) to qemu_set_fd_handler tap: Drop tap_can_send net/socket: Drop net_socket_can_send netmap: Drop netmap_can_send l2tpv3: Drop l2tpv3_can_send stubs: Add qemu_set_fd_handler Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-12Merge remote-tracking branch 'remotes/aurel/tags/pull-sh4-next-20150612' ↵Peter Maydell
into staging sh4 linux-user cpu and hwcap misc optimizations and cleanup convert r2d to new MMIO accessor style # gpg: Signature made Fri Jun 12 11:28:43 2015 BST using RSA key ID 1DDD8C9B # gpg: Good signature from "Aurelien Jarno <aurelien@aurel32.net>" # gpg: aka "Aurelien Jarno <aurelien@jarno.fr>" # gpg: aka "Aurelien Jarno <aurel32@debian.org>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 7746 2642 A9EF 94FD 0F77 196D BA9C 7806 1DDD 8C9B * remotes/aurel/tags/pull-sh4-next-20150612: target-sh4: remove dead code target-sh4: factorize fmov implementation target-sh4: split out Q and M from of SR and optimize div1 target-sh4: optimize negc using add2 and sub2 target-sh4: optimize subc using sub2 target-sh4: optimize addc using add2 target-sh4: Split out T from SR target-sh4: use bit number for SR constants sh4/r2d: convert to new MMIO accessor style linux-user: Add HWCAP for SH4 linux-user: Default sh4 to sh7785 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-12qmp/hmp: add rocker device supportScott Feldman
Add QMP/HMP support for rocker devices. This is mostly for debugging purposes to see inside the device's tables and port configurations. Some examples: (qemu) info rocker sw1 name: sw1 id: 0x0000013512005452 ports: 4 (qemu) info rocker-ports sw1 ena/ speed/ auto port link duplex neg? sw1.1 up 10G FD No sw1.2 up 10G FD No sw1.3 !ena 10G FD No sw1.4 !ena 10G FD No (qemu) info rocker-of-dpa-flows sw1 prio tbl hits key(mask) --> actions 2 60 pport 1 vlan 1 LLDP src 00:02:00:00:02:00 dst 01:80:c2:00:00:0e 2 60 pport 1 vlan 1 ARP src 00:02:00:00:02:00 dst 00:02:00:00:03:00 2 60 pport 2 vlan 2 IPv6 src 00:02:00:00:03:00 dst 33:33:ff:00:00:02 proto 58 3 50 vlan 2 dst 33:33:ff:00:00:02 --> write group 0x32000001 goto tbl 60 2 60 pport 2 vlan 2 IPv6 src 00:02:00:00:03:00 dst 33:33:ff:00:03:00 proto 58 3 50 1 vlan 2 dst 33:33:ff:00:03:00 --> write group 0x32000001 goto tbl 60 2 60 pport 2 vlan 2 ARP src 00:02:00:00:03:00 dst 00:02:00:00:02:00 3 50 2 vlan 2 dst 00:02:00:00:02:00 --> write group 0x02000001 goto tbl 60 2 60 1 pport 2 vlan 2 IP src 00:02:00:00:03:00 dst 00:02:00:00:02:00 proto 1 3 50 2 vlan 1 dst 00:02:00:00:03:00 --> write group 0x01000002 goto tbl 60 2 60 1 pport 1 vlan 1 IP src 00:02:00:00:02:00 dst 00:02:00:00:03:00 proto 1 2 60 pport 1 vlan 1 IPv6 src 00:02:00:00:02:00 dst 33:33:ff:00:00:01 proto 58 3 50 vlan 1 dst 33:33:ff:00:00:01 --> write group 0x31000000 goto tbl 60 2 60 pport 1 vlan 1 IPv6 src 00:02:00:00:02:00 dst 33:33:ff:00:02:00 proto 58 3 50 1 vlan 1 dst 33:33:ff:00:02:00 --> write group 0x31000000 goto tbl 60 1 60 173 pport 2 vlan 2 LLDP src <any> dst 01:80:c2:00:00:0e --> write group 0x02000000 1 60 6 pport 2 vlan 2 IPv6 src <any> dst <any> --> write group 0x02000000 1 60 174 pport 1 vlan 1 LLDP src <any> dst 01:80:c2:00:00:0e --> write group 0x01000000 1 60 174 pport 2 vlan 2 IP src <any> dst <any> --> write group 0x02000000 1 60 6 pport 1 vlan 1 IPv6 src <any> dst <any> --> write group 0x01000000 1 60 181 pport 2 vlan 2 ARP src <any> dst <any> --> write group 0x02000000 1 10 715 pport 2 --> apply new vlan 2 goto tbl 20 1 60 177 pport 1 vlan 1 ARP src <any> dst <any> --> write group 0x01000000 1 60 174 pport 1 vlan 1 IP src <any> dst <any> --> write group 0x01000000 1 10 717 pport 1 --> apply new vlan 1 goto tbl 20 1 0 1432 pport 0(0xffff) --> goto tbl 10 (qemu) info rocker-of-dpa-groups sw1 id (decode) --> buckets 0x32000001 (type L2 multicast vlan 2 index 1) --> groups [0x02000001,0x02000000] 0x02000001 (type L2 interface vlan 2 pport 1) --> pop vlan out pport 1 0x01000002 (type L2 interface vlan 1 pport 2) --> pop vlan out pport 2 0x02000000 (type L2 interface vlan 2 pport 0) --> pop vlan out pport 0 0x01000000 (type L2 interface vlan 1 pport 0) --> pop vlan out pport 0 0x31000000 (type L2 multicast vlan 1 index 0) --> groups [0x01000002,0x01000000] [Added "query-" prefixes to rocker.json commands as suggested by Eric Blake <eblake@redhat.com>. --Stefan] Signed-off-by: Scott Feldman <sfeldma@gmail.com> Signed-off-by: Jiri Pirko <jiri@resnulli.us> Message-id: 1433985681-56138-5-git-send-email-sfeldma@gmail.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2015-06-12rocker: bring link up/down on PHY enable/disableScott Feldman
When the OS driver enables/disables the port, go ahead and set the port's link status to up/down in response to the change. This more closely emulates real hardware when the PHY for the port is brought up/down and the PHY negotiates carrier (link status) with link partner. In the case of qemu, the virtual rocker device can't really do link negotiation with the link partner as that requires signally over a physical medium (the wire), so just pretend the negotiation was successful and bring the link up when the port is enabled. Signed-off-by: Scott Feldman <sfeldma@gmail.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 1433985681-56138-4-git-send-email-sfeldma@gmail.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2015-06-12rocker: Add support for phys nameDavid Ahern
Add ROCKER_TLV_CMD_PORT_SETTINGS_PHYS_NAME to port settings. This attribute exports the port name to the guest OS allowing it to name interfaces with sensible defaults. Mostly done by Scott for phys_id support; adapted to phys_name by David. Signed-off-by: Scott Feldman <sfeldma@gmail.com> Signed-off-by: David Ahern <dsahern@gmail.com> Message-id: 1433985681-56138-2-git-send-email-sfeldma@gmail.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2015-06-12xen_backend: Remove unused error handling of qemu_set_fd_handlerFam Zheng
The function cannot fail, so the check is superfluous. Signed-off-by: Fam Zheng <famz@redhat.com> Message-id: 1433400324-7358-12-git-send-email-famz@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2015-06-12Merge remote-tracking branch 'remotes/lalrae/tags/mips-20150612' into stagingPeter Maydell
MIPS patches 2015-06-12 Changes: * improve dp8393x network card and rc4030 chipset emulation * support misaligned R6 and MSA memory accesses * support MIPS eXtended and Large Physical Addressing * add Config5.FRE bit and ERETNC instruction (Config5.LLB) * support ememsize on MALTA # gpg: Signature made Fri Jun 12 09:38:11 2015 BST using RSA key ID 0B29DA6B # gpg: Good signature from "Leon Alrae <leon.alrae@imgtec.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8DD3 2F98 5495 9D66 35D4 4FC0 5211 8E3C 0B29 DA6B * remotes/lalrae/tags/mips-20150612: (29 commits) target-mips: enable XPA and LPA features target-mips: remove misleading comments in translate_init.c target-mips: add MTHC0 and MFHC0 instructions target-mips: add CP0.PageGrain.ELPA support target-mips: support Page Frame Number Extension field target-mips: extend selected CP0 registers to 64-bits in MIPS32 target-mips: correct MFC0 for CP0.EntryLo in MIPS64 net/dp8393x: fix hardware reset net/dp8393x: correctly reset in_use field net/dp8393x: add load/save support net/dp8393x: add PROM to store MAC address net/dp8393x: QOM'ify net/dp8393x: use dp8393x_ prefix for all functions net/dp8393x: do not use old_mmio accesses net/dp8393x: always calculate proper checksums dma/rc4030: convert to QOM dma/rc4030: use trace events instead of custom logging dma/rc4030: document register at offset 0x210 dma/rc4030: do not use old_mmio accesses dma/rc4030: use AddressSpace and address_space_rw in users ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-12sh4/r2d: convert to new MMIO accessor styleAurelien Jarno
The documentation is clear to use 16-bit accesses for all registers. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-23 02:27:49 +0000