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path: root/hw/sh_pci.c
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2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-15qom: Unify type registrationAndreas Färber
Replace device_init() with generalized type_init(). While at it, unify naming convention: type_init([$prefix_]register_types) Also, type_init() is a function, so add preceding blank line where necessary and don't put a semicolon after the closing brace. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Cc: malc <av1474@comtv.ru> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03qdev: register all types natively through QEMU Object ModelAnthony Liguori
This was done in a mostly automated fashion. I did it in three steps and then rebased it into a single step which avoids repeatedly touching every file in the tree. The first step was a sed-based addition of the parent type to the subclass registration functions. The second step was another sed-based removal of subclass registration functions while also adding virtual functions from the base class into a class_init function as appropriate. Finally, a python script was used to convert the DeviceInfo structures and qdev_register_subclass functions to TypeInfo structures, class_init functions, and type_register_static calls. We are almost fully converted to QOM after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27sysbus: apic: ioapic: convert to QEMU Object ModelAnthony Liguori
This converts three devices because apic and ioapic are subclasses of sysbus. Converting subclasses independently of their base class is prohibitively hard. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27pci: convert to QEMU Object ModelAnthony Liguori
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-12-19sh_pci: remove sysbus_init_mmio_cb2 usageBenoît Canet
The isa region is not exposed as a sysbus region because the iobr register contains its address and use it to remap dynamically the region. (Peter Maydell's idea) Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Benoît Canet <benoit.canet@gmail.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-11-28sysbus: rename sysbus_init_mmio_region() to sysbus_init_mmio()Avi Kivity
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-08-28sh_pci: Fix sh_pci memory alias confusionAvi Kivity
The a7 area was set up as an alias of itself, rather than the p4 area. This sent the memory core into infinite recursion. Fix by aliasing the a7 area to the p4 area. Signed-off-by: Avi Kivity <avi@redhat.com>
2011-08-22sh_pci: convert to memory APIAvi Kivity
Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-08pci: pass I/O address space to new PCI busAvi Kivity
This lets us register BARs in the I/O address space. Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-07-29pci: pass address space to pci bus when createdAvi Kivity
This is now done sloppily, via get_system_memory(). Eventually callers will be converted to stop using that. Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-06-12hw/sh_pci.c: convert to PCIDeviceInfo to initialize idsIsaku Yamahata
use PCIDeviceInfo to initialize ids. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2011-01-20sh_pci: qdev conversionAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-12-11isa_mmio: Always use little endianAlexander Graf
This patch converts the ISA MMIO bridge code to always use little endian mmio. All bswap code that existed was only there to convert from native cpu endianness to little endian ISA devices. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-11Add endianness as io mem parameterAlexander Graf
As stated before, devices can be little, big or native endian. The target endianness is not of their concern, so we need to push things down a level. This patch adds a parameter to cpu_register_io_memory that allows a device to choose its endianness. For now, all devices simply choose native endian, because that's the same behavior as before. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-13sh_pci: fix memory and I/O accessAurelien Jarno
Since commit 8da3ff180974732fc4272cb4433fef85c1822961 ("MMIO callback interface changes"), the addresses passed to the I/O functions are an offset to the start of the area. As a consequence, there is no need to correct the address using the value of IOBR. This make possible the use of the default MMIO functions. Moreover the addresses are now remaped when the value if IOBR change. The memory area corresponds to the devices behing the PCI bus, it should not be mapped by the PCI controller. Remove the corresponding code. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-01pci: move pci_data_{read, write}() declaration from pci.h to pci_host.hIsaku Yamahata
Now pci host stuff has been moved from pci.[hc] to pci_host.[hc] so the declaration of pci_data_{read, write}() should be in pci_host.h This patch moves them from pci.h to pci_host.h for consistency. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2009-12-01pci: pci.h cleanup: move out stuff not in pci.cMichael S. Tsirkin
pci.h declares some functions which aren't defined in pci.h. Clean up moving things to appropriate headers, and update all users. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Get rid of _t suffixmalc
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
2009-09-20ioports: remove unused env parameter and compile only onceBlue Swirl
The CPU state parameter is not used, remove it and adjust callers. Now we can compile ioport.c once for all targets. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-09-04We want the argument pass to set_irq to be opaqueJuan Quintela
piix_pci want to pass more things that the pic Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-25Make CPURead/WriteFunc structure 'const'Blue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-06-16Remove io_index argument from cpu_register_io_memory()Avi Kivity
The parameter is always zero except when registering the three internal io regions (ROM, unassigned, notdirty). Remove the parameter to reduce the API's power, thus facilitating future change. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-05-23Add common BusStatePaul Brook
Implement and use a common device bus state. The main side-effect is that creating a bus and attaching it to a parent device are no longer separate operations. For legacy code we allow a NULL parent, but that should go away eventually. Also tweak creation code to veriry theat a device in on the right bus. Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-03-13Add and use remaining #defines for PCI device IDs (Stuart Brady)aliguori
This patch adds and uses #defines for the remaining hardcoded PCI device IDs. It also moves definitions taken from linux/pci_ids.h into a separate header (hw/pci_ids.h), removes the 'RTL' from PCI_DEVICE_ID_REALTEK_RTL8029, and renames PCI_DEVICE_ID_FSL_E500 to PCI_DEVICE_ID_MPC8533E to match Linux's definition. Changes in v2: * Don't use C99-style comments * Move definitions from linux/pci_ids.h into a separate header * Rename PCI_DEVICE_ID_FSL_E500 to PCI_DEVICE_ID_MPC8533E Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6841 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-26Define PCI vendor and device IDs in pci.h (Stuart Brady)aliguori
This patch defines PCI vendor and device IDs in pci.h (matching those from Linux's pci_ids.h), and uses those definitions where appropriate. Change from v1: Introduces pci_config_set_vendor_id() / pci_config_set_device_id() accessors as suggested by Anthony Liguori. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6442 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-24sh4: sh_pci. Register resouces both at A7 and P4.aurel32
Add resource registration both for P4 and A7. This is needed because of #5935 SH4: Eliminate P4 to A7 mangling. Additionally, {reg,iop,mem}base which is no longer used are removed. Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6433 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13Remove unnecessary trailing newlinesblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6000 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07SH: Don't subtract bases from access addresses in PCIC.balrog
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5928 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07SH: On-chip PCI controller support (Takashi YOSHII).balrog
This patch adds SuperH on-chip PCI controller(PCIC) support. Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5927 c046a42c-6fe2-441c-8c8c-71466251a162
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-26 14:12:45 +0000