slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Expand)	Author
2020-09-09	hw/riscv: Move sifive_test model to hw/misc	Bin Meng
2020-09-09	hw/riscv: Move sifive_plic model to hw/intc	Bin Meng
2020-09-09	hw/riscv: Move sifive_clint model to hw/intc	Bin Meng
2020-09-09	hw/riscv: clint: Avoid using hard-coded timebase frequency	Bin Meng
2020-08-25	hw/riscv: virt: Allow creating multiple NUMA sockets	Anup Patel
2020-08-25	hw/riscv: Allow creating multiple instances of PLIC	Anup Patel
2020-08-25	hw/riscv: Allow creating multiple instances of CLINT	Anup Patel
2020-08-21	hw/riscv: Use pre-built bios image of generic platform for virt & sifive_u	Bin Meng
2020-07-13	hw/riscv: Modify MROM size to end at 0x10000	Bin Meng
2020-07-13	riscv: Add opensbi firmware dynamic support	Atish Patra
2020-07-13	RISC-V: Copy the fdt in dram instead of ROM	Atish Patra
2020-07-13	riscv: Unify Qemu's reset vector code path	Atish Patra
2020-07-13	hw/riscv: virt: Sort the SoC memmap table entries	Bin Meng
2020-07-10	qom: Put name parameter before value / visitor parameter	Markus Armbruster
2020-06-15	sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1	Markus Armbruster
2020-06-15	sysbus: Convert to sysbus_realize() etc. with Coccinelle	Markus Armbruster
2020-06-15	qdev: Convert uses of qdev_create() manually	Markus Armbruster
2020-06-15	qdev: Convert uses of qdev_create() with Coccinelle	Markus Armbruster
2020-06-15	riscv: Fix to put "riscv.hart_array" devices on sysbus	Markus Armbruster
2020-06-03	hw/riscv: virt: Remove the riscv_ prefix of the machine* functions	Bin Meng
2020-05-18	hw: Use QEMU_IS_ALIGNED() on parallel flash block size	Philippe Mathieu-Daudé
2020-05-15	qom: Drop parameter @errp of object_property_add() & friends	Markus Armbruster
2020-04-29	hw/riscv: Add optional symbol callback ptr to riscv_load_firmware()	Anup Patel
2020-04-29	hw/riscv: Generate correct "mmu-type" for 32-bit machines	Bin Meng
2020-02-27	hw/riscv: Provide rdtime callback for TCG in CLINT emulation	Anup Patel
2020-02-27	riscv: virt: Allow PCI address 0	Bin Meng
2020-02-10	riscv: virt: Use Goldfish RTC device	Anup Patel
2020-02-10	riscv/virt: Add syscon reboot and poweroff DT nodes	Anup Patel
2019-11-25	hw/riscv: Add optional symbol callback ptr to riscv_load_kernel()	Zhuang, Siwei (Data61, Kensington NSW)
2019-11-25	RISC-V: virt: This is a "sifive,test1" test finisher	Palmer Dabbelt
2019-11-14	riscv/virt: Increase flash size	Alistair Francis
2019-10-28	riscv/virt: Jump to pflash if specified	Alistair Francis
2019-10-28	riscv/virt: Add the PFlash CFI01 device	Alistair Francis
2019-10-28	riscv/virt: Manually define the machine	Alistair Francis
2019-10-28	riscv: hw: Drop "clock-frequency" property of cpu nodes	Bin Meng
2019-09-17	riscv: hw: Change create_fdt() to return void	Bin Meng
2019-09-17	riscv: hw: Remove not needed PLIC properties in device tree	Bin Meng
2019-09-17	riscv: hw: Use qemu_fdt_setprop_cell() for property with only 1 cell	Bin Meng
2019-09-17	riscv: hw: Remove superfluous "linux, phandle" property	Bin Meng
2019-08-16	Include sysemu/sysemu.h a lot less	Markus Armbruster
2019-08-16	Include hw/hw.h exactly where needed	Markus Armbruster
2019-07-18	hw/riscv: Load OpenSBI as the default firmware	Alistair Francis
2019-07-05	hw/riscv: Replace global smp variables with machine smp properties	Like Xu
2019-06-27	hw/riscv: Add support for loading a firmware	Alistair Francis
2019-06-27	hw/riscv: Split out the boot functions	Alistair Francis
2019-06-25	riscv: virt: Add cpu-topology DT node.	Atish Patra
2019-06-23	riscv: virt: Correct pci "bus-range" encoding	Bin Meng
2019-05-24	riscv: virt: Allow specifying a CPU via commandline	Alistair Francis
2019-05-24	target/riscv: Remove unused include of riscv_htif.h for virt board riscv	Jonathan Behrens
2019-02-11	riscv: Ensure the kernel start address is correctly cast	Alistair Francis