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2013-07-04piolist: add owner argument to initialization functions and pass devicesPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04spapr_iommu: pass device to spapr_tce_new_table and use it to set ownerPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04memory: add owner argument to initialization functionsPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04prep: replace register_ioport*Jan Kiszka
Convert over to memory regions to obsolete register_ioport*. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-01PPC: Newworld: Add second uninorth control register setAlexander Graf
Mac OS X requires a second uninorth register set to be mapped a few bytes above the first one. Let's just expose it to make it happy. Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01PPC: Newworld: Add uninorth token registerAlexander Graf
Mac OS X expects the uninorth control register set to contain one register that always reads back what it writes in. Expose that. This is just a temporary hack. Eventually, we want to expose the uninorth (/uni-n in device tree) as a separate QOM device. Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01PPC: Add clock-frequency export for Mac machinesAlexander Graf
Support in fwcfg has been around for exposure of the clock-frequency CPU property. OpenBIOS reads it, we just never exposed it. Since Mac OS X is very picky about its clock frequency values, let's just take a known good value and always expose that. Reported-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01booke_ppc: limit booke timer to max when timeout overflowBharat Bhushan
Limit watchdog and fit timer to maximum timeout value which qemu timer can support (INT64_MAX). This maximum timeout will be hundreds of years, so limiting to max timeout is pretty safe. Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01pseries: Fix compiler warning (conversion of pointer to integral value)Stefan Weil
This kind of type cast must use uintptr_t or target_ulong to be portable for hosts with sizeof(void *) != sizeof(long). Here the value is assigned to a variable of type target_ulong. Signed-off-by: Stefan Weil <sw@weilnetz.de> [agraf: fix compilation on 32bit hosts] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01spapr-rtas: add CPU argument to RTAS callsAnthony Liguori
RTAS is a hypervisor provided binary blob that a guest loads and calls into to execute certain functions. It's similar to the vsyscall page in Linux or the short lived VMCI paravirt interface from VMware. The QEMU implementation of the RTAS blob is simply a passthrough that proxies all RTAS calls to the hypervisor via an hypercall. While we pass a CPU argument for hypercall handling in QEMU, we don't pass it for RTAS calls. Since some RTAs calls require making hypercalls (normally RTAS is implemented as guest code) we have nasty hacks to allow that. Add a CPU argument to RTAS call handling so we can more easily invoke hypercalls just as guest code would. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01target-ppc: Change default machine for 64-bitDavid Gibson
Currently, for qemu-system-ppc64, the default machine type is 'mac99'. The mac99 machine is not being actively maintained, and represents a bizarre hybrid of components that never actually existed as a real system. This patch changes the default machine to 'pseries', which is actively maintained and works well with most modern ppc64 Linux distributions as a guest. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> [agraf: adjust commit message] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01mpc8544_guts: Turn qdev initfn into instance_initAndreas Färber
SysBus can deal with NULL SysBusDeviceClass::init since 4ce5dae. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01mpc8544_guts: QOM'ifyAndreas Färber
Introduce type constant, cast macro and rename parent field. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01mpc8544_guts: Fix MemoryRegion nameAndreas Färber
6544 -> 8544 Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01intc/openpic_kvm: Fix QOM and build issuesAndreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01intc/openpic: QOM'ifyAndreas Färber
Introduce type constant and cast macro. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01kvm/openpic: in-kernel mpic supportScott Wood
Enables support for the in-kernel MPIC that thas been merged into the KVM next branch. This includes irqfd/KVM_IRQ_LINE support from Alex Graf (along with some other improvements). Note from Alex regarding kvm_irqchip_create(): On x86, one would call kvm_irqchip_create() to initialize an in-kernel interrupt controller. That function then goes ahead and initializes global capability variables as well as the default irq routing table. On ppc, we can't call kvm_irqchip_create() because we can have different types of interrupt controllers. So we want to do all the things that function would do for us in the in-kernel device init handler. Signed-off-by: Scott Wood <scottwood@freescale.com> [agraf: squash in kvm_irqchip_commit_routes patch, fix non-kvm build, fix ppcemb] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-01PPC: e500: factor out mpic init codeScott Wood
KVM in-kernel MPIC support is going to expand this even more, so let's keep it contained. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-06-28cpu: Change cpu_exit() argument to CPUStateAndreas Färber
It no longer depends on CPUArchState, so move it to qom/cpu.c. Prepares for changing GDBState::c_cpu to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-28kvm: Change cpu_synchronize_state() argument to CPUStateAndreas Färber
Change Monitor::mon_cpu to CPUState as well. Reviewed-by: liguang <lig.fnst@cn.fujitsu.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-28kvm: Change kvm_cpu_synchronize_state() argument to CPUStateAndreas Färber
It no longer relies on CPUArchState since 20d695a. Reviewed-by: liguang <lig.fnst@cn.fujitsu.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-20memory: give name to every AddressSpaceAlexey Kardashevskiy
The "info mtree" command in QEMU console prints only "memory" and "I/O" address spaces while there are actually a lot more other AddressSpace structs created by PCI and VIO devices. Those devices do not normally have names and therefore not present in "info mtree" output. The patch fixes this. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-20dma: eliminate DMAContextPaolo Bonzini
The DMAContext is a simple pointer to an AddressSpace that is now always already available. Make everyone hold the address space directly, and clean up the DMA API to use the AddressSpace directly. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-20spapr_vio: take care of creating our own AddressSpace/DMAContextPaolo Bonzini
Fetch the root region from the sPAPRTCETable, and use it to build an AddressSpace and DMAContext. Now, everywhere we have a DMAContext we also have access to the corresponding AddressSpace (either because we create it just before the DMAContext, or because dma_context_memory's AddressSpace is trivially address_space_memory). Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-20pci: use memory core for iommu supportAvi Kivity
Use the new iommu support in the memory core for iommu support. The only user, spapr, is also converted, but it still provides a DMAContext interface until the non-PCI bits switch to AddressSpace. Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Avi Kivity <avi.kivity@gmail.com> [ Do not calls memory_region_del_subregion() on the device's bus_master_enable_region, it is an alias; return an AddressSpace from the IOMMU hook and remove the destructor hook. - David Gibson ] Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-20dma: eliminate old-style IOMMU supportPaolo Bonzini
The translate function in the DMAContext is now always NULL. Remove every reference to it. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-20spapr: use memory core for iommu supportPaolo Bonzini
Now we can stop using a "translating" DMAContext, but we do not yet modify the sPAPRTCETable users to get an AddressSpace; they keep using the table via a DMAContext. Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-20spapr: make IOMMU translation go through IOMMUTLBEntryPaolo Bonzini
The next step is to introduce the translation code that will be used for IOMMU MemoryRegions, but still do the actual translation in a DMAContext. Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-20spapr: convert TCE API to use an opaque typePaolo Bonzini
The TCE table is currently returned as a DMAContext, and non-type-safe APIs are called later passing back the DMAContext. Since we want to move away from DMAContext, use an opaque type instead, and add an accessor to retrieve the DMAContext from it. Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-17Merge remote-tracking branch 'pmaydell/configury.next' into stagingAnthony Liguori
# By Paolo Bonzini (4) and others # Via Peter Maydell * pmaydell/configury.next: ppc: Remove CONFIG_FDT conditionals microblaze: Remove CONFIG_FDT conditionals arm: Remove CONFIG_FDT conditionals configure: Require libfdt for arm, ppc, microblaze softmmu targets configure: dtc: Probe for libfdt_env.h build: drop TARGET_TYPE main: use TARGET_ARCH only for the target-specific #define build: do not use TARGET_ARCH build: rename TARGET_ARCH2 to TARGET_NAME Add a stp file for usage from build directory Message-id: 1371221594-11556-1-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-06-15Merge branch 'realize-isa.v2' of git://github.com/afaerber/qemu-cpuBlue Swirl
* 'realize-isa.v2' of git://github.com/afaerber/qemu-cpu: qdev: Drop FROM_QBUS() macro isa: QOM'ify ISADevice isa: QOM'ify ISABus i8259: Convert PICCommonState to use QOM realizefn kvm/i8259: QOM'ify some more i8259: QOM'ify some more i8254: Convert PITCommonState to QOM realizefn kvm/i8254: QOM'ify some more i8254: QOM'ify some more isa: Use realizefn for ISADevice cs4231a: QOM'ify some more gus: QOM'ify some more
2013-06-14ppc: Remove CONFIG_FDT conditionalsPeter Maydell
Now that we know we're compiling with libfdt we can remove the CONFIG_FDT conditionals. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Message-id: 1369409217-7553-5-git-send-email-peter.maydell@linaro.org
2013-06-13spapr_rtas: Abstract rtas_start_cpu() with qemu_get_cpu()Andreas Färber
Instead of looping over all CPUArchState, use a helper to obtain the desired CPUState. Free the "cpu" variable for PowerPCCPU, to access its CPUPPCState. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-12spapr_rtas: Abstract rtas_query_cpu_stopped_state() with qemu_get_cpu()Andreas Färber
Instead of looping over all CPUArchState, use a helper to obtain the desired CPUState directly. Saves a CPUPPCState variable and QOM cast. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-07isa: QOM'ify ISADeviceAndreas Färber
Rename its parent field and use DEVICE() where necessary. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-07isa: QOM'ify ISABusAndreas Färber
Rename its parent field and use ISA_BUS() where necessary. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-05-18remove some double-includesMichael Tokarev
Some source files #include the same header more than once for no good reason. Remove second #includes in such cases. Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-05-06PPC: e500: correct params->ram_size with ram_sizeTiejun Chen
We should sync params->ram_size after we fixup memory size on a alignment boundary. Otherwise Guest would exceed the actual memory region. Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-05-06PPC: e500: initialize GPRs as per epaprBharat Bhushan
ePAPR defines the initial values of cpu registers. This patch initialize the GPRs as per ePAPR specification. This resolves the issue of guest reboot/reset (guest hang on reboot). Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> [agraf: add whitespace line] Signed-off-by: Alexander Graf <agraf@suse.de>
2013-05-06pseries: Fix debug message for out-of-bounds address in H_PUT_TCEDavid Gibson
Due to a brain outage, this message says "out-of-boards" instead of "out-of-bounds". Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-05-06pseries: Factor out check for out-of-bounds LIOBNDavid Gibson
PAPR defines LIOBNs (Logical IO Bus Numbers) to be 32-bit, and we check for values that aren't in the code for H_PUT_TCE. This patch factors the check into spapr_tce_find_by_liobn(), which already checks if a 32-bit LIOBN actually exists. This will become more important as future patches add other hypercalls which need to look up a LIOBN. At the same time we fix the typo in the message. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-05-06prep: Make System I/O port 0092 read/writeJulio Guerra
Port 0x0092 is documented as read/write, so for now return the endianness state instead of hardcoded 0x00. Signed-off-by: Julio Guerra <guerr@julio.in> [AF: Extracted from larger port 0092 patch] Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-05-05prep: Add ELF support for -biosAndreas Färber
This prepares for switching from OpenHack'Ware to OpenBIOS. While touching the error handling code, switch from aborting hw_error() to fprintf()+exit() and suppress failing without -bios for qtest. Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-05-05prep: Fix NIP reset valueFabien Chouteau
The value was changed by commit 09d9828ace37ead29d510a7e24e63c2f15cd4b1c "PPC: fix hreset_vector for 60x, ...". Change it back for prep machine to unbreak OpenHack'Ware. Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Andreas Färber <andreas.faerber@web.de>
2013-04-29audio: enable PCI audio cards for all PCI-enabled targetsPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1366303444-24620-9-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-29audio: look for the ISA and PCI busesPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1366303444-24620-8-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-26pseries: Generate device paths for VIO devicesDavid Gibson
This patch implements a get_dev_path qdev hook for the pseries paravirtual VIO bus. With upcoming savevm support, this will become very important for scsi disks hanging of VIO virtual SCSI adapters. scsibus_get_dev_path uses the get_dev_path of the parent adapter if available, but otherwise just uses a local channel/target/lun number to identify the device. So if two disks are present in the system having the same target and lun on seperate VIO scsi adapters, savevm cannot distinguish them. Since the conventional way of using VSCSI adapters is to have just one disk per adapter, such a conflict is very likely. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-04-26pseries: Convert VIO code to QOM style type safe(ish) castsDavid Gibson
Curerntly the pseries VIO device code contains quite a few explicit uses of DO_UPCAST and plain C casts. This is (obviously) type unsafe, and not the conventional way of doing things in the QOM model. This patch converts the code to use the QOM convention of per-type macros to do verified casts with OBJECT_CHECK(). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-04-26pseries: Fix some small errors in XICS logicDavid Gibson
Under certain circumstances the emulation for the pseries "XICS" interrupt controller was clearing a pending interrupt from the XISR register, without also clearing the corresponding priority variable. This will cause problems later when can trigger sanity checks in the under-development in-kernel XICS implementation. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-04-26pseries: Fixes and enhancements to L1 cache propertiesDavid Gibson
PAPR requires that the device tree's CPU nodes have several properties with information about the L1 cache. We already create two of these properties, but with incorrect names - "[id]cache-block-size" instead of "[id]-cache-block-size" (note the extra hyphen). We were also missing some of the required cache properties. This patch adds the [id]-cache-line-size properties (which have the same values as the block size properties in all current cases). We also add the [id]-cache-size properties. Adding the cache sizes requires some extra infrastructure in the general target-ppc code to (optionally) set the cache sizes for various CPUs. The CPU family descriptions in translate_init.c can set these sizes - this patch adds correct information for POWER7, I'm leaving other CPU types to people who have a physical example to verify against. In addition, for -cpu host we take the values advertised by the host (if available) and use those to override the information based on PVR. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
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