Age | Commit message (Collapse) | Author |
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Rely on the subpage system instead of the local version.
Make most functions "static".
Fix wrong parameter passed to ppc4xx_pob_reset.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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Signed-off-by: Paul Brook <paul@cofdesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7067 c046a42c-6fe2-441c-8c8c-71466251a162
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ppc4xx_devs.c
The SDRAM controller is shared across almost all 405 and 440 embedded
processors, with some slight differences such as the sizes supported for each
memory bank.
Code movement only; no functional changes.
Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6061 c046a42c-6fe2-441c-8c8c-71466251a162
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(mostly CPU registration and UIC, for now).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3340 c046a42c-6fe2-441c-8c8c-71466251a162
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3245 c046a42c-6fe2-441c-8c8c-71466251a162
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2962 c046a42c-6fe2-441c-8c8c-71466251a162
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- use target_phys_addr_t for physical addresses / offsets
- implement fake general purpose timers and memory access layer
for PowerPC 405EP
- more assigned internal IRQs.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2716 c046a42c-6fe2-441c-8c8c-71466251a162
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- compilation warning fixes
- make loglevel tests consistent
- use cpu_abort instead of printf(...); exit
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2706 c046a42c-6fe2-441c-8c8c-71466251a162
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Preliminary code for -kernel option support for PowerPC 405 boards
Fix DBSR in case of PowerPC 405 chip reset
Add enums for PowerPC 405 clocks.
Fix IRQ numbers (IBM reversed bits numbering...)
Fix SPRG4-7 read access right
Fix MSR mask in CPU definitions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2692 c046a42c-6fe2-441c-8c8c-71466251a162
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