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path: root/hw/ppc/ppc4xx_sdram.c
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2022-10-28ppc4xx_sdram: Add errp parameter to ppc4xx_sdram_banks()BALATON Zoltan
Do not exit from ppc4xx_sdram_banks() but report error via an errp parameter instead. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <04bb3445439c2f37b99e74b3fdf4e62c2e6f7e04.1666194485.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-10-28ppc4xx_sdram: Convert DDR SDRAM controller to new bank handlingBALATON Zoltan
Use the generic bank handling introduced in previous patch in the DDR SDRAM controller too. This also fixes previously broken region unmap due to sdram_ddr_unmap_bcr() ignoring container region so it crashed with an assert when the guest tried to disable the controller. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <fc7c50e365d0027a659111e9cd67f9b93113a163.1666194485.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-10-28ppc4xx_sdram: Generalise bank setupBALATON Zoltan
Currently only base and size are set on initial bank creation and bcr value is computed on mapping the region. Set bcr at init so the bcr encoding method becomes local to the controller model and mapping and unmapping can operate on the bank so it can be shared between different controller models. This patch converts the DDR2 controller. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <51b957b4b2d714a1072aa2589b979e08411640df.1666194485.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-10-28ppc4xx_sdram: Rename local state variable for brevityBALATON Zoltan
Rename the sdram local state variable to s in dcr read/write functions and reset methods for better readability and to match realize methods. Other places not converted will be changed or removed in subsequent patches. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <8e7539cb1fccd7556b68351c4dcf62534c3a69cf.1666194485.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-10-28ppc4xx_sdram: Use hwaddr for memory bank sizeBALATON Zoltan
This resolves the target_ulong dependency that's clearly wrong and was also noted in a fixme comment. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <92fdc5f9cc76bf45831428b3ec8d9fc6241b7190.1666194485.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-10-28ppc4xx_sdram: Move ppc4xx_sdram_banks() to ppc4xx_sdram.cBALATON Zoltan
This function is only used by the ppc4xx memory controller models so it can be made static. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <b1504a82157a586aa284e8ee3b427b9a07b24169.1666194485.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-10-28ppc4xx_devs.c: Move DDR SDRAM controller model to ppc4xx_sdram.cBALATON Zoltan
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <3ea98072dbeb757942e25dcfcdd6a7a47738d2ca.1666194485.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-10-28ppc440_uc.c: Move DDR2 SDRAM controller model to ppc4xx_sdram.cBALATON Zoltan
In order to move PPC4xx SDRAM controller models together move out the DDR2 controller model from ppc440_uc.c into a new ppc4xx_sdram.c file. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <2f2900f93e997480e54b7bf9c32bb482a0fb1022.1666194485.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
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