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path: root/hw/pci-host
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2013-07-04pam: pass device to init_pam and use it to set ownerPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-04memory: add owner argument to initialization functionsPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-06-02dec.c - move to pci-bridgeMichael S. Tsirkin
Looks like dec.c is in pci-host by mistake. Moving it over to pci-bridge. Acked-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-05-30q35: set fw_nameMichael S. Tsirkin
PCI host bridges need to set fw_name to be discoverable by bios for boot device selection. In particular, seabios expects root device to be called "/pci/@i0cf8", so let's set it up like that for Q35. Cc: qemu-stable@nongnu.org Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Tested-by: Amos Kong <akong@redhat.com>
2013-05-15hw/pci-host/versatile.c: Provide property for forcing broken IRQ mappingPeter Maydell
Although we try our best to automatically detect broken versions of Linux which assume the old broken IRQ mapping we used to implement for our model of the Versatile PCI controller, it turns out that some particularly new kernels manage to outwit the autodetection. We therefore provide a property for enabling the old broken IRQ mapping, so that if users happen to have such a kernel they can work around its deficiencies with the command line option: -global versatile_pci.broken-irq-mapping=1 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1368545616-22344-4-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-05-15hw/pci-host/versatile.c: Update autodetect to detect newer kernelsPeter Maydell
Newer versatilepb kernels still don't get the IRQ mapping right for the PCI controller, but they get it differently wrong (they add a fixed +64 offset to everything they write to PCI_INTERRUPT_LINE). Update the autodetection to handle these too, and include a more detailed comment on the various different behaviours that might be present. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1368545616-22344-3-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-05-15Revert "versatile_pci: Put the host bridge PCI device at slot 29"Peter Maydell
This reverts commit 5f37ef92b7690423ac6311d3c597e182fc5f8fe6. It turns out that some kernels incorrectly depend on the old QEMU behaviour of not putting the host PCI bridge device where the hardware puts it, because they use a swizzling IRQ mapping which is incorrect but happens to match up with old broken QEMU when the slot number mod 4 is zero. Since we start PCI devices at 11, if we put the host bridge at 29 then the first real PCI device goes at 11 and doesn't work. Not putting the host bridge at 29 means it defaults to 11, so the first real PCI device is at 12 and works. Since continuing with the old behaviour doesn't cause problems for kernels which do work with hardware, the simplest fix for this is to revert the change. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1368545616-22344-2-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-27sparc64: use direct interrupt mapping for PCI devicesArtyom Tarasenko
Every PCI Slot in PBM has 4 directly mapped IRQ lines. Use the IRQ routing schema 0bssnn (Bus, Slot, interrupt Number) described in Section 19.3.3 of UltraSPARC™-IIi User's Manual. Please note that this patch requires the OpenBIOS counterpart patch. Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-04-27sparc64: fix loosing interruptsArtyom Tarasenko
- clear interrupts only on writing to the interrupt clear registers - don't overwrite a currently active interrupt request - use the correct addresses for the interrupt clear registers (section 19.3.3.3 of the UltraSPARC™-IIi User’s Manual) Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-04-27sparc64: allow 64 IRQ linesArtyom Tarasenko
According to UltraSPARC™-IIi User’s Manual, PBM has 64 IRQ lines. Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-04-19hw/versatile_pci: Drop unnecessary vpb_pci_config_addr()Peter Maydell
Drop the vpb_pci_config_addr() function -- it is unnecessary since the size of the memory regions means the hwaddr is always within the 24 bit size. (This function was probably a leftover from when read/write functions were called with absolute addresses rather than relative ones.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Paul Brook <paul@codesourcery.com>
2013-04-19versatile_pci: Expose PCI memory space to systemPeter Maydell
The VersatilePB's PCI controller exposes the PCI memory space to the system via three regions controlled by the mapping control registers. Implement this so that guests can actually use MMIO-BAR PCI cards. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Paul Brook <paul@codesourcery.com>
2013-04-19versatile_pci: Implement the PCI controller's control registersPeter Maydell
The versatile_pci PCI controller has a set of control registers which handle the mapping between PCI and system address spaces. Implement these registers (though for now they have no effect since we don't implement mapping PCI space into system memory at all). The most natural order for our sysbus regions has the control registers at the start, so move all the others down one. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Paul Brook <paul@codesourcery.com>
2013-04-19versatile_pci: Implement the correct PCI IRQ mappingPeter Maydell
Implement the correct IRQ mapping for the Versatile PCI controller; it differs between realview and versatile boards, but the previous QEMU implementation was correct only for the first PCI card on a versatile board, since we weren't swizzling IRQs based on the slot number. Since this change would otherwise break any uses of PCI on Linux kernels which have an equivalent bug (since they have effectively only been tested against QEMU, not real hardware), we implement a mechanism for automatically detecting those broken kernels and switching back to the old mapping. This works by looking at the values the kernel writes to the PCI_INTERRUPT_LINE register in the config space, which is effectively the interrupt number the kernel expects the device to be using. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-04-19versatile_pci: Put the host bridge PCI device at slot 29Peter Maydell
On real hardware the host bridge appears as a PCI device in slot 29, so make QEMU put its host bridge in that slot too. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Paul Brook <paul@codesourcery.com>
2013-04-19versatile_pci: Use separate PCI I/O space rather than system I/O spacePeter Maydell
Rather than overloading the system I/O space (which doesn't even make any sense on ARM) for PCI I/O, create an memory region in the PCI controller and use that to represent the I/O space. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Paul Brook <paul@codesourcery.com>
2013-04-19versatile_pci: Change to subclassing TYPE_PCI_HOST_BRIDGEPeter Maydell
Change versatile_pci to subclass TYPE_PCI_HOST_BRIDGE and generally handle PCI in a more QOM-like fashion. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Paul Brook <paul@codesourcery.com>
2013-04-19versatile_pci: Update to realize and instance init functionsPeter Maydell
Update the Versatile PCI controller to use a realize function rather than SysBusDevice::init. To reflect the fact that the 'realview_pci' class is taking most of its implementation from 'versatile_pci' (and to make the QOM casts work) we make 'realview_pci' a subclass of 'versatile_pci'. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Paul Brook <paul@codesourcery.com>
2013-04-19versatile_pci: Expose PCI I/O region on Versatile PBPeter Maydell
Comments in the QEMU source code claim that the version of the PCI controller on the VersatilePB board doesn't support the PCI I/O region, but this is incorrect; expose that region, map it in the correct location, and drop the misleading comments. This change removes the only currently implemented difference between the realview-pci and versatile-pci models; however there are other differences in not-yet-implemented functionality, so we retain the distinction between the two device types. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Paul Brook <paul@codesourcery.com>
2013-04-19versatile_pci: Fix hardcoded tabsPeter Maydell
There is just one line in this source file with a hardcoded tab indent, so just fix it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Paul Brook <paul@codesourcery.com>
2013-04-08hw: move private headers to hw/ subdirectories.Paolo Bonzini
Many headers are used only in a single directory. These can be kept in hw/. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-04-08hw: move PCI bridges to hw/pci-* or hw/ARCHPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>