Age | Commit message (Expand) | Author |
---|---|---|
2023-11-07 | hw/pci-bridge/cxl_downstream: Set default link width and link speed | Jonathan Cameron |
2023-11-07 | hw/cxl/mbox: Add Physical Switch Identify command. | Jonathan Cameron |
2023-11-07 | hw/cxl: CXLDVSECPortExtensions renamed to CXLDVSECPortExt | Jonathan Cameron |
2023-09-20 | hw/pci: spelling fixes | Michael Tokarev |
2023-03-02 | hw/pci-bridge/cxl_downstream: Fix type naming mismatch | Jonathan Cameron |
2022-12-21 | pci: drop redundant PCIDeviceClass::is_bridge field | Igor Mammedov |
2022-06-16 | pci-bridge/cxl_downstream: Add a CXL switch downstream port | Jonathan Cameron |