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path: root/hw/openrisc/openrisc_sim.c
AgeCommit message (Expand)Author
2017-02-14target/openrisc: Rename the cpu from or32 to or1kRichard Henderson
2016-03-22hw: explicitly include qemu-common.h and cpu.hPaolo Bonzini
2016-03-22include/qemu/osdep.h: Don't include qapi/error.hMarkus Armbruster
2016-03-04loader: Add data swap option to load-elfPeter Crosthwaite
2016-01-29openrisc: Clean up includesPeter Maydell
2015-09-25or32: Remove ELF_MACHINE from cpu.hPeter Crosthwaite
2015-09-19Use DEFINE_MACHINE() to register all machinesEduardo Habkost
2015-09-18Fix bad error handling after memory_region_init_ram()Markus Armbruster
2014-11-03hw/core/loader: implement address translation in uimage loaderMax Filippov
2014-09-09memory: add parameter errp to memory_region_init_ramHu Tao
2014-05-28machine: Conversion of QEMUMachineInitArgs to MachineStateMarcel Apfelbaum
2013-09-03Merge remote-tracking branch 'mst/tags/for_anthony' into stagingAnthony Liguori
2013-08-28hw: Clean up bogus default boot orderMarkus Armbruster
2013-08-21hw/openrisc: Avoid using uninitialised variable 'entry'Jia Liu
2013-07-23hw/openrisc: Use stderr output instead of qemu_logJia Liu
2013-07-23hw/openrisc: Indent typoJia Liu
2013-07-04memory: add owner argument to initialization functionsPaolo Bonzini
2013-04-08hw: move headers to include/Paolo Bonzini
2013-03-01hw: move boards and other isolated files to hw/ARCHPaolo Bonzini
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