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path: root/hw/openpic.c
AgeCommit message (Expand)Author
2013-01-25openpic: add basic support for MPIC v4.2Scott Wood
2013-01-25openpic: fix timer address decodingScott Wood
2013-01-25openpic: fix remaining issues from idr-to-destmask conversionScott Wood
2013-01-25ppc: Move Mac machines to hw/ppc/Andreas Färber
2013-01-21sysbus: Drop sysbus_from_qdev() cast macroAndreas Färber
2013-01-18openpic: export e500 epr enable into a ppc.c functionAlexander Graf
2013-01-18openpic: set mixed mode as supportedAlexander Graf
2013-01-18openpic: unify gcr mode mask updatesAlexander Graf
2013-01-18openpic: move gcr write into a functionAlexander Graf
2013-01-15cpu: Move cpu_index field to CPUStateAndreas Färber
2013-01-12Merge branch 'ppc-for-upstream' of git://repo.or.cz/qemu/agrafBlue Swirl
2013-01-10Make all static TypeInfos constAndreas Färber
2013-01-07PPC: Bring EPR support closer to realityAlexander Graf
2013-01-07openpic: fix CTPR and de-assertion of interruptsScott Wood
2013-01-07openpic: move IACK to its own functionScott Wood
2013-01-07openpic: IRQ_check: search the queue a word at a timeScott Wood
2013-01-07openpic: fix sense and priority bitsScott Wood
2013-01-07openpic: add some bounds checking for IRQ numbersScott Wood
2013-01-07openpic: use standard bitmap operationsScott Wood
2013-01-07Revert "openpic: Accelerate pending irq search"Scott Wood
2013-01-07openpic: always call IRQ_check from IRQ_get_nextScott Wood
2013-01-07openpic/fsl: critical interrupts ignore mask before v4.1Scott Wood
2013-01-07openpic: make ctpr signedScott Wood
2013-01-07openpic: rework critical interrupt supportScott Wood
2013-01-07openpic: make register names correspond better with hw docsScott Wood
2013-01-07openpic: lower interrupt when reading the MSI registerScott Wood
2013-01-07openpic: fix debug printsScott Wood
2013-01-07openpic: fix coding style issuesAlexander Graf
2013-01-07openpic: don't crash on a register access without a CPU contextScott Wood
2013-01-07openpic: s/opp->nb_irqs -1/opp->nb_cpus - 1/Scott Wood
2013-01-07openpic: BRR1 is not a CPU-specific register.Scott Wood
2013-01-07openpic: support large vectors on FSL mpicScott Wood
2013-01-07openpic: remove pcsr (CPU sensitivity register)Scott Wood
2013-01-07openpic: symbolicize some magic numbersScott Wood
2012-12-17Merge commit '1dd3a74d2ee2d873cde0b390b536e45420b3fe05' into HEADPaolo Bonzini
2012-12-17pci: update all users to look in pci/Michael S. Tsirkin
2012-12-14openpic: Accelerate pending irq searchAlexander Graf
2012-12-14openpic: fix minor coding style issuesAlexander Graf
2012-12-14openpic: add Shared MSI supportAlexander Graf
2012-12-14openpic: make brr1 model specificAlexander Graf
2012-12-14openpic: convert to qdevAlexander Graf
2012-12-14openpic: remove irq_outAlexander Graf
2012-12-14openpic: rename openpic_t to OpenPICStateAlexander Graf
2012-12-14openpic: convert simple reg operations to builtin bitopsAlexander Graf
2012-12-14openpic: remove unused type variableAlexander Graf
2012-12-14openpic: unify memory api subregionsAlexander Graf
2012-12-14openpic: combine openpic and mpic reset functionsAlexander Graf
2012-12-14openpic: merge mpic and openpic timer handlingAlexander Graf
2012-12-14openpic: combine mpic and openpic irq raise functionsAlexander Graf
2012-12-14openpic: Convert subregions to memory apiAlexander Graf
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