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2012-12-17Merge commit '1dd3a74d2ee2d873cde0b390b536e45420b3fe05' into HEADPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-17pci: update all users to look in pci/Michael S. Tsirkin
update all users so we can remove the makefile hack. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2012-12-14openpic: Accelerate pending irq searchAlexander Graf
When we're done with one interrupt, we need to search for the next pending interrupt in the queue. This search has grown quite big now that we have more than 256 possible irq lines. So let's memorize how many interrupts we have pending in our bitmaps, so that we can always bail out in the usual case - the one where we're all done. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14openpic: fix minor coding style issuesAlexander Graf
This patch removes all remaining occurences of spaces before function parameter indicating parenthesis. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14openpic: add Shared MSI supportAlexander Graf
The OpenPIC allows MSI access through shared MSI registers. Implement them for the MPC8544 MPIC, so we can support MSIs. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14openpic: make brr1 model specificAlexander Graf
Now that we can properly distinguish between openpic model differences, let's move brr1 out of the raven code path. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14openpic: convert to qdevAlexander Graf
This patch converts the OpenPIC device to qdev. Along the way it renames the "openpic" target to "raven" and the "mpic" target to "fsl_mpic_20", to better reflect the actual models they implement. This way we have a generic OpenPIC device now that can handle different flavors of the OpenPIC specification. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14openpic: remove irq_outAlexander Graf
The current openpic emulation contains half-ready code for bypass mode. Remove it, so that when someone wants to finish it they can start from a clean state. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14openpic: rename openpic_t to OpenPICStateAlexander Graf
Rename the openpic_t struct to OpenPICState, so it adheres better to the current coding style rules. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14openpic: convert simple reg operations to builtin bitopsAlexander Graf
The openpic code has its own bitmap code to access bits inside of a bitmap. However, that is overkill when we simply want to check for a bit inside of a uint32_t. So instead, let's use normal bit masks and C builtin shifts and ands. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14openpic: remove unused type variableAlexander Graf
The openpic source irqs are carrying around a type indicator that is never accessed by anything. Remove it. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14openpic: unify memory api subregionsAlexander Graf
The only difference between the "openpic" and "mpic" memory api subregion descriptors is the endianness. Unify them as openpic accessors with explicit endianness markers in their names. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14openpic: combine openpic and mpic reset functionsAlexander Graf
The openpic and mpic reset handlers are almost identical. Combine them and extract the differences into state variables. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14openpic: merge mpic and openpic timer handlingAlexander Graf
The openpic and mpic timer handling code is basically the same. Merge them. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14openpic: combine mpic and openpic irq raise functionsAlexander Graf
The IRQ raise mechanisms of the OpenPIC and MPIC controllers is identical, just that the MPIC one can also raise critical interrupts. Combine those two and check for critical raise capability during runtime. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14openpic: Convert subregions to memory apiAlexander Graf
The "openpic" controller is currently using one big region and does subregion dispatching manually. Move this to the memory api. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14openpic: combine mpic and openpic src handlersAlexander Graf
The MPIC source irq handler suddenly became identical to the standard OpenPIC source irq handler. Combine them into the same function. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14openpic: update to proper memory apiAlexander Graf
The openpic code was still using the old mmio memory api. Convert it to be a generic memory api user and clean up some code that becomes redundant that way. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14mpic: Unify numbering schemeAlexander Graf
MPIC interrupt numbers in Linux (device tree) and in QEMU are different, because QEMU takes the sparseness of the IRQ number space into account. Remove that cleverness and instead assume a flat number space. This makes the code easier to understand, because we are actually aligned with Linux on the view of our worlds. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-14openpic: Remove unused codeAlexander Graf
The openpic code had a few WIP bits left that nobody reanimated within the last few years. Remove that code. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hervé Poussineau <hpoussin@reactos.org>
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-08-15openpic: Added BRR1 registerBharat Bhushan
Linux mpic driver uses (changes may be in pipeline to get upstreamed soon) BRR1. This patch adds the support to emulate readonly FSL BRR1 register. Currently QEMU does not fully emulate any version on MPIC, so the MPIC Major number and Minor number are set to 0. Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-03-15PPC: Fix openpic with relative memregionsAlexander Graf
After commit 5312bd8b3152 we got memory region relative offsets into our mmio callbacks instead of page boundary based offsets. This broke the OpenPIC emulation which expected offsets to be on page boundary and substracted its region offset manually. This patch gets rid of that manual substraction and lets the memory api do its magic instead. Signed-off-by: Alexander Graf <agraf@suse.de>
2012-01-27openpic: remove dead code to make a PCI device versionAnthony Liguori
bus is always NULL so the code in this if clause is dead (and therefore untested). Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-10-09Merge remote-tracking branch 'upstream' into memory/batchAvi Kivity
* upstream: (87 commits) target-alpha: Fix compilation errors for 32 bit hosts target-alpha: Add high-resolution access to wall clock and an alarm. target-alpha: Implement HALT IPR. target-alpha: Implement WAIT IPR. target-alpha: Add CLIPPER emulation. target-alpha: Add custom PALcode image for CLIPPER emulation. target-alpha: Honor icount for RPCC instruction. tcg/s390: Remove unused tcg_out_addi() tcg/ia64: Remove unused tcg_out_addi() ARM: fix segfault ppc64: Fix linker script pseries: Implement set-time-of-day RTAS function pseries: Refactor spapr irq allocation PPC: Clean up BookE timer code PPC: booke timers KVM: PPC: Use HIOR setting for -M pseries with PR KVM KVM: Update kernel headers KVM: Update kernel headers PPC: Fix heathrow PIC to use little endian MMIO PPC: Fix via-cuda memory registration ... Conflicts: hw/milkymist-uart.c hw/ppce500_mpc8544ds.c Signed-off-by: Avi Kivity <avi@redhat.com>
2011-10-06openpic: Unfold write_IRQregAlexander Graf
The helper function write_IRQreg was always called with a specific argument on the type of register to access. Inside the function we were simply doing a switch on that constant argument again. It's a lot easier to just unfold this into two separate functions and call each individually. Reported-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06openpic: Unfold read_IRQregAlexander Graf
The helper function read_IRQreg was always called with a specific argument on the type of register to access. Inside the function we were simply doing a switch on that constant argument again. It's a lot easier to just unfold this into two separate functions and call each individually. Reported-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06PPC: Bump MPIC up to 32 supported CPUsAlexander Graf
The MPIC emulation is now capable of handling up to 32 CPUs. Reflect that in the code exporting the numbers out and fix an integer overflow while at it. Signed-off-by: Alexander Graf <agraf@suse.de> --- v1 -> v2: - Max cpus is 15 due to cINT routing - Report nb_cpus not MAX_CPUS in MPIC capabilities
2011-10-06PPC: MPIC: Fix CI bit definitionsAlexander Graf
The bit definitions for critical interrupt routing are in PowerPC order (most significant bit is 0), while we end up shifting it with normal bit order. Turn the numbers around so we actually end up fetching the right ones. Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06PPC: MPIC: Remove read functionality for WO registersAlexander Graf
The IPI dispatch registers are write only according to every MPIC spec I have found. So instead of pretending you could read back something from them, better not handle them at all. Reported-by: Elie Richa <richa@adacore.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06PPC: Set MPIC IDE for IPI to 0Alexander Graf
We use the IDE register with IPIs as a mask to keep track which processors have already acknowledged the respective interrupt. So we need to initialize it to 0 to make sure that it doesn't accidently fire an IPI on CPU0 when the first IPI is triggered. Reported-by: Elie Richa <richa@adacore.com> Signed-off-by: Alexander Graf <agraf@suse.de> --- v2 -> v3: - fix IDE IPI reset
2011-10-06PPC: Fix IPI support in MPICAlexander Graf
The current IPI support in the MPIC code is incomplete and doesn't work. This code adds proper support for IPIs in MPIC by using the IDE register to remember which CPUs IPIs are still outstanding to. New triggers through the IPI trigger register only add to the list of CPUs we want to IPI. Signed-off-by: Alexander Graf <agraf@suse.de> --- v1 -> v2: - Use MAX_IPI instead of hardcoded 4 Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06PPC: Extend MPIC MMIO rangeAlexander Graf
The MPIC exports a page for each CPU that it controls. To support more than one CPU, we need to also reserve the MMIO space according to the amount of CPUs we want to support. Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-06PPC: Add CPU local MMIO regions to MPICAlexander Graf
The MPIC exports a register set for each CPU connected to it. They can all be accessed through specific registers or using a shadow page that is mapped differently depending on which CPU accesses it. This patch implements the shadow map, making it possible for guests to access the CPU local registers using the same address on each CPU. Signed-off-by: Alexander Graf <agraf@suse.de>
2011-10-02openpic: Memory API conversion for mpicFabien Chouteau
This patch converts mpic to the new memory API (through old mmio). Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2011-08-20Use glib memory allocation and free functionsAnthony Liguori
qemu_malloc/qemu_free no longer exist after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-08pci: rename pci_register_bar_region() to pci_register_bar()Avi Kivity
Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-08ppc: convert to memory APIAvi Kivity
Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-12-11openpic: Replace explicit byte swap with endian hintsAlexander Graf
This patch replaces explicit bswaps with endianness hints to the mmio layer. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-11Add endianness as io mem parameterAlexander Graf
As stated before, devices can be little, big or native endian. The target endianness is not of their concern, so we need to push things down a level. This patch adds a parameter to cpu_register_io_memory that allows a device to choose its endianness. For now, all devices simply choose native endian, because that's the same behavior as before. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-11-22pci: Replace unneeded type casts in calls of pci_register_barStefan Weil
There is no need for these type casts (as other existing code shows). So re-write the first argument without type cast (and remove a related TODO comment). Cc: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2010-07-11pci: don't overwrite multi functio bit in pci header type.Isaku Yamahata
Don't overwrite pci header type. Otherwise, multi function bit which pci_init_header_type() sets appropriately is lost. Anyway PCI_HEADER_TYPE_NORMAL is zero, so it is unnecessary to zero which is already zero cleared. how to test: run qemu and issue info pci to see whether a device in question is normal device, not pci-to-pci bridge. This is handy because guest os isn't required. tested changes: The following files are covered by using following commands. sparc64-softmmu apb_pci.c, vga-pci.c, cmd646.c, ne2k_pci.c, sun4u.c ppc-softmmu grackle_pci.c, cmd646.c, ne2k_pci.c, vga-pci.c, macio.c ppc-softmmu -M mac99 unin_pci.c(uni-north, uni-north-agp) ppc64-softmmu pci-ohci, ne2k_pci, vga-pci, unin_pci.c(u3-agp) x86_64-softmmu acpi_piix4.c, ide/piix.c, piix_pci.c -vga vmware vmware_vga.c -watchdog i6300esb wdt_i6300esb.c -usb usb-uhci.c -sound ac97 ac97.c -nic model=rtl8139 rtl8139.c -nic model=pcnet pcnet.c -balloon virtio virtio-pci.c: untested changes: The following changes aren't tested. prep_pci.c: ppc-softmmu -M prep should cover, but core dumped. unin_pci.c(uni-north-pci): the caller is commented out. openpic.c: the caller is commented out in ppc_prep.c Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-07-06savevm: Add DeviceState paramAlex Williamson
When available, we'd like to be able to access the DeviceState when registering a savevm. For buses with a get_dev_path() function, this will allow us to create more unique savevm id strings. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-03-29Compile openpic only onceBlue Swirl
Replace TARGET_PAGE_SIZE with 4096. Make byte swapping unconditional since PPC is big endian. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-12-19hw/openpic.c: replace tabs by spacesAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-19target-ppc: Initialize OpenPIC properlyAlexander Graf
When lowering an IRQ line, we search for the line we're supposed to lower. Usually we run into an optimization there that queues up interrupts. This queue ends with -1. Unfortunately we didn't set the first item to -1. This patch fixes this, making interrupts work on PPC64. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-11-15PCI: make duplicate devfn allocation fatalBlue Swirl
Only two callers of pci_create_simple/pci_register_device bothered to check the return value. Other cases were prone to crashing with spurious NULL pointer dereferences. Make QEMU exit with an error message when devfn is attempted to be duplicated, also applies to case when the bus is full. Remove checks. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-11-09pci: introduce pcibus_t to represent pci bus address/size instead of uint32_tIsaku Yamahata
This patch is preliminary for 64 bit BAR support. Introduce dedicated type, pcibus_t, to represent pci bus address/size instead of uint32_t. Later this type will be changed to uint64_t. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-11-09pci: s/PCI_ADDRESS_SPACE_/PCI_BASE_ADDRESS_SPACE_/ to match pci_regs.hIsaku Yamahata
make constants for pci base address match pci_regs.h by renaming PCI_ADDRESS_SPACE_xxx to PCI_BASE_ADDRESS_SPACE_xxx. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-11-07PPC: remove unneeded calls to device resetBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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