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2012-03-13kvmclock: Always register typeAndreas Färber
Currently, the "kvmclock" type is only registered when kvm_enabled(). This breaks when moving type registration to before command line parsing (so that QOM types can be used for CPU and machine). Since the QOM classes are lazy-initialized anyway and kvmclock_create() has another kvm_enabled() check, simply drop the KVM check in kvmclock_register_types(). kvm-i8259, kvm-apic and kvm-ioapic do not suffer from such a check. Reviewed-by: please. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com> Cc: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-07kvm: x86: Add user space part for in-kernel i8254Jan Kiszka
This provides the required user space stubs to enable the in-kernel i8254 emulation of KVM. The in-kernel model supports lost tick compensation according to the "delay" policy. This is enabled by default and can be switched off via a device property. Depending on the feature set of the host kernel (before 2.6.32), we may have to disable the HPET or lack sound output from the PC speaker. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-03-01Merge remote-tracking branch 'qemu-kvm/uq/master' into stagingAnthony Liguori
* qemu-kvm/uq/master: pc-bios: update kvmvapic.bin kvmvapic: Use optionrom helpers optionsrom: Reserve space for checksum kvmvapic: Simplify mp/up_set_tpr kvmvapic: Introduce TPR access optimization for Windows guests kvmvapic: Add option ROM target-i386: Add infrastructure for reporting TPR MMIO accesses Allow to use pause_all_vcpus from VCPU context Process pending work while waiting for initial kick-off in TCG mode Remove useless casts from cpu iterators kvm: Set cpu_single_env only once kvm: Synchronize cpu state in kvm_arch_stop_on_emulation_error()
2012-02-18kvmvapic: Introduce TPR access optimization for Windows guestsJan Kiszka
This enables acceleration for MMIO-based TPR registers accesses of 32-bit Windows guest systems. It is mostly useful with KVM enabled, either on older Intel CPUs (without flexpriority feature, can also be manually disabled for testing) or any current AMD processor. The approach introduced here is derived from the original version of qemu-kvm. It was refactored, documented, and extended by support for user space APIC emulation, both with and without KVM acceleration. The VMState format was kept compatible, so was the ABI to the option ROM that implements the guest-side para-virtualized driver service. This enables seamless migration from qemu-kvm to upstream or, one day, between KVM and TCG mode. The basic concept goes like this: - VAPIC PV interface consisting of I/O port 0x7e and (for KVM in-kernel irqchip) a vmcall hypercall is registered - VAPIC option ROM is loaded into guest - option ROM activates TPR MMIO access reporting via port 0x7e - TPR accesses are trapped and patched in the guest to call into option ROM instead, VAPIC support is enabled - option ROM TPR helpers track state in memory and invoke hypercall to poll for pending IRQs if required Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-02-17i8259: Do not clear level-triggered lines in IRR on initJan Kiszka
When an input line is handled as level-triggered, it will immediately raise an IRQ on the output of a PIC again that goes through an init reset. So only clear the edge-triggered inputs from IRR in that scenario. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-15qom: Unify type registrationAndreas Färber
Replace device_init() with generalized type_init(). While at it, unify naming convention: type_init([$prefix_]register_types) Also, type_init() is a function, so add preceding blank line where necessary and don't put a semicolon after the closing brace. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Cc: malc <av1474@comtv.ru> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-06KVM: Fix breakages of QOM conversionJan Kiszka
KVM APIC and PIC require instance sizes. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03qdev: register all types natively through QEMU Object ModelAnthony Liguori
This was done in a mostly automated fashion. I did it in three steps and then rebased it into a single step which avoids repeatedly touching every file in the tree. The first step was a sed-based addition of the parent type to the subclass registration functions. The second step was another sed-based removal of subclass registration functions while also adding virtual functions from the base class into a class_init function as appropriate. Finally, a python script was used to convert the DeviceInfo structures and qdev_register_subclass functions to TypeInfo structures, class_init functions, and type_register_static calls. We are almost fully converted to QOM after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27sysbus: apic: ioapic: convert to QEMU Object ModelAnthony Liguori
This converts three devices because apic and ioapic are subclasses of sysbus. Converting subclasses independently of their base class is prohibitively hard. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27isa: pic: convert to QEMU Object ModelAnthony Liguori
This converts two devices at once because PIC subclasses ISA and converting subclasses independently is extremely hard. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-19kvm: x86: Add user space part for in-kernel IOAPICJan Kiszka
This introduces the KVM-accelerated IOAPIC model 'kvm-ioapic' and extends the IRQ routing setup by the 0->2 redirection when needed. The kvm-ioapic model has a property that allows to define its GSI base for injecting interrupts into the kernel model. This will allow to disentangle PIC and IOAPIC pins for chipsets that support more sophisticated IRQ routes than the PIIX3. So far the base is kept at 0, i.e. PIC and IOAPIC share pins 0..15. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19kvm: x86: Add user space part for in-kernel i8259Jan Kiszka
Introduce the alternative 'kvm-i8259' device model that exploits KVM in-kernel acceleration. The PIIX3 initialization code is furthermore extended by KVM specific IRQ route setup. GSI injection differs in KVM mode from the user space model. As we can dispatch ISA-range IRQs to both IOAPIC and PIC inside the kernel, we do not need to inject them separately. This is reflected by a KVM-specific GSI handler. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19kvm: x86: Add user space part for in-kernel APICJan Kiszka
This introduces the alternative APIC device which makes use of KVM's in-kernel device model. External NMI injection via LINT1 is emulated by checking the current state of the in-kernel APIC, only injecting a NMI into the VCPU if LINT1 is unmasked and configured to DM_NMI. MSI is not yet supported, so we disable this when the in-kernel model is in use. CC: Lai Jiangshan <laijs@cn.fujitsu.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19kvm: Move kvmclock into hw/kvm folderJan Kiszka
More KVM-specific devices will come, so let's start with moving the kvmclock into a dedicated folder. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>